1*f80ad8b4SAndroid Build Coastguard Worker /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ 2*f80ad8b4SAndroid Build Coastguard Worker #ifndef __SOUND_HDSPM_H 3*f80ad8b4SAndroid Build Coastguard Worker #define __SOUND_HDSPM_H 4*f80ad8b4SAndroid Build Coastguard Worker /* 5*f80ad8b4SAndroid Build Coastguard Worker * Copyright (C) 2003 Winfried Ritsch (IEM) 6*f80ad8b4SAndroid Build Coastguard Worker * based on hdsp.h from Thomas Charbonnel ([email protected]) 7*f80ad8b4SAndroid Build Coastguard Worker */ 8*f80ad8b4SAndroid Build Coastguard Worker 9*f80ad8b4SAndroid Build Coastguard Worker #ifdef __linux__ 10*f80ad8b4SAndroid Build Coastguard Worker #include <linux/types.h> 11*f80ad8b4SAndroid Build Coastguard Worker #endif 12*f80ad8b4SAndroid Build Coastguard Worker 13*f80ad8b4SAndroid Build Coastguard Worker /* Maximum channels is 64 even on 56Mode you have 64playbacks to matrix */ 14*f80ad8b4SAndroid Build Coastguard Worker #define HDSPM_MAX_CHANNELS 64 15*f80ad8b4SAndroid Build Coastguard Worker 16*f80ad8b4SAndroid Build Coastguard Worker enum hdspm_io_type { 17*f80ad8b4SAndroid Build Coastguard Worker MADI, 18*f80ad8b4SAndroid Build Coastguard Worker MADIface, 19*f80ad8b4SAndroid Build Coastguard Worker AIO, 20*f80ad8b4SAndroid Build Coastguard Worker AES32, 21*f80ad8b4SAndroid Build Coastguard Worker RayDAT 22*f80ad8b4SAndroid Build Coastguard Worker }; 23*f80ad8b4SAndroid Build Coastguard Worker 24*f80ad8b4SAndroid Build Coastguard Worker enum hdspm_speed { 25*f80ad8b4SAndroid Build Coastguard Worker ss, 26*f80ad8b4SAndroid Build Coastguard Worker ds, 27*f80ad8b4SAndroid Build Coastguard Worker qs 28*f80ad8b4SAndroid Build Coastguard Worker }; 29*f80ad8b4SAndroid Build Coastguard Worker 30*f80ad8b4SAndroid Build Coastguard Worker /* -------------------- IOCTL Peak/RMS Meters -------------------- */ 31*f80ad8b4SAndroid Build Coastguard Worker 32*f80ad8b4SAndroid Build Coastguard Worker struct hdspm_peak_rms { 33*f80ad8b4SAndroid Build Coastguard Worker __u32 input_peaks[64]; 34*f80ad8b4SAndroid Build Coastguard Worker __u32 playback_peaks[64]; 35*f80ad8b4SAndroid Build Coastguard Worker __u32 output_peaks[64]; 36*f80ad8b4SAndroid Build Coastguard Worker 37*f80ad8b4SAndroid Build Coastguard Worker __u64 input_rms[64]; 38*f80ad8b4SAndroid Build Coastguard Worker __u64 playback_rms[64]; 39*f80ad8b4SAndroid Build Coastguard Worker __u64 output_rms[64]; 40*f80ad8b4SAndroid Build Coastguard Worker 41*f80ad8b4SAndroid Build Coastguard Worker __u8 speed; /* enum {ss, ds, qs} */ 42*f80ad8b4SAndroid Build Coastguard Worker int status2; 43*f80ad8b4SAndroid Build Coastguard Worker }; 44*f80ad8b4SAndroid Build Coastguard Worker 45*f80ad8b4SAndroid Build Coastguard Worker #define SNDRV_HDSPM_IOCTL_GET_PEAK_RMS \ 46*f80ad8b4SAndroid Build Coastguard Worker _IOR('H', 0x42, struct hdspm_peak_rms) 47*f80ad8b4SAndroid Build Coastguard Worker 48*f80ad8b4SAndroid Build Coastguard Worker /* ------------ CONFIG block IOCTL ---------------------- */ 49*f80ad8b4SAndroid Build Coastguard Worker 50*f80ad8b4SAndroid Build Coastguard Worker struct hdspm_config { 51*f80ad8b4SAndroid Build Coastguard Worker unsigned char pref_sync_ref; 52*f80ad8b4SAndroid Build Coastguard Worker unsigned char wordclock_sync_check; 53*f80ad8b4SAndroid Build Coastguard Worker unsigned char madi_sync_check; 54*f80ad8b4SAndroid Build Coastguard Worker unsigned int system_sample_rate; 55*f80ad8b4SAndroid Build Coastguard Worker unsigned int autosync_sample_rate; 56*f80ad8b4SAndroid Build Coastguard Worker unsigned char system_clock_mode; 57*f80ad8b4SAndroid Build Coastguard Worker unsigned char clock_source; 58*f80ad8b4SAndroid Build Coastguard Worker unsigned char autosync_ref; 59*f80ad8b4SAndroid Build Coastguard Worker unsigned char line_out; 60*f80ad8b4SAndroid Build Coastguard Worker unsigned int passthru; 61*f80ad8b4SAndroid Build Coastguard Worker unsigned int analog_out; 62*f80ad8b4SAndroid Build Coastguard Worker }; 63*f80ad8b4SAndroid Build Coastguard Worker 64*f80ad8b4SAndroid Build Coastguard Worker #define SNDRV_HDSPM_IOCTL_GET_CONFIG \ 65*f80ad8b4SAndroid Build Coastguard Worker _IOR('H', 0x41, struct hdspm_config) 66*f80ad8b4SAndroid Build Coastguard Worker 67*f80ad8b4SAndroid Build Coastguard Worker /* 68*f80ad8b4SAndroid Build Coastguard Worker * If there's a TCO (TimeCode Option) board installed, 69*f80ad8b4SAndroid Build Coastguard Worker * there are further options and status data available. 70*f80ad8b4SAndroid Build Coastguard Worker * The hdspm_ltc structure contains the current SMPTE 71*f80ad8b4SAndroid Build Coastguard Worker * timecode and some status information and can be 72*f80ad8b4SAndroid Build Coastguard Worker * obtained via SNDRV_HDSPM_IOCTL_GET_LTC or in the 73*f80ad8b4SAndroid Build Coastguard Worker * hdspm_status struct. 74*f80ad8b4SAndroid Build Coastguard Worker */ 75*f80ad8b4SAndroid Build Coastguard Worker 76*f80ad8b4SAndroid Build Coastguard Worker enum hdspm_ltc_format { 77*f80ad8b4SAndroid Build Coastguard Worker format_invalid, 78*f80ad8b4SAndroid Build Coastguard Worker fps_24, 79*f80ad8b4SAndroid Build Coastguard Worker fps_25, 80*f80ad8b4SAndroid Build Coastguard Worker fps_2997, 81*f80ad8b4SAndroid Build Coastguard Worker fps_30 82*f80ad8b4SAndroid Build Coastguard Worker }; 83*f80ad8b4SAndroid Build Coastguard Worker 84*f80ad8b4SAndroid Build Coastguard Worker enum hdspm_ltc_frame { 85*f80ad8b4SAndroid Build Coastguard Worker frame_invalid, 86*f80ad8b4SAndroid Build Coastguard Worker drop_frame, 87*f80ad8b4SAndroid Build Coastguard Worker full_frame 88*f80ad8b4SAndroid Build Coastguard Worker }; 89*f80ad8b4SAndroid Build Coastguard Worker 90*f80ad8b4SAndroid Build Coastguard Worker enum hdspm_ltc_input_format { 91*f80ad8b4SAndroid Build Coastguard Worker ntsc, 92*f80ad8b4SAndroid Build Coastguard Worker pal, 93*f80ad8b4SAndroid Build Coastguard Worker no_video 94*f80ad8b4SAndroid Build Coastguard Worker }; 95*f80ad8b4SAndroid Build Coastguard Worker 96*f80ad8b4SAndroid Build Coastguard Worker struct hdspm_ltc { 97*f80ad8b4SAndroid Build Coastguard Worker unsigned int ltc; 98*f80ad8b4SAndroid Build Coastguard Worker 99*f80ad8b4SAndroid Build Coastguard Worker enum hdspm_ltc_format format; 100*f80ad8b4SAndroid Build Coastguard Worker enum hdspm_ltc_frame frame; 101*f80ad8b4SAndroid Build Coastguard Worker enum hdspm_ltc_input_format input_format; 102*f80ad8b4SAndroid Build Coastguard Worker }; 103*f80ad8b4SAndroid Build Coastguard Worker 104*f80ad8b4SAndroid Build Coastguard Worker #define SNDRV_HDSPM_IOCTL_GET_LTC _IOR('H', 0x46, struct hdspm_ltc) 105*f80ad8b4SAndroid Build Coastguard Worker 106*f80ad8b4SAndroid Build Coastguard Worker /* 107*f80ad8b4SAndroid Build Coastguard Worker * The status data reflects the device's current state 108*f80ad8b4SAndroid Build Coastguard Worker * as determined by the card's configuration and 109*f80ad8b4SAndroid Build Coastguard Worker * connection status. 110*f80ad8b4SAndroid Build Coastguard Worker */ 111*f80ad8b4SAndroid Build Coastguard Worker 112*f80ad8b4SAndroid Build Coastguard Worker enum hdspm_sync { 113*f80ad8b4SAndroid Build Coastguard Worker hdspm_sync_no_lock = 0, 114*f80ad8b4SAndroid Build Coastguard Worker hdspm_sync_lock = 1, 115*f80ad8b4SAndroid Build Coastguard Worker hdspm_sync_sync = 2 116*f80ad8b4SAndroid Build Coastguard Worker }; 117*f80ad8b4SAndroid Build Coastguard Worker 118*f80ad8b4SAndroid Build Coastguard Worker enum hdspm_madi_input { 119*f80ad8b4SAndroid Build Coastguard Worker hdspm_input_optical = 0, 120*f80ad8b4SAndroid Build Coastguard Worker hdspm_input_coax = 1 121*f80ad8b4SAndroid Build Coastguard Worker }; 122*f80ad8b4SAndroid Build Coastguard Worker 123*f80ad8b4SAndroid Build Coastguard Worker enum hdspm_madi_channel_format { 124*f80ad8b4SAndroid Build Coastguard Worker hdspm_format_ch_64 = 0, 125*f80ad8b4SAndroid Build Coastguard Worker hdspm_format_ch_56 = 1 126*f80ad8b4SAndroid Build Coastguard Worker }; 127*f80ad8b4SAndroid Build Coastguard Worker 128*f80ad8b4SAndroid Build Coastguard Worker enum hdspm_madi_frame_format { 129*f80ad8b4SAndroid Build Coastguard Worker hdspm_frame_48 = 0, 130*f80ad8b4SAndroid Build Coastguard Worker hdspm_frame_96 = 1 131*f80ad8b4SAndroid Build Coastguard Worker }; 132*f80ad8b4SAndroid Build Coastguard Worker 133*f80ad8b4SAndroid Build Coastguard Worker enum hdspm_syncsource { 134*f80ad8b4SAndroid Build Coastguard Worker syncsource_wc = 0, 135*f80ad8b4SAndroid Build Coastguard Worker syncsource_madi = 1, 136*f80ad8b4SAndroid Build Coastguard Worker syncsource_tco = 2, 137*f80ad8b4SAndroid Build Coastguard Worker syncsource_sync = 3, 138*f80ad8b4SAndroid Build Coastguard Worker syncsource_none = 4 139*f80ad8b4SAndroid Build Coastguard Worker }; 140*f80ad8b4SAndroid Build Coastguard Worker 141*f80ad8b4SAndroid Build Coastguard Worker struct hdspm_status { 142*f80ad8b4SAndroid Build Coastguard Worker __u8 card_type; /* enum hdspm_io_type */ 143*f80ad8b4SAndroid Build Coastguard Worker enum hdspm_syncsource autosync_source; 144*f80ad8b4SAndroid Build Coastguard Worker 145*f80ad8b4SAndroid Build Coastguard Worker __u64 card_clock; 146*f80ad8b4SAndroid Build Coastguard Worker __u32 master_period; 147*f80ad8b4SAndroid Build Coastguard Worker 148*f80ad8b4SAndroid Build Coastguard Worker union { 149*f80ad8b4SAndroid Build Coastguard Worker struct { 150*f80ad8b4SAndroid Build Coastguard Worker __u8 sync_wc; /* enum hdspm_sync */ 151*f80ad8b4SAndroid Build Coastguard Worker __u8 sync_madi; /* enum hdspm_sync */ 152*f80ad8b4SAndroid Build Coastguard Worker __u8 sync_tco; /* enum hdspm_sync */ 153*f80ad8b4SAndroid Build Coastguard Worker __u8 sync_in; /* enum hdspm_sync */ 154*f80ad8b4SAndroid Build Coastguard Worker __u8 madi_input; /* enum hdspm_madi_input */ 155*f80ad8b4SAndroid Build Coastguard Worker __u8 channel_format; /* enum hdspm_madi_channel_format */ 156*f80ad8b4SAndroid Build Coastguard Worker __u8 frame_format; /* enum hdspm_madi_frame_format */ 157*f80ad8b4SAndroid Build Coastguard Worker } madi; 158*f80ad8b4SAndroid Build Coastguard Worker } card_specific; 159*f80ad8b4SAndroid Build Coastguard Worker }; 160*f80ad8b4SAndroid Build Coastguard Worker 161*f80ad8b4SAndroid Build Coastguard Worker #define SNDRV_HDSPM_IOCTL_GET_STATUS \ 162*f80ad8b4SAndroid Build Coastguard Worker _IOR('H', 0x47, struct hdspm_status) 163*f80ad8b4SAndroid Build Coastguard Worker 164*f80ad8b4SAndroid Build Coastguard Worker /* 165*f80ad8b4SAndroid Build Coastguard Worker * Get information about the card and its add-ons. 166*f80ad8b4SAndroid Build Coastguard Worker */ 167*f80ad8b4SAndroid Build Coastguard Worker 168*f80ad8b4SAndroid Build Coastguard Worker #define HDSPM_ADDON_TCO 1 169*f80ad8b4SAndroid Build Coastguard Worker 170*f80ad8b4SAndroid Build Coastguard Worker struct hdspm_version { 171*f80ad8b4SAndroid Build Coastguard Worker __u8 card_type; /* enum hdspm_io_type */ 172*f80ad8b4SAndroid Build Coastguard Worker char cardname[20]; 173*f80ad8b4SAndroid Build Coastguard Worker unsigned int serial; 174*f80ad8b4SAndroid Build Coastguard Worker unsigned short firmware_rev; 175*f80ad8b4SAndroid Build Coastguard Worker int addons; 176*f80ad8b4SAndroid Build Coastguard Worker }; 177*f80ad8b4SAndroid Build Coastguard Worker 178*f80ad8b4SAndroid Build Coastguard Worker #define SNDRV_HDSPM_IOCTL_GET_VERSION _IOR('H', 0x48, struct hdspm_version) 179*f80ad8b4SAndroid Build Coastguard Worker 180*f80ad8b4SAndroid Build Coastguard Worker /* ------------- get Matrix Mixer IOCTL --------------- */ 181*f80ad8b4SAndroid Build Coastguard Worker 182*f80ad8b4SAndroid Build Coastguard Worker /* MADI mixer: 64inputs+64playback in 64outputs = 8192 => *4Byte = 183*f80ad8b4SAndroid Build Coastguard Worker * 32768 Bytes 184*f80ad8b4SAndroid Build Coastguard Worker */ 185*f80ad8b4SAndroid Build Coastguard Worker 186*f80ad8b4SAndroid Build Coastguard Worker /* organisation is 64 channelfader in a continuous memory block */ 187*f80ad8b4SAndroid Build Coastguard Worker /* equivalent to hardware definition, maybe for future feature of mmap of 188*f80ad8b4SAndroid Build Coastguard Worker * them 189*f80ad8b4SAndroid Build Coastguard Worker */ 190*f80ad8b4SAndroid Build Coastguard Worker /* each of 64 outputs has 64 infader and 64 outfader: 191*f80ad8b4SAndroid Build Coastguard Worker Ins to Outs mixer[out].in[in], Outstreams to Outs mixer[out].pb[pb] */ 192*f80ad8b4SAndroid Build Coastguard Worker 193*f80ad8b4SAndroid Build Coastguard Worker #define HDSPM_MIXER_CHANNELS HDSPM_MAX_CHANNELS 194*f80ad8b4SAndroid Build Coastguard Worker 195*f80ad8b4SAndroid Build Coastguard Worker struct hdspm_channelfader { 196*f80ad8b4SAndroid Build Coastguard Worker unsigned int in[HDSPM_MIXER_CHANNELS]; 197*f80ad8b4SAndroid Build Coastguard Worker unsigned int pb[HDSPM_MIXER_CHANNELS]; 198*f80ad8b4SAndroid Build Coastguard Worker }; 199*f80ad8b4SAndroid Build Coastguard Worker 200*f80ad8b4SAndroid Build Coastguard Worker struct hdspm_mixer { 201*f80ad8b4SAndroid Build Coastguard Worker struct hdspm_channelfader ch[HDSPM_MIXER_CHANNELS]; 202*f80ad8b4SAndroid Build Coastguard Worker }; 203*f80ad8b4SAndroid Build Coastguard Worker 204*f80ad8b4SAndroid Build Coastguard Worker struct hdspm_mixer_ioctl { 205*f80ad8b4SAndroid Build Coastguard Worker struct hdspm_mixer *mixer; 206*f80ad8b4SAndroid Build Coastguard Worker }; 207*f80ad8b4SAndroid Build Coastguard Worker 208*f80ad8b4SAndroid Build Coastguard Worker /* use indirect access due to the limit of ioctl bit size */ 209*f80ad8b4SAndroid Build Coastguard Worker #define SNDRV_HDSPM_IOCTL_GET_MIXER _IOR('H', 0x44, struct hdspm_mixer_ioctl) 210*f80ad8b4SAndroid Build Coastguard Worker 211*f80ad8b4SAndroid Build Coastguard Worker #endif 212