1*f80ad8b4SAndroid Build Coastguard Worker /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2*f80ad8b4SAndroid Build Coastguard Worker /* 3*f80ad8b4SAndroid Build Coastguard Worker * pci.h 4*f80ad8b4SAndroid Build Coastguard Worker * 5*f80ad8b4SAndroid Build Coastguard Worker * PCI defines and function prototypes 6*f80ad8b4SAndroid Build Coastguard Worker * Copyright 1994, Drew Eckhardt 7*f80ad8b4SAndroid Build Coastguard Worker * Copyright 1997--1999 Martin Mares <[email protected]> 8*f80ad8b4SAndroid Build Coastguard Worker * 9*f80ad8b4SAndroid Build Coastguard Worker * For more information, please consult the following manuals (look at 10*f80ad8b4SAndroid Build Coastguard Worker * http://www.pcisig.com/ for how to get them): 11*f80ad8b4SAndroid Build Coastguard Worker * 12*f80ad8b4SAndroid Build Coastguard Worker * PCI BIOS Specification 13*f80ad8b4SAndroid Build Coastguard Worker * PCI Local Bus Specification 14*f80ad8b4SAndroid Build Coastguard Worker * PCI to PCI Bridge Specification 15*f80ad8b4SAndroid Build Coastguard Worker * PCI System Design Guide 16*f80ad8b4SAndroid Build Coastguard Worker */ 17*f80ad8b4SAndroid Build Coastguard Worker 18*f80ad8b4SAndroid Build Coastguard Worker #ifndef _UAPILINUX_PCI_H 19*f80ad8b4SAndroid Build Coastguard Worker #define _UAPILINUX_PCI_H 20*f80ad8b4SAndroid Build Coastguard Worker 21*f80ad8b4SAndroid Build Coastguard Worker #include <linux/pci_regs.h> /* The pci register defines */ 22*f80ad8b4SAndroid Build Coastguard Worker 23*f80ad8b4SAndroid Build Coastguard Worker /* 24*f80ad8b4SAndroid Build Coastguard Worker * The PCI interface treats multi-function devices as independent 25*f80ad8b4SAndroid Build Coastguard Worker * devices. The slot/function address of each device is encoded 26*f80ad8b4SAndroid Build Coastguard Worker * in a single byte as follows: 27*f80ad8b4SAndroid Build Coastguard Worker * 28*f80ad8b4SAndroid Build Coastguard Worker * 7:3 = slot 29*f80ad8b4SAndroid Build Coastguard Worker * 2:0 = function 30*f80ad8b4SAndroid Build Coastguard Worker */ 31*f80ad8b4SAndroid Build Coastguard Worker #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) 32*f80ad8b4SAndroid Build Coastguard Worker #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) 33*f80ad8b4SAndroid Build Coastguard Worker #define PCI_FUNC(devfn) ((devfn) & 0x07) 34*f80ad8b4SAndroid Build Coastguard Worker 35*f80ad8b4SAndroid Build Coastguard Worker /* Ioctls for /proc/bus/pci/X/Y nodes. */ 36*f80ad8b4SAndroid Build Coastguard Worker #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8) 37*f80ad8b4SAndroid Build Coastguard Worker #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */ 38*f80ad8b4SAndroid Build Coastguard Worker #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */ 39*f80ad8b4SAndroid Build Coastguard Worker #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */ 40*f80ad8b4SAndroid Build Coastguard Worker #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */ 41*f80ad8b4SAndroid Build Coastguard Worker 42*f80ad8b4SAndroid Build Coastguard Worker #endif /* _UAPILINUX_PCI_H */ 43