1 /*
2 * Copyright © 2016 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23 #include "igt.h"
24 #include "igt_debugfs.h"
25 #include "igt_aux.h"
26 #include "igt_kmod.h"
27 #include "igt_sysfs.h"
28 #include "igt_core.h"
29
30 #include <dirent.h>
31 #include <sys/utsname.h>
32 #include <linux/limits.h>
33 #include <signal.h>
34 #include <libgen.h>
35 #include <signal.h>
36 #include <sys/ioctl.h>
37 #include <fcntl.h>
38
39
40 #define LOCAL_I915_EXEC_BSD_SHIFT (13)
41 #define LOCAL_I915_EXEC_BSD_MASK (3 << LOCAL_I915_EXEC_BSD_SHIFT)
42
43 #define ENGINE_MASK (I915_EXEC_RING_MASK | LOCAL_I915_EXEC_BSD_MASK)
44
store_dword(int fd,unsigned ring)45 static void store_dword(int fd, unsigned ring)
46 {
47 const int gen = intel_gen(intel_get_drm_devid(fd));
48 struct drm_i915_gem_exec_object2 obj[2];
49 struct drm_i915_gem_relocation_entry reloc;
50 struct drm_i915_gem_execbuffer2 execbuf;
51 uint32_t batch[16];
52 int i;
53
54 if (!gem_can_store_dword(fd, ring))
55 return;
56
57 if (!gem_has_ring(fd, ring))
58 return;
59
60 intel_detect_and_clear_missed_interrupts(fd);
61 memset(&execbuf, 0, sizeof(execbuf));
62 execbuf.buffers_ptr = (uintptr_t)obj;
63 execbuf.buffer_count = 2;
64 execbuf.flags = ring;
65 if (gen < 6)
66 execbuf.flags |= I915_EXEC_SECURE;
67
68 memset(obj, 0, sizeof(obj));
69 obj[0].handle = gem_create(fd, 4096);
70 obj[1].handle = gem_create(fd, 4096);
71
72 memset(&reloc, 0, sizeof(reloc));
73 reloc.target_handle = obj[0].handle;
74 reloc.presumed_offset = 0;
75 reloc.offset = sizeof(uint32_t);
76 reloc.delta = 0;
77 reloc.read_domains = I915_GEM_DOMAIN_INSTRUCTION;
78 reloc.write_domain = I915_GEM_DOMAIN_INSTRUCTION;
79 obj[1].relocs_ptr = (uintptr_t)&reloc;
80 obj[1].relocation_count = 1;
81
82 i = 0;
83 batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
84 if (gen >= 8) {
85 batch[++i] = 0;
86 batch[++i] = 0;
87 } else if (gen >= 4) {
88 batch[++i] = 0;
89 batch[++i] = 0;
90 reloc.offset += sizeof(uint32_t);
91 } else {
92 batch[i]--;
93 batch[++i] = 0;
94 }
95 batch[++i] = 0xc0ffee;
96 batch[++i] = MI_BATCH_BUFFER_END;
97 gem_write(fd, obj[1].handle, 0, batch, sizeof(batch));
98 gem_execbuf(fd, &execbuf);
99 gem_close(fd, obj[1].handle);
100
101 gem_read(fd, obj[0].handle, 0, batch, sizeof(batch));
102 gem_close(fd, obj[0].handle);
103 igt_assert_eq(*batch, 0xc0ffee);
104 igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
105 }
106
store_all(int fd)107 static void store_all(int fd)
108 {
109 const int gen = intel_gen(intel_get_drm_devid(fd));
110 struct drm_i915_gem_exec_object2 obj[2];
111 struct drm_i915_gem_relocation_entry reloc[32];
112 struct drm_i915_gem_execbuffer2 execbuf;
113 unsigned engines[16], permuted[16];
114 uint32_t batch[16];
115 uint64_t offset;
116 unsigned engine, nengine;
117 int value;
118 int i, j;
119
120 if (!gem_can_store_dword(fd, 0))
121 return;
122
123 memset(&execbuf, 0, sizeof(execbuf));
124 execbuf.buffers_ptr = (uintptr_t)obj;
125 execbuf.buffer_count = 2;
126 if (gen < 6)
127 execbuf.flags |= I915_EXEC_SECURE;
128
129 memset(reloc, 0, sizeof(reloc));
130 memset(obj, 0, sizeof(obj));
131 obj[0].handle = gem_create(fd, 4096);
132 obj[1].handle = gem_create(fd, 4096);
133 obj[1].relocation_count = 1;
134
135 offset = sizeof(uint32_t);
136 i = 0;
137 batch[i] = MI_STORE_DWORD_IMM | (gen < 6 ? 1 << 22 : 0);
138 if (gen >= 8) {
139 batch[++i] = 0;
140 batch[++i] = 0;
141 } else if (gen >= 4) {
142 batch[++i] = 0;
143 batch[++i] = 0;
144 offset += sizeof(uint32_t);
145 } else {
146 batch[i]--;
147 batch[++i] = 0;
148 }
149 batch[value = ++i] = 0xc0ffee;
150 batch[++i] = MI_BATCH_BUFFER_END;
151
152 nengine = 0;
153 intel_detect_and_clear_missed_interrupts(fd);
154 for_each_engine(fd, engine) {
155 if (!gem_can_store_dword(fd, engine))
156 continue;
157
158 igt_assert(2*(nengine+1)*sizeof(batch) <= 4096);
159
160 execbuf.flags &= ~ENGINE_MASK;
161 execbuf.flags |= engine;
162
163 j = 2*nengine;
164 reloc[j].target_handle = obj[0].handle;
165 reloc[j].presumed_offset = ~0;
166 reloc[j].offset = j*sizeof(batch) + offset;
167 reloc[j].delta = nengine*sizeof(uint32_t);
168 reloc[j].read_domains = I915_GEM_DOMAIN_INSTRUCTION;
169 reloc[j].write_domain = I915_GEM_DOMAIN_INSTRUCTION;
170 obj[1].relocs_ptr = (uintptr_t)&reloc[j];
171
172 batch[value] = 0xdeadbeef;
173 gem_write(fd, obj[1].handle, j*sizeof(batch),
174 batch, sizeof(batch));
175 execbuf.batch_start_offset = j*sizeof(batch);
176 gem_execbuf(fd, &execbuf);
177
178 j = 2*nengine + 1;
179 reloc[j].target_handle = obj[0].handle;
180 reloc[j].presumed_offset = ~0;
181 reloc[j].offset = j*sizeof(batch) + offset;
182 reloc[j].delta = nengine*sizeof(uint32_t);
183 reloc[j].read_domains = I915_GEM_DOMAIN_INSTRUCTION;
184 reloc[j].write_domain = I915_GEM_DOMAIN_INSTRUCTION;
185 obj[1].relocs_ptr = (uintptr_t)&reloc[j];
186
187 batch[value] = nengine;
188 gem_write(fd, obj[1].handle, j*sizeof(batch),
189 batch, sizeof(batch));
190 execbuf.batch_start_offset = j*sizeof(batch);
191 gem_execbuf(fd, &execbuf);
192
193 engines[nengine++] = engine;
194 }
195 gem_sync(fd, obj[1].handle);
196
197 for (i = 0; i < nengine; i++) {
198 obj[1].relocs_ptr = (uintptr_t)&reloc[2*i];
199 execbuf.batch_start_offset = 2*i*sizeof(batch);
200 memcpy(permuted, engines, nengine*sizeof(engines[0]));
201 igt_permute_array(permuted, nengine, igt_exchange_int);
202 for (j = 0; j < nengine; j++) {
203 execbuf.flags &= ~ENGINE_MASK;
204 execbuf.flags |= permuted[j];
205 gem_execbuf(fd, &execbuf);
206 }
207 obj[1].relocs_ptr = (uintptr_t)&reloc[2*i+1];
208 execbuf.batch_start_offset = (2*i+1)*sizeof(batch);
209 execbuf.flags &= ~ENGINE_MASK;
210 execbuf.flags |= engines[i];
211 gem_execbuf(fd, &execbuf);
212 }
213 gem_close(fd, obj[1].handle);
214
215 gem_read(fd, obj[0].handle, 0, engines, sizeof(engines));
216 gem_close(fd, obj[0].handle);
217
218 for (i = 0; i < nengine; i++)
219 igt_assert_eq_u32(engines[i], i);
220 igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);
221 }
222
open_parameters(const char * module_name)223 static int open_parameters(const char *module_name)
224 {
225 char path[256];
226
227 snprintf(path, sizeof(path), "/sys/module/%s/parameters", module_name);
228 return open(path, O_RDONLY);
229 }
230
231 static int
inject_fault(const char * module_name,const char * opt,int fault)232 inject_fault(const char *module_name, const char *opt, int fault)
233 {
234 char buf[1024];
235 int dir;
236
237 igt_assert(fault > 0);
238 snprintf(buf, sizeof(buf), "%s=%d", opt, fault);
239
240 if (igt_kmod_load(module_name, buf)) {
241 igt_warn("Failed to load module '%s' with options '%s'\n",
242 module_name, buf);
243 return 1;
244 }
245
246 dir = open_parameters(module_name);
247 igt_sysfs_scanf(dir, opt, "%d", &fault);
248 close(dir);
249
250 igt_debug("Loaded '%s %s', result=%d\n", module_name, buf, fault);
251
252 if (strcmp(module_name, "i915")) /* XXX better ideas! */
253 igt_kmod_unload(module_name, 0);
254 else
255 igt_i915_driver_unload();
256
257 return fault;
258 }
259
260 static void
gem_sanitycheck(void)261 gem_sanitycheck(void)
262 {
263 int err = 0;
264 int fd;
265 struct drm_i915_gem_caching args = {};
266
267
268 fd = __drm_open_driver(DRIVER_INTEL);
269 igt_set_timeout(1, "Module reload timeout!");
270
271 if (ioctl(fd, DRM_IOCTL_I915_GEM_SET_CACHING, &args) < 0)
272 err = -errno;
273
274 igt_set_timeout(0, NULL);
275 close(fd);
276
277 igt_assert_eq(err, -ENOENT);
278 }
279
280 static void
gem_exec_store(void)281 gem_exec_store(void)
282 {
283 int fd;
284 const struct intel_execution_engine *e;
285
286 fd = __drm_open_driver(DRIVER_INTEL);
287 igt_fork_hang_detector(fd);
288
289 for (e = intel_execution_engines; e->name; e++) {
290 if (gem_can_store_dword(fd, e->exec_id | e->flags))
291 store_dword(fd, e->exec_id | e->flags);
292 }
293
294 store_all(fd);
295
296 igt_stop_hang_detector();
297 close(fd);
298 }
299
300 static void
hda_dynamic_debug(bool enable)301 hda_dynamic_debug(bool enable)
302 {
303 FILE *fp;
304 const char snd_hda_intel_on[] = "module snd_hda_intel +pf";
305 const char snd_hda_core_on[] = "module snd_hda_core +pf";
306
307 const char snd_hda_intel_off[] = "module snd_hda_core =_";
308 const char snd_hda_core_off[] = "module snd_hda_intel =_";
309
310 fp = fopen("/sys/kernel/debug/dynamic_debug/control", "w");
311 if (!fp) {
312 igt_debug("hda dynamic debug not available\n");
313 return;
314 }
315
316 if (enable) {
317 fwrite(snd_hda_intel_on, 1, sizeof(snd_hda_intel_on), fp);
318 fwrite(snd_hda_core_on, 1, sizeof(snd_hda_core_on), fp);
319 } else {
320 fwrite(snd_hda_intel_off, 1, sizeof(snd_hda_intel_off), fp);
321 fwrite(snd_hda_core_off, 1, sizeof(snd_hda_core_off), fp);
322 }
323
324 fclose(fp);
325 }
326
327 igt_main
328 {
329 igt_subtest("reload") {
330 int load_error;
331
332 igt_i915_driver_unload();
333
334 hda_dynamic_debug(true);
335 load_error = igt_i915_driver_load(NULL);
336 hda_dynamic_debug(false);
337
338 igt_assert_eq(load_error, 0);
339
340 gem_sanitycheck();
341 gem_exec_store();
342
343 /* only default modparams, can leave module loaded */
344 }
345
346 igt_subtest("reload-no-display") {
347 igt_i915_driver_unload();
348
349 igt_assert_eq(igt_i915_driver_load("disable_display=1"), 0);
350
351 igt_i915_driver_unload();
352 }
353
354 igt_subtest("reload-with-fault-injection") {
355 int i = 0;
356
357 igt_i915_driver_unload();
358
359 while (inject_fault("i915", "inject_load_failure", ++i) == 0)
360 ;
361
362 /* We expect to hit at least one fault! */
363 igt_assert(i > 1);
364
365 /* inject_fault() leaves the module unloaded */
366 }
367
368 /* Subtests should unload the module themselves if they use modparams */
369 }
370