xref: /aosp_15_r20/external/igt-gpu-tools/tests/i915/gem_close_race.c (revision d83cc019efdc2edc6c4b16e9034a3ceb8d35d77c)
1 /*
2  * Copyright © 2013 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  *
23  * Authors:
24  *    Chris Wilson <[email protected]>
25  *
26  */
27 
28 #include "igt.h"
29 #include <pthread.h>
30 #include <unistd.h>
31 #include <signal.h>
32 #include <stdlib.h>
33 #include <stdint.h>
34 #include <stdio.h>
35 #include <string.h>
36 #include <fcntl.h>
37 #include <inttypes.h>
38 #include <errno.h>
39 #include <sys/stat.h>
40 #include <sys/ioctl.h>
41 #include <sys/time.h>
42 #include <sys/syscall.h>
43 #include "drm.h"
44 
45 #define OBJECT_SIZE (256 * 1024)
46 
47 #define COPY_BLT_CMD		(2<<29|0x53<<22|0x6)
48 #define BLT_WRITE_ALPHA		(1<<21)
49 #define BLT_WRITE_RGB		(1<<20)
50 
51 static uint32_t devid;
52 static bool has_64bit_relocations;
53 
54 #define sigev_notify_thread_id _sigev_un._tid
55 
selfcopy(int fd,uint32_t handle,int loops)56 static void selfcopy(int fd, uint32_t handle, int loops)
57 {
58 	struct drm_i915_gem_relocation_entry reloc[2];
59 	struct drm_i915_gem_exec_object2 gem_exec[2];
60 	struct drm_i915_gem_execbuffer2 execbuf;
61 	struct drm_i915_gem_pwrite gem_pwrite;
62 	struct drm_i915_gem_create create;
63 	uint32_t buf[16], *b = buf;
64 
65 	memset(reloc, 0, sizeof(reloc));
66 
67 	*b = COPY_BLT_CMD | BLT_WRITE_ALPHA | BLT_WRITE_RGB;
68 	if (has_64bit_relocations)
69 		*b += 2;
70 	b++;
71 	*b++ = 0xcc << 16 | 1 << 25 | 1 << 24 | (4*1024);
72 	*b++ = 0;
73 	*b++ = 1 << 16 | 1024;
74 
75 	reloc[0].offset = (b - buf) * sizeof(*b);
76 	reloc[0].target_handle = handle;
77 	reloc[0].read_domains = I915_GEM_DOMAIN_RENDER;
78 	reloc[0].write_domain = I915_GEM_DOMAIN_RENDER;
79 	*b++ = 0;
80 	if (has_64bit_relocations)
81 		*b++ = 0;
82 
83 	*b++ = 512 << 16;
84 	*b++ = 4*1024;
85 
86 	reloc[1].offset = (b - buf) * sizeof(*b);
87 	reloc[1].target_handle = handle;
88 	reloc[1].read_domains = I915_GEM_DOMAIN_RENDER;
89 	reloc[1].write_domain = 0;
90 	*b++ = 0;
91 	if (has_64bit_relocations)
92 		*b++ = 0;
93 
94 	*b++ = MI_BATCH_BUFFER_END;
95 	*b++ = 0;
96 
97 	memset(gem_exec, 0, sizeof(gem_exec));
98 	gem_exec[0].handle = handle;
99 
100 	memset(&create, 0, sizeof(create));
101 	create.handle = 0;
102 	create.size = 4096;
103 	drmIoctl(fd, DRM_IOCTL_I915_GEM_CREATE, &create);
104 	gem_exec[1].handle = create.handle;
105 	gem_exec[1].relocation_count = 2;
106 	gem_exec[1].relocs_ptr = to_user_pointer(reloc);
107 
108 	memset(&execbuf, 0, sizeof(execbuf));
109 	execbuf.buffers_ptr = to_user_pointer(gem_exec);
110 	execbuf.buffer_count = 2;
111 	execbuf.batch_len = (b - buf) * sizeof(*b);
112 	if (HAS_BLT_RING(devid))
113 		execbuf.flags |= I915_EXEC_BLT;
114 
115 	memset(&gem_pwrite, 0, sizeof(gem_pwrite));
116 	gem_pwrite.handle = create.handle;
117 	gem_pwrite.offset = 0;
118 	gem_pwrite.size = sizeof(buf);
119 	gem_pwrite.data_ptr = to_user_pointer(buf);
120 	if (drmIoctl(fd, DRM_IOCTL_I915_GEM_PWRITE, &gem_pwrite) == 0) {
121 		while (loops-- && __gem_execbuf(fd, &execbuf) == 0)
122 			;
123 	}
124 
125 	drmIoctl(fd, DRM_IOCTL_GEM_CLOSE, &create.handle);
126 }
127 
load(int fd)128 static uint32_t load(int fd)
129 {
130 	uint32_t handle;
131 
132 	handle = gem_create(fd, OBJECT_SIZE);
133 	if (handle == 0)
134 		return 0;
135 
136 	selfcopy(fd, handle, 100);
137 	return handle;
138 }
139 
process(int child)140 static void process(int child)
141 {
142 	uint32_t handle;
143 	int fd;
144 
145 	fd = drm_open_driver(DRIVER_INTEL);
146 
147 	handle = load(fd);
148 	if ((child & 63) == 63)
149 		gem_read(fd, handle, 0, &handle, sizeof(handle));
150 
151 	gem_quiescent_gpu(fd);
152 }
153 
154 struct crashme {
155 	int fd;
156 } crashme;
157 
crashme_now(int sig)158 static void crashme_now(int sig)
159 {
160 	close(crashme.fd);
161 }
162 
163 #define usec(x) (1000*(x))
164 #define msec(x) usec(1000*(x))
165 
threads(int timeout)166 static void threads(int timeout)
167 {
168 	struct sigevent sev;
169 	struct sigaction act;
170 	struct drm_gem_open name;
171 	struct itimerspec its;
172 	timer_t timer;
173 	int fd;
174 
175 	memset(&act, 0, sizeof(act));
176 	act.sa_handler = crashme_now;
177 	igt_assert(sigaction(SIGRTMIN, &act, NULL) == 0);
178 
179 	memset(&sev, 0, sizeof(sev));
180 	sev.sigev_notify = SIGEV_SIGNAL | SIGEV_THREAD_ID;
181 	sev.sigev_notify_thread_id = gettid();
182 	sev.sigev_signo = SIGRTMIN;
183 	igt_assert(timer_create(CLOCK_MONOTONIC, &sev, &timer) == 0);
184 
185 	fd = drm_open_driver(DRIVER_INTEL);
186 	name.name = gem_flink(fd, gem_create(fd, OBJECT_SIZE));
187 
188 	igt_until_timeout(timeout) {
189 		crashme.fd = drm_open_driver(DRIVER_INTEL);
190 
191 		memset(&its, 0, sizeof(its));
192 		its.it_value.tv_nsec = msec(1) + (rand() % msec(10));
193 		igt_assert(timer_settime(timer, 0, &its, NULL) == 0);
194 
195 		do {
196 			if (drmIoctl(crashme.fd, DRM_IOCTL_GEM_OPEN, &name))
197 				break;
198 
199 			selfcopy(crashme.fd, name.handle, 100);
200 			drmIoctl(crashme.fd, DRM_IOCTL_GEM_CLOSE, &name.handle);
201 		} while (1);
202 
203 		close(crashme.fd);
204 	}
205 
206 	timer_delete(timer);
207 
208 	gem_quiescent_gpu(fd);
209 	close(fd);
210 }
211 
212 igt_main
213 {
214 	igt_fixture {
215 		int fd;
216 
217 		fd = drm_open_driver(DRIVER_INTEL);
218 		igt_require_gem(fd);
219 
220 		devid = intel_get_drm_devid(fd);
221 		has_64bit_relocations = intel_gen(devid) >= 8;
222 
223 		igt_fork_hang_detector(fd);
224 		close(fd);
225 	}
226 
227 	igt_subtest("basic-process") {
228 		igt_fork(child, 1)
229 			process(child);
230 		igt_waitchildren();
231 	}
232 
233 	igt_subtest("basic-threads")
234 		threads(1);
235 
236 	igt_subtest("process-exit") {
237 		igt_fork(child, 768)
238 			process(child);
239 		igt_waitchildren();
240 	}
241 
242 	igt_subtest("gem-close-race")
243 		threads(150);
244 
245 	igt_fixture
246 	    igt_stop_hang_detector();
247 }
248