xref: /aosp_15_r20/external/igt-gpu-tools/tests/i915/gem_bad_reloc.c (revision d83cc019efdc2edc6c4b16e9034a3ceb8d35d77c)
1 /*
2  * Copyright © 2014 Intel Corporation
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  *
23  * Authors:
24  *    Chris Wilson <[email protected]>
25  *
26  */
27 
28 #include "igt.h"
29 #include <unistd.h>
30 #include <stdlib.h>
31 #include <stdint.h>
32 #include <stdio.h>
33 #include <string.h>
34 #include <fcntl.h>
35 #include <inttypes.h>
36 #include <errno.h>
37 #include <sys/stat.h>
38 #include <sys/ioctl.h>
39 #include <sys/time.h>
40 #include "drm.h"
41 
42 IGT_TEST_DESCRIPTION("Simulates SNA behaviour using negative self-relocations"
43 		     " for STATE_BASE_ADDRESS command packets.");
44 
45 #define USE_LUT (1 << 12)
46 #define BIAS (256*1024)
47 
48 /* Simulates SNA behaviour using negative self-relocations for
49  * STATE_BASE_ADDRESS command packets. If they wrap around (to values greater
50  * than the total size of the GTT), the GPU will hang.
51  * See https://bugs.freedesktop.org/show_bug.cgi?id=78533
52  */
negative_reloc(int fd,unsigned engine,unsigned flags)53 static void negative_reloc(int fd, unsigned engine, unsigned flags)
54 {
55 	struct drm_i915_gem_execbuffer2 execbuf;
56 	struct drm_i915_gem_exec_object2 obj;
57 	struct drm_i915_gem_relocation_entry reloc[1000];
58 	uint64_t gtt_max = gem_aperture_size(fd);
59 	uint32_t bbe = MI_BATCH_BUFFER_END;
60 	uint64_t *offsets;
61 	int i;
62 
63 	gem_require_ring(fd, engine);
64 	igt_require(intel_gen(intel_get_drm_devid(fd)) >= 7);
65 
66 	memset(&obj, 0, sizeof(obj));
67 	obj.handle = gem_create(fd, 8192);
68 	gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
69 
70 	memset(&execbuf, 0, sizeof(execbuf));
71 	execbuf.buffers_ptr = (uintptr_t)&obj;
72 	execbuf.buffer_count = 1;
73 	execbuf.flags = engine | (flags & USE_LUT);
74 	igt_require(__gem_execbuf(fd, &execbuf) == 0);
75 
76 	igt_info("Found offset %lld for 4k batch\n", (long long)obj.offset);
77 	/*
78 	 * Ideally we'd like to be able to control where the kernel is going to
79 	 * place the buffer. We don't SKIP here because it causes the test
80 	 * to "randomly" flip-flop between the SKIP and PASS states.
81 	 */
82 	if (obj.offset < BIAS) {
83 		igt_info("Offset is below BIAS, not testing anything\n");
84 		return;
85 	}
86 
87 	memset(reloc, 0, sizeof(reloc));
88 	for (i = 0; i < ARRAY_SIZE(reloc); i++) {
89 		reloc[i].offset = 8 + 8*i;
90 		reloc[i].delta = -BIAS*i/1024;
91 		reloc[i].presumed_offset = -1;
92 		reloc[i].target_handle = flags & USE_LUT ? 0 : obj.handle;
93 		reloc[i].read_domains = I915_GEM_DOMAIN_COMMAND;
94 	}
95 	obj.relocation_count = i;
96 	obj.relocs_ptr = (uintptr_t)reloc;
97 	gem_execbuf(fd, &execbuf);
98 
99 	igt_info("Batch is now at offset %#llx, max GTT %#llx\n",
100 		 (long long)obj.offset, (long long)gtt_max);
101 
102 	offsets = gem_mmap__cpu(fd, obj.handle, 0, 8192, PROT_READ);
103 	gem_set_domain(fd, obj.handle, I915_GEM_DOMAIN_CPU, 0);
104 	gem_close(fd, obj.handle);
105 
106 	for (i = 0; i < ARRAY_SIZE(reloc); i++)
107 		igt_assert_f(offsets[1 + i] < gtt_max,
108 			     "Offset[%d]=%#llx, expected less than %#llx\n",
109 			     i, (long long)offsets[i+i], (long long)gtt_max);
110 	munmap(offsets, 8192);
111 }
112 
negative_reloc_blt(int fd)113 static void negative_reloc_blt(int fd)
114 {
115 	const int gen = intel_gen(intel_get_drm_devid(fd));
116 	struct drm_i915_gem_execbuffer2 execbuf;
117 	struct drm_i915_gem_exec_object2 obj[1024][2];
118 	struct drm_i915_gem_relocation_entry reloc;
119 	uint32_t buf[1024], *b;
120 	int i;
121 
122 	memset(&reloc, 0, sizeof(reloc));
123 	reloc.offset = 4 * sizeof(uint32_t);
124 	reloc.presumed_offset = ~0ULL;
125 	reloc.delta = -4096;
126 	reloc.target_handle = 0;
127 	reloc.read_domains = I915_GEM_DOMAIN_RENDER;
128 	reloc.write_domain = I915_GEM_DOMAIN_RENDER;
129 
130 	for (i = 0; i < 1024; i++) {
131 		memset(obj[i], 0, sizeof(obj[i]));
132 
133 		obj[i][0].handle = gem_create(fd, 4096);
134 		obj[i][0].flags = EXEC_OBJECT_NEEDS_FENCE;
135 
136 		b = buf;
137 		*b++ = XY_COLOR_BLT_CMD_NOLEN |
138 			((gen >= 8) ? 5 : 4) |
139 			COLOR_BLT_WRITE_ALPHA | XY_COLOR_BLT_WRITE_RGB;
140 		*b++ = 0xf0 << 16 | 1 << 25 | 1 << 24 | 4096;
141 		*b++ = 1 << 16 | 0;
142 		*b++ = 2 << 16 | 1024;
143 		*b++ = ~0;
144 		if (gen >= 8)
145 			*b++ = ~0;
146 		*b++ = 0xc0ffee ^ i;
147 		*b++ = MI_BATCH_BUFFER_END;
148 		if ((b - buf) & 1)
149 			*b++ = 0;
150 
151 		obj[i][1].handle = gem_create(fd, 4096);
152 		gem_write(fd, obj[i][1].handle, 0, buf, (b - buf) * sizeof(uint32_t));
153 		obj[i][1].relocation_count = 1;
154 		obj[i][1].relocs_ptr = (uintptr_t)&reloc;
155 	}
156 
157 	memset(&execbuf, 0, sizeof(execbuf));
158 	execbuf.buffer_count = 2;
159 	execbuf.batch_len = (b - buf) * sizeof(uint32_t);
160 	execbuf.flags = USE_LUT;
161 	if (gen >= 6)
162 		execbuf.flags |= I915_EXEC_BLT;
163 
164 	for (i = 0; i < 1024; i++) {
165 		execbuf.buffers_ptr = (uintptr_t)obj[i];
166 		gem_execbuf(fd, &execbuf);
167 	}
168 
169 	for (i = 1024; i--;) {
170 		gem_read(fd, obj[i][0].handle,
171 			 i*sizeof(uint32_t), buf + i, sizeof(uint32_t));
172 		gem_close(fd, obj[i][0].handle);
173 		gem_close(fd, obj[i][1].handle);
174 	}
175 
176 	if (0) {
177 		for (i = 0; i < 1024; i += 8)
178 			igt_info("%08x %08x %08x %08x %08x %08x %08x %08x\n",
179 				 buf[i + 0], buf[i + 1], buf[i + 2], buf[i + 3],
180 				 buf[i + 4], buf[i + 5], buf[i + 6], buf[i + 7]);
181 	}
182 	for (i = 0; i < 1024; i++)
183 		igt_assert_eq(buf[i], 0xc0ffee ^ i);
184 }
185 
186 igt_main
187 {
188 	const struct intel_execution_engine *e;
189 	int fd = -1;
190 
191 	igt_fixture {
192 		fd = drm_open_driver(DRIVER_INTEL);
193 		igt_require_gem(fd);
194 	}
195 
196 	for (e = intel_execution_engines; e->name; e++) {
197 		igt_subtest_f("negative-reloc-%s", e->name)
198 			negative_reloc(fd, e->exec_id | e->flags, 0);
199 
200 		igt_subtest_f("negative-reloc-lut-%s", e->name)
201 			negative_reloc(fd, e->exec_id | e->flags, USE_LUT);
202 	}
203 
204 	igt_subtest("negative-reloc-bltcopy")
205 		negative_reloc_blt(fd);
206 
207 	igt_fixture
208 		close(fd);
209 }
210