xref: /aosp_15_r20/external/flashrom/cros_ec_commands.h (revision 0d6140be3aa665ecc836e8907834fcd3e3b018fc)
1 /* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
2  * Use of this source code is governed by a BSD-style license that can be
3  * found in the LICENSE file.
4  */
5 
6 /* Host communication command constants for Chrome EC */
7 
8 #ifndef __CROS_EC_EC_COMMANDS_H
9 #define __CROS_EC_EC_COMMANDS_H
10 
11 #if !defined(__ACPI__) && !defined(__KERNEL__)
12 #include <stdint.h>
13 #endif
14 
15 /*
16  * Include common.h for CONFIG_HOSTCMD_ALIGNED, if it's defined. This
17  * generates more efficient code for accessing request/response structures on
18  * ARM Cortex-M if the structures are guaranteed 32-bit aligned.
19  */
20 #ifdef CHROMIUM_EC
21 #include "common.h"
22 #endif
23 
24 /*
25  * Current version of this protocol
26  *
27  * TODO(crosbug.com/p/11223): This is effectively useless; protocol is
28  * determined in other ways.  Remove this once the kernel code no longer
29  * depends on it.
30  */
31 #define EC_PROTO_VERSION          0x00000002
32 
33 /* Command version mask */
34 #define EC_VER_MASK(version) (1UL << (version))
35 
36 /* I/O addresses for ACPI commands */
37 #define EC_LPC_ADDR_ACPI_DATA  0x62
38 #define EC_LPC_ADDR_ACPI_CMD   0x66
39 
40 /* I/O addresses for host command */
41 #define EC_LPC_ADDR_HOST_DATA  0x200
42 #define EC_LPC_ADDR_HOST_CMD   0x204
43 
44 /* I/O addresses for host command args and params */
45 /* Protocol version 2 */
46 #define EC_LPC_ADDR_HOST_ARGS    0x800  /* And 0x801, 0x802, 0x803 */
47 #define EC_LPC_ADDR_HOST_PARAM   0x804  /* For version 2 params; size is
48 					 * EC_PROTO2_MAX_PARAM_SIZE */
49 /* Protocol version 3 */
50 #define EC_LPC_ADDR_HOST_PACKET  0x800  /* Offset of version 3 packet */
51 #define EC_LPC_HOST_PACKET_SIZE  0x100  /* Max size of version 3 packet */
52 
53 /* The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
54  * and they tell the kernel that so we have to think of it as two parts. */
55 #define EC_HOST_CMD_REGION0    0x800
56 #define EC_HOST_CMD_REGION1    0x880
57 #define EC_HOST_CMD_REGION_SIZE 0x80
58 
59 /* EC command register bit functions */
60 #define EC_LPC_CMDR_DATA	(1 << 0)  /* Data ready for host to read */
61 #define EC_LPC_CMDR_PENDING	(1 << 1)  /* Write pending to EC */
62 #define EC_LPC_CMDR_BUSY	(1 << 2)  /* EC is busy processing a command */
63 #define EC_LPC_CMDR_CMD		(1 << 3)  /* Last host write was a command */
64 #define EC_LPC_CMDR_ACPI_BRST	(1 << 4)  /* Burst mode (not used) */
65 #define EC_LPC_CMDR_SCI		(1 << 5)  /* SCI event is pending */
66 #define EC_LPC_CMDR_SMI		(1 << 6)  /* SMI event is pending */
67 
68 #define EC_LPC_ADDR_MEMMAP       0x900
69 #define EC_MEMMAP_SIZE         255 /* ACPI IO buffer max is 255 bytes */
70 #define EC_MEMMAP_TEXT_MAX     8   /* Size of a string in the memory map */
71 
72 /* The offset address of each type of data in mapped memory. */
73 #define EC_MEMMAP_TEMP_SENSOR      0x00 /* Temp sensors 0x00 - 0x0f */
74 #define EC_MEMMAP_FAN              0x10 /* Fan speeds 0x10 - 0x17 */
75 #define EC_MEMMAP_TEMP_SENSOR_B    0x18 /* More temp sensors 0x18 - 0x1f */
76 #define EC_MEMMAP_ID               0x20 /* 0x20 == 'E', 0x21 == 'C' */
77 #define EC_MEMMAP_ID_VERSION       0x22 /* Version of data in 0x20 - 0x2f */
78 #define EC_MEMMAP_THERMAL_VERSION  0x23 /* Version of data in 0x00 - 0x1f */
79 #define EC_MEMMAP_BATTERY_VERSION  0x24 /* Version of data in 0x40 - 0x7f */
80 #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */
81 #define EC_MEMMAP_EVENTS_VERSION   0x26 /* Version of data in 0x34 - 0x3f */
82 #define EC_MEMMAP_HOST_CMD_FLAGS   0x27 /* Host cmd interface flags (8 bits) */
83 /* Unused 0x28 - 0x2f */
84 #define EC_MEMMAP_SWITCHES         0x30	/* 8 bits */
85 /* Unused 0x31 - 0x33 */
86 #define EC_MEMMAP_HOST_EVENTS      0x34 /* 32 bits */
87 /* Reserve 0x38 - 0x3f for additional host event-related stuff */
88 /* Battery values are all 32 bits */
89 #define EC_MEMMAP_BATT_VOLT        0x40 /* Battery Present Voltage */
90 #define EC_MEMMAP_BATT_RATE        0x44 /* Battery Present Rate */
91 #define EC_MEMMAP_BATT_CAP         0x48 /* Battery Remaining Capacity */
92 #define EC_MEMMAP_BATT_FLAG        0x4c /* Battery State, defined below */
93 #define EC_MEMMAP_BATT_DCAP        0x50 /* Battery Design Capacity */
94 #define EC_MEMMAP_BATT_DVLT        0x54 /* Battery Design Voltage */
95 #define EC_MEMMAP_BATT_LFCC        0x58 /* Battery Last Full Charge Capacity */
96 #define EC_MEMMAP_BATT_CCNT        0x5c /* Battery Cycle Count */
97 /* Strings are all 8 bytes (EC_MEMMAP_TEXT_MAX) */
98 #define EC_MEMMAP_BATT_MFGR        0x60 /* Battery Manufacturer String */
99 #define EC_MEMMAP_BATT_MODEL       0x68 /* Battery Model Number String */
100 #define EC_MEMMAP_BATT_SERIAL      0x70 /* Battery Serial Number String */
101 #define EC_MEMMAP_BATT_TYPE        0x78 /* Battery Type String */
102 #define EC_MEMMAP_ALS              0x80 /* ALS readings in lux (2 X 16 bits) */
103 /* Unused 0x84 - 0x8f */
104 #define EC_MEMMAP_ACC_STATUS       0x90 /* Accelerometer status (8 bits )*/
105 /* Unused 0x91 */
106 #define EC_MEMMAP_ACC_DATA         0x92 /* Accelerometers data 0x92 - 0x9f */
107 /* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */
108 /* 0x94 - 0x99: 1st Accelerometer */
109 /* 0x9a - 0x9f: 2nd Accelerometer */
110 #define EC_MEMMAP_GYRO_DATA        0xa0 /* Gyroscope data 0xa0 - 0xa5 */
111 /* Unused 0xa6 - 0xdf */
112 
113 /*
114  * ACPI is unable to access memory mapped data at or above this offset due to
115  * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe
116  * which might be needed by ACPI.
117  */
118 #define EC_MEMMAP_NO_ACPI 0xe0
119 
120 /* Define the format of the accelerometer mapped memory status byte. */
121 #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK  0x0f
122 #define EC_MEMMAP_ACC_STATUS_BUSY_BIT        (1 << 4)
123 #define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT    (1 << 7)
124 
125 /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */
126 #define EC_TEMP_SENSOR_ENTRIES     16
127 /*
128  * Number of temp sensors at EC_MEMMAP_TEMP_SENSOR_B.
129  *
130  * Valid only if EC_MEMMAP_THERMAL_VERSION returns >= 2.
131  */
132 #define EC_TEMP_SENSOR_B_ENTRIES      8
133 
134 /* Special values for mapped temperature sensors */
135 #define EC_TEMP_SENSOR_NOT_PRESENT    0xff
136 #define EC_TEMP_SENSOR_ERROR          0xfe
137 #define EC_TEMP_SENSOR_NOT_POWERED    0xfd
138 #define EC_TEMP_SENSOR_NOT_CALIBRATED 0xfc
139 /*
140  * The offset of temperature value stored in mapped memory.  This allows
141  * reporting a temperature range of 200K to 454K = -73C to 181C.
142  */
143 #define EC_TEMP_SENSOR_OFFSET      200
144 
145 /*
146  * Number of ALS readings at EC_MEMMAP_ALS
147  */
148 #define EC_ALS_ENTRIES             2
149 
150 /*
151  * The default value a temperature sensor will return when it is present but
152  * has not been read this boot.  This is a reasonable number to avoid
153  * triggering alarms on the host.
154  */
155 #define EC_TEMP_SENSOR_DEFAULT     (296 - EC_TEMP_SENSOR_OFFSET)
156 
157 #define EC_FAN_SPEED_ENTRIES       4       /* Number of fans at EC_MEMMAP_FAN */
158 #define EC_FAN_SPEED_NOT_PRESENT   0xffff  /* Entry not present */
159 #define EC_FAN_SPEED_STALLED       0xfffe  /* Fan stalled */
160 
161 /* Battery bit flags at EC_MEMMAP_BATT_FLAG. */
162 #define EC_BATT_FLAG_AC_PRESENT   0x01
163 #define EC_BATT_FLAG_BATT_PRESENT 0x02
164 #define EC_BATT_FLAG_DISCHARGING  0x04
165 #define EC_BATT_FLAG_CHARGING     0x08
166 #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10
167 
168 /* Switch flags at EC_MEMMAP_SWITCHES */
169 #define EC_SWITCH_LID_OPEN               0x01
170 #define EC_SWITCH_POWER_BUTTON_PRESSED   0x02
171 #define EC_SWITCH_WRITE_PROTECT_DISABLED 0x04
172 /* Was recovery requested via keyboard; now unused. */
173 #define EC_SWITCH_IGNORE1		 0x08
174 /* Recovery requested via dedicated signal (from servo board) */
175 #define EC_SWITCH_DEDICATED_RECOVERY     0x10
176 /* Was fake developer mode switch; now unused.  Remove in next refactor. */
177 #define EC_SWITCH_IGNORE0                0x20
178 
179 /* Host command interface flags */
180 /* Host command interface supports LPC args (LPC interface only) */
181 #define EC_HOST_CMD_FLAG_LPC_ARGS_SUPPORTED  0x01
182 /* Host command interface supports version 3 protocol */
183 #define EC_HOST_CMD_FLAG_VERSION_3   0x02
184 
185 /* Wireless switch flags */
186 #define EC_WIRELESS_SWITCH_ALL       ~0x00  /* All flags */
187 #define EC_WIRELESS_SWITCH_WLAN       0x01  /* WLAN radio */
188 #define EC_WIRELESS_SWITCH_BLUETOOTH  0x02  /* Bluetooth radio */
189 #define EC_WIRELESS_SWITCH_WWAN       0x04  /* WWAN power */
190 #define EC_WIRELESS_SWITCH_WLAN_POWER 0x08  /* WLAN power */
191 
192 /*****************************************************************************/
193 /*
194  * ACPI commands
195  *
196  * These are valid ONLY on the ACPI command/data port.
197  */
198 
199 /*
200  * ACPI Read Embedded Controller
201  *
202  * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
203  *
204  * Use the following sequence:
205  *
206  *    - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD
207  *    - Wait for EC_LPC_CMDR_PENDING bit to clear
208  *    - Write address to EC_LPC_ADDR_ACPI_DATA
209  *    - Wait for EC_LPC_CMDR_DATA bit to set
210  *    - Read value from EC_LPC_ADDR_ACPI_DATA
211  */
212 #define EC_CMD_ACPI_READ 0x0080
213 
214 /*
215  * ACPI Write Embedded Controller
216  *
217  * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*).
218  *
219  * Use the following sequence:
220  *
221  *    - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD
222  *    - Wait for EC_LPC_CMDR_PENDING bit to clear
223  *    - Write address to EC_LPC_ADDR_ACPI_DATA
224  *    - Wait for EC_LPC_CMDR_PENDING bit to clear
225  *    - Write value to EC_LPC_ADDR_ACPI_DATA
226  */
227 #define EC_CMD_ACPI_WRITE 0x0081
228 
229 /*
230  * ACPI Burst Enable Embedded Controller
231  *
232  * This enables burst mode on the EC to allow the host to issue several
233  * commands back-to-back. While in this mode, writes to mapped multi-byte
234  * data are locked out to ensure data consistency.
235  */
236 #define EC_CMD_ACPI_BURST_ENABLE 0x0082
237 
238 /*
239  * ACPI Burst Disable Embedded Controller
240  *
241  * This disables burst mode on the EC and stops preventing EC writes to mapped
242  * multi-byte data.
243  */
244 #define EC_CMD_ACPI_BURST_DISABLE 0x0083
245 
246 /*
247  * ACPI Query Embedded Controller
248  *
249  * This clears the lowest-order bit in the currently pending host events, and
250  * sets the result code to the 1-based index of the bit (event 0x00000001 = 1,
251  * event 0x80000000 = 32), or 0 if no event was pending.
252  */
253 #define EC_CMD_ACPI_QUERY_EVENT 0x0084
254 
255 /* Valid addresses in ACPI memory space, for read/write commands */
256 
257 /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */
258 #define EC_ACPI_MEM_VERSION            0x00
259 /*
260  * Test location; writing value here updates test compliment byte to (0xff -
261  * value).
262  */
263 #define EC_ACPI_MEM_TEST               0x01
264 /* Test compliment; writes here are ignored. */
265 #define EC_ACPI_MEM_TEST_COMPLIMENT    0x02
266 
267 /* Keyboard backlight brightness percent (0 - 100) */
268 #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03
269 /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */
270 #define EC_ACPI_MEM_FAN_DUTY           0x04
271 
272 /*
273  * DPTF temp thresholds. Any of the EC's temp sensors can have up to two
274  * independent thresholds attached to them. The current value of the ID
275  * register determines which sensor is affected by the THRESHOLD and COMMIT
276  * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme
277  * as the memory-mapped sensors. The COMMIT register applies those settings.
278  *
279  * The spec does not mandate any way to read back the threshold settings
280  * themselves, but when a threshold is crossed the AP needs a way to determine
281  * which sensor(s) are responsible. Each reading of the ID register clears and
282  * returns one sensor ID that has crossed one of its threshold (in either
283  * direction) since the last read. A value of 0xFF means "no new thresholds
284  * have tripped". Setting or enabling the thresholds for a sensor will clear
285  * the unread event count for that sensor.
286  */
287 #define EC_ACPI_MEM_TEMP_ID            0x05
288 #define EC_ACPI_MEM_TEMP_THRESHOLD     0x06
289 #define EC_ACPI_MEM_TEMP_COMMIT        0x07
290 /*
291  * Here are the bits for the COMMIT register:
292  *   bit 0 selects the threshold index for the chosen sensor (0/1)
293  *   bit 1 enables/disables the selected threshold (0 = off, 1 = on)
294  * Each write to the commit register affects one threshold.
295  */
296 #define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK (1 << 0)
297 #define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK (1 << 1)
298 /*
299  * Example:
300  *
301  * Set the thresholds for sensor 2 to 50 C and 60 C:
302  *   write 2 to [0x05]      --  select temp sensor 2
303  *   write 0x7b to [0x06]   --  C_TO_K(50) - EC_TEMP_SENSOR_OFFSET
304  *   write 0x2 to [0x07]    --  enable threshold 0 with this value
305  *   write 0x85 to [0x06]   --  C_TO_K(60) - EC_TEMP_SENSOR_OFFSET
306  *   write 0x3 to [0x07]    --  enable threshold 1 with this value
307  *
308  * Disable the 60 C threshold, leaving the 50 C threshold unchanged:
309  *   write 2 to [0x05]      --  select temp sensor 2
310  *   write 0x1 to [0x07]    --  disable threshold 1
311  */
312 
313 /* DPTF battery charging current limit */
314 #define EC_ACPI_MEM_CHARGING_LIMIT     0x08
315 
316 /* Charging limit is specified in 64 mA steps */
317 #define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA   64
318 /* Value to disable DPTF battery charging limit */
319 #define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED  0xff
320 
321 /*
322  * Report device orientation
323  *   bit 0 device is tablet mode
324  */
325 #define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09
326 #define EC_ACPI_MEM_DEVICE_TABLET_MODE 0x01
327 
328 /*
329  * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf.  This data
330  * is read-only from the AP.  Added in EC_ACPI_MEM_VERSION 2.
331  */
332 #define EC_ACPI_MEM_MAPPED_BEGIN   0x20
333 #define EC_ACPI_MEM_MAPPED_SIZE    0xe0
334 
335 /* Current version of ACPI memory address space */
336 #define EC_ACPI_MEM_VERSION_CURRENT 2
337 
338 
339 /*
340  * This header file is used in coreboot both in C and ACPI code.  The ACPI code
341  * is pre-processed to handle constants but the ASL compiler is unable to
342  * handle actual C code so keep it separate.
343  */
344 #ifndef __ACPI__
345 
346 /*
347  * Define __packed if someone hasn't beat us to it.  Linux kernel style
348  * checking prefers __packed over __attribute__((packed)).
349  */
350 #ifndef __packed
351 #define __packed __attribute__((packed))
352 #endif
353 
354 #ifndef __aligned
355 #define __aligned(x) __attribute__((aligned(x)))
356 #endif
357 
358 /*
359  * Attributes for EC request and response packets.  Just defining __packed
360  * results in inefficient assembly code on ARM, if the structure is actually
361  * 32-bit aligned, as it should be for all buffers.
362  *
363  * Be very careful when adding these to existing structures.  They will round
364  * up the structure size to the specified boundary.
365  *
366  * Also be very careful to make that if a structure is included in some other
367  * parent structure that the alignment will still be true given the packing of
368  * the parent structure.  This is particularly important if the sub-structure
369  * will be passed as a pointer to another function, since that function will
370  * not know about the misaligment caused by the parent structure's packing.
371  *
372  * Also be very careful using __packed - particularly when nesting non-packed
373  * structures inside packed ones.  In fact, DO NOT use __packed directly;
374  * always use one of these attributes.
375  *
376  * Once everything is annotated properly, the following search strings should
377  * not return ANY matches in this file other than right here:
378  *
379  * "__packed" - generates inefficient code; all sub-structs must also be packed
380  *
381  * "struct [^_]" - all structs should be annotated, except for structs that are
382  * members of other structs/unions (and their original declarations should be
383  * annotated).
384  */
385 #ifdef CONFIG_HOSTCMD_ALIGNED
386 
387 /*
388  * Packed structures where offset and size are always aligned to 1, 2, or 4
389  * byte boundary.
390  */
391 #define __ec_align1 __packed
392 #define __ec_align2 __packed __aligned(2)
393 #define __ec_align4 __packed __aligned(4)
394 
395 /*
396  * Packed structure which must be under-aligned, because its size is not a
397  * 4-byte multiple.  This is sub-optimal because it forces byte-wise access
398  * of all multi-byte fields in it, even though they are themselves aligned.
399  *
400  * In theory, we could duplicate the structure with __aligned(4) for accessing
401  * its members, but use the __packed version for sizeof().
402  */
403 #define __ec_align_size1 __packed
404 
405 /*
406  * Packed structure which must be under-aligned, because its offset inside a
407  * parent structure is not a 4-byte multiple.
408  */
409 #define __ec_align_offset1 __packed
410 #define __ec_align_offset2 __packed __aligned(2)
411 
412 /*
413  * Structures which are complicated enough that I'm skipping them on the first
414  * pass.  They are effectively unchanged from their previous definitions.
415  *
416  * TODO(rspangler): Figure out what to do with these.  It's likely necessary
417  * to work out the size and offset of each member and add explicit padding to
418  * maintain those.
419  */
420 #define __ec_todo_packed __packed
421 #define __ec_todo_unpacked
422 
423 #else  /* !CONFIG_HOSTCMD_ALIGNED */
424 
425 /*
426  * Packed structures make no assumption about alignment, so they do inefficient
427  * byte-wise reads.
428  */
429 #define __ec_align1 __packed
430 #define __ec_align2 __packed
431 #define __ec_align4 __packed
432 #define __ec_align_size1 __packed
433 #define __ec_align_offset1 __packed
434 #define __ec_align_offset2 __packed
435 #define __ec_todo_packed __packed
436 #define __ec_todo_unpacked
437 
438 #endif  /* !CONFIG_HOSTCMD_ALIGNED */
439 
440 /* LPC command status byte masks */
441 /* EC has written a byte in the data register and host hasn't read it yet */
442 #define EC_LPC_STATUS_TO_HOST     0x01
443 /* Host has written a command/data byte and the EC hasn't read it yet */
444 #define EC_LPC_STATUS_FROM_HOST   0x02
445 /* EC is processing a command */
446 #define EC_LPC_STATUS_PROCESSING  0x04
447 /* Last write to EC was a command, not data */
448 #define EC_LPC_STATUS_LAST_CMD    0x08
449 /* EC is in burst mode */
450 #define EC_LPC_STATUS_BURST_MODE  0x10
451 /* SCI event is pending (requesting SCI query) */
452 #define EC_LPC_STATUS_SCI_PENDING 0x20
453 /* SMI event is pending (requesting SMI query) */
454 #define EC_LPC_STATUS_SMI_PENDING 0x40
455 /* (reserved) */
456 #define EC_LPC_STATUS_RESERVED    0x80
457 
458 /*
459  * EC is busy.  This covers both the EC processing a command, and the host has
460  * written a new command but the EC hasn't picked it up yet.
461  */
462 #define EC_LPC_STATUS_BUSY_MASK \
463 	(EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING)
464 
465 /* Host command response codes (16-bit).  Note that response codes should be
466  * stored in a uint16_t rather than directly in a value of this type.
467  */
468 enum ec_status {
469 	EC_RES_SUCCESS = 0,
470 	EC_RES_INVALID_COMMAND = 1,
471 	EC_RES_ERROR = 2,
472 	EC_RES_INVALID_PARAM = 3,
473 	EC_RES_ACCESS_DENIED = 4,
474 	EC_RES_INVALID_RESPONSE = 5,
475 	EC_RES_INVALID_VERSION = 6,
476 	EC_RES_INVALID_CHECKSUM = 7,
477 	EC_RES_IN_PROGRESS = 8,		/* Accepted, command in progress */
478 	EC_RES_UNAVAILABLE = 9,		/* No response available */
479 	EC_RES_TIMEOUT = 10,		/* We got a timeout */
480 	EC_RES_OVERFLOW = 11,		/* Table / data overflow */
481 	EC_RES_INVALID_HEADER = 12,     /* Header contains invalid data */
482 	EC_RES_REQUEST_TRUNCATED = 13,  /* Didn't get the entire request */
483 	EC_RES_RESPONSE_TOO_BIG = 14,   /* Response was too big to handle */
484 	EC_RES_BUS_ERROR = 15,		/* Communications bus error */
485 	EC_RES_BUSY = 16		/* Up but too busy.  Should retry */
486 };
487 
488 /*
489  * Host event codes.  Note these are 1-based, not 0-based, because ACPI query
490  * EC command uses code 0 to mean "no event pending".  We explicitly specify
491  * each value in the enum listing so they won't change if we delete/insert an
492  * item or rearrange the list (it needs to be stable across platforms, not
493  * just within a single compiled instance).
494  */
495 enum host_event_code {
496 	EC_HOST_EVENT_LID_CLOSED = 1,
497 	EC_HOST_EVENT_LID_OPEN = 2,
498 	EC_HOST_EVENT_POWER_BUTTON = 3,
499 	EC_HOST_EVENT_AC_CONNECTED = 4,
500 	EC_HOST_EVENT_AC_DISCONNECTED = 5,
501 	EC_HOST_EVENT_BATTERY_LOW = 6,
502 	EC_HOST_EVENT_BATTERY_CRITICAL = 7,
503 	EC_HOST_EVENT_BATTERY = 8,
504 	EC_HOST_EVENT_THERMAL_THRESHOLD = 9,
505 	/* Event generated by a device attached to the EC */
506 	EC_HOST_EVENT_DEVICE = 10,
507 	EC_HOST_EVENT_THERMAL = 11,
508 	EC_HOST_EVENT_USB_CHARGER = 12,
509 	EC_HOST_EVENT_KEY_PRESSED = 13,
510 	/*
511 	 * EC has finished initializing the host interface.  The host can check
512 	 * for this event following sending a EC_CMD_REBOOT_EC command to
513 	 * determine when the EC is ready to accept subsequent commands.
514 	 */
515 	EC_HOST_EVENT_INTERFACE_READY = 14,
516 	/* Keyboard recovery combo has been pressed */
517 	EC_HOST_EVENT_KEYBOARD_RECOVERY = 15,
518 
519 	/* Shutdown due to thermal overload */
520 	EC_HOST_EVENT_THERMAL_SHUTDOWN = 16,
521 	/* Shutdown due to battery level too low */
522 	EC_HOST_EVENT_BATTERY_SHUTDOWN = 17,
523 
524 	/* Suggest that the AP throttle itself */
525 	EC_HOST_EVENT_THROTTLE_START = 18,
526 	/* Suggest that the AP resume normal speed */
527 	EC_HOST_EVENT_THROTTLE_STOP = 19,
528 
529 	/* Hang detect logic detected a hang and host event timeout expired */
530 	EC_HOST_EVENT_HANG_DETECT = 20,
531 	/* Hang detect logic detected a hang and warm rebooted the AP */
532 	EC_HOST_EVENT_HANG_REBOOT = 21,
533 
534 	/* PD MCU triggering host event */
535 	EC_HOST_EVENT_PD_MCU = 22,
536 
537 	/* Battery Status flags have changed */
538 	EC_HOST_EVENT_BATTERY_STATUS = 23,
539 
540 	/* EC encountered a panic, triggering a reset */
541 	EC_HOST_EVENT_PANIC = 24,
542 
543 	/* Keyboard fastboot combo has been pressed */
544 	EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25,
545 
546 	/* EC RTC event occurred */
547 	EC_HOST_EVENT_RTC = 26,
548 
549 	/* Emulate MKBP event */
550 	EC_HOST_EVENT_MKBP = 27,
551 
552 	/* EC desires to change state of host-controlled USB mux */
553 	EC_HOST_EVENT_USB_MUX = 28,
554 
555 	/* TABLET/LAPTOP mode event*/
556 	EC_HOST_EVENT_MODE_CHANGE = 29,
557 
558 	/* Keyboard recovery combo with hardware reinitialization */
559 	EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30,
560 
561 	/*
562 	 * Reserve this last bit to indicate that at least one bit in a
563 	 * secondary host event word is set.  See crbug.com/633646.
564 	 */
565 	EC_HOST_EVENT_EXTENDED = 31,
566 
567 	/*
568 	 * The high bit of the event mask is not used as a host event code.  If
569 	 * it reads back as set, then the entire event mask should be
570 	 * considered invalid by the host.  This can happen when reading the
571 	 * raw event status via EC_MEMMAP_HOST_EVENTS but the LPC interface is
572 	 * not initialized on the EC, or improperly configured on the host.
573 	 */
574 	EC_HOST_EVENT_INVALID = 32
575 };
576 /* Host event mask */
577 #define EC_HOST_EVENT_MASK(event_code) (1UL << ((event_code) - 1))
578 
579 /* Arguments at EC_LPC_ADDR_HOST_ARGS */
580 struct __ec_align4 ec_lpc_host_args {
581 	uint8_t flags;
582 	uint8_t command_version;
583 	uint8_t data_size;
584 	/*
585 	 * Checksum; sum of command + flags + command_version + data_size +
586 	 * all params/response data bytes.
587 	 */
588 	uint8_t checksum;
589 };
590 
591 /* Flags for ec_lpc_host_args.flags */
592 /*
593  * Args are from host.  Data area at EC_LPC_ADDR_HOST_PARAM contains command
594  * params.
595  *
596  * If EC gets a command and this flag is not set, this is an old-style command.
597  * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with
598  * unknown length.  EC must respond with an old-style response (that is,
599  * without setting EC_HOST_ARGS_FLAG_TO_HOST).
600  */
601 #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01
602 /*
603  * Args are from EC.  Data area at EC_LPC_ADDR_HOST_PARAM contains response.
604  *
605  * If EC responds to a command and this flag is not set, this is an old-style
606  * response.  Command version is 0 and response data from EC is at
607  * EC_LPC_ADDR_OLD_PARAM with unknown length.
608  */
609 #define EC_HOST_ARGS_FLAG_TO_HOST   0x02
610 
611 /*****************************************************************************/
612 /*
613  * Byte codes returned by EC over SPI interface.
614  *
615  * These can be used by the AP to debug the EC interface, and to determine
616  * when the EC is not in a state where it will ever get around to responding
617  * to the AP.
618  *
619  * Example of sequence of bytes read from EC for a current good transfer:
620  *   1. -                  - AP asserts chip select (CS#)
621  *   2. EC_SPI_OLD_READY   - AP sends first byte(s) of request
622  *   3. -                  - EC starts handling CS# interrupt
623  *   4. EC_SPI_RECEIVING   - AP sends remaining byte(s) of request
624  *   5. EC_SPI_PROCESSING  - EC starts processing request; AP is clocking in
625  *                           bytes looking for EC_SPI_FRAME_START
626  *   6. -                  - EC finishes processing and sets up response
627  *   7. EC_SPI_FRAME_START - AP reads frame byte
628  *   8. (response packet)  - AP reads response packet
629  *   9. EC_SPI_PAST_END    - Any additional bytes read by AP
630  *   10 -                  - AP deasserts chip select
631  *   11 -                  - EC processes CS# interrupt and sets up DMA for
632  *                           next request
633  *
634  * If the AP is waiting for EC_SPI_FRAME_START and sees any value other than
635  * the following byte values:
636  *   EC_SPI_OLD_READY
637  *   EC_SPI_RX_READY
638  *   EC_SPI_RECEIVING
639  *   EC_SPI_PROCESSING
640  *
641  * Then the EC found an error in the request, or was not ready for the request
642  * and lost data.  The AP should give up waiting for EC_SPI_FRAME_START,
643  * because the EC is unable to tell when the AP is done sending its request.
644  */
645 
646 /*
647  * Framing byte which precedes a response packet from the EC.  After sending a
648  * request, the AP will clock in bytes until it sees the framing byte, then
649  * clock in the response packet.
650  */
651 #define EC_SPI_FRAME_START    0xec
652 
653 /*
654  * Padding bytes which are clocked out after the end of a response packet.
655  */
656 #define EC_SPI_PAST_END       0xed
657 
658 /*
659  * EC is ready to receive, and has ignored the byte sent by the AP.  EC expects
660  * that the AP will send a valid packet header (starting with
661  * EC_COMMAND_PROTOCOL_3) in the next 32 bytes.
662  */
663 #define EC_SPI_RX_READY       0xf8
664 
665 /*
666  * EC has started receiving the request from the AP, but hasn't started
667  * processing it yet.
668  */
669 #define EC_SPI_RECEIVING      0xf9
670 
671 /* EC has received the entire request from the AP and is processing it. */
672 #define EC_SPI_PROCESSING     0xfa
673 
674 /*
675  * EC received bad data from the AP, such as a packet header with an invalid
676  * length.  EC will ignore all data until chip select deasserts.
677  */
678 #define EC_SPI_RX_BAD_DATA    0xfb
679 
680 /*
681  * EC received data from the AP before it was ready.  That is, the AP asserted
682  * chip select and started clocking data before the EC was ready to receive it.
683  * EC will ignore all data until chip select deasserts.
684  */
685 #define EC_SPI_NOT_READY      0xfc
686 
687 /*
688  * EC was ready to receive a request from the AP.  EC has treated the byte sent
689  * by the AP as part of a request packet, or (for old-style ECs) is processing
690  * a fully received packet but is not ready to respond yet.
691  */
692 #define EC_SPI_OLD_READY      0xfd
693 
694 /*****************************************************************************/
695 
696 /*
697  * Protocol version 2 for I2C and SPI send a request this way:
698  *
699  *	0	EC_CMD_VERSION0 + (command version)
700  *	1	Command number
701  *	2	Length of params = N
702  *	3..N+2	Params, if any
703  *	N+3	8-bit checksum of bytes 0..N+2
704  *
705  * The corresponding response is:
706  *
707  *	0	Result code (EC_RES_*)
708  *	1	Length of params = M
709  *	2..M+1	Params, if any
710  *	M+2	8-bit checksum of bytes 0..M+1
711  */
712 #define EC_PROTO2_REQUEST_HEADER_BYTES 3
713 #define EC_PROTO2_REQUEST_TRAILER_BYTES 1
714 #define EC_PROTO2_REQUEST_OVERHEAD (EC_PROTO2_REQUEST_HEADER_BYTES +	\
715 				    EC_PROTO2_REQUEST_TRAILER_BYTES)
716 
717 #define EC_PROTO2_RESPONSE_HEADER_BYTES 2
718 #define EC_PROTO2_RESPONSE_TRAILER_BYTES 1
719 #define EC_PROTO2_RESPONSE_OVERHEAD (EC_PROTO2_RESPONSE_HEADER_BYTES +	\
720 				     EC_PROTO2_RESPONSE_TRAILER_BYTES)
721 
722 /* Parameter length was limited by the LPC interface */
723 #define EC_PROTO2_MAX_PARAM_SIZE 0xfc
724 
725 /* Maximum request and response packet sizes for protocol version 2 */
726 #define EC_PROTO2_MAX_REQUEST_SIZE (EC_PROTO2_REQUEST_OVERHEAD +	\
727 				    EC_PROTO2_MAX_PARAM_SIZE)
728 #define EC_PROTO2_MAX_RESPONSE_SIZE (EC_PROTO2_RESPONSE_OVERHEAD +	\
729 				     EC_PROTO2_MAX_PARAM_SIZE)
730 
731 /*****************************************************************************/
732 
733 /*
734  * Value written to legacy command port / prefix byte to indicate protocol
735  * 3+ structs are being used.  Usage is bus-dependent.
736  */
737 #define EC_COMMAND_PROTOCOL_3 0xda
738 
739 #define EC_HOST_REQUEST_VERSION 3
740 
741 /* Version 3 request from host */
742 struct __ec_align4 ec_host_request {
743 	/* Structure version (=3)
744 	 *
745 	 * EC will return EC_RES_INVALID_HEADER if it receives a header with a
746 	 * version it doesn't know how to parse.
747 	 */
748 	uint8_t struct_version;
749 
750 	/*
751 	 * Checksum of request and data; sum of all bytes including checksum
752 	 * should total to 0.
753 	 */
754 	uint8_t checksum;
755 
756 	/* Command code */
757 	uint16_t command;
758 
759 	/* Command version */
760 	uint8_t command_version;
761 
762 	/* Unused byte in current protocol version; set to 0 */
763 	uint8_t reserved;
764 
765 	/* Length of data which follows this header */
766 	uint16_t data_len;
767 };
768 
769 #define EC_HOST_RESPONSE_VERSION 3
770 
771 /* Version 3 response from EC */
772 struct __ec_align4 ec_host_response {
773 	/* Structure version (=3) */
774 	uint8_t struct_version;
775 
776 	/*
777 	 * Checksum of response and data; sum of all bytes including checksum
778 	 * should total to 0.
779 	 */
780 	uint8_t checksum;
781 
782 	/* Result code (EC_RES_*) */
783 	uint16_t result;
784 
785 	/* Length of data which follows this header */
786 	uint16_t data_len;
787 
788 	/* Unused bytes in current protocol version; set to 0 */
789 	uint16_t reserved;
790 };
791 
792 /*****************************************************************************/
793 /*
794  * Notes on commands:
795  *
796  * Each command is an 16-bit command value.  Commands which take params or
797  * return response data specify structures for that data.  If no structure is
798  * specified, the command does not input or output data, respectively.
799  * Parameter/response length is implicit in the structs.  Some underlying
800  * communication protocols (I2C, SPI) may add length or checksum headers, but
801  * those are implementation-dependent and not defined here.
802  *
803  * All commands MUST be #defined to be 4-digit UPPER CASE hex values
804  * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work.
805  */
806 
807 /*****************************************************************************/
808 /* General / test commands */
809 
810 /*
811  * Get protocol version, used to deal with non-backward compatible protocol
812  * changes.
813  */
814 #define EC_CMD_PROTO_VERSION 0x0000
815 
816 struct __ec_align4 ec_response_proto_version {
817 	uint32_t version;
818 };
819 
820 /*
821  * Hello.  This is a simple command to test the EC is responsive to
822  * commands.
823  */
824 #define EC_CMD_HELLO 0x0001
825 
826 struct __ec_align4 ec_params_hello {
827 	uint32_t in_data;  /* Pass anything here */
828 };
829 
830 struct __ec_align4 ec_response_hello {
831 	uint32_t out_data;  /* Output will be in_data + 0x01020304 */
832 };
833 
834 /* Get version number */
835 #define EC_CMD_GET_VERSION 0x0002
836 
837 enum ec_current_image {
838 	EC_IMAGE_UNKNOWN = 0,
839 	EC_IMAGE_RO,
840 	EC_IMAGE_RW
841 };
842 
843 struct __ec_align4 ec_response_get_version {
844 	/* Null-terminated version strings for RO, RW */
845 	char version_string_ro[32];
846 	char version_string_rw[32];
847 	char reserved[32];       /* Was previously RW-B string */
848 	uint32_t current_image;  /* One of ec_current_image */
849 };
850 
851 /* Read test */
852 #define EC_CMD_READ_TEST 0x0003
853 
854 struct __ec_align4 ec_params_read_test {
855 	uint32_t offset;   /* Starting value for read buffer */
856 	uint32_t size;     /* Size to read in bytes */
857 };
858 
859 struct __ec_align4 ec_response_read_test {
860 	uint32_t data[32];
861 };
862 
863 /*
864  * Get build information
865  *
866  * Response is null-terminated string.
867  */
868 #define EC_CMD_GET_BUILD_INFO 0x0004
869 
870 /* Get chip info */
871 #define EC_CMD_GET_CHIP_INFO 0x0005
872 
873 struct __ec_align4 ec_response_get_chip_info {
874 	/* Null-terminated strings */
875 	char vendor[32];
876 	char name[32];
877 	char revision[32];  /* Mask version */
878 };
879 
880 /* Get board HW version */
881 #define EC_CMD_GET_BOARD_VERSION 0x0006
882 
883 struct __ec_align2 ec_response_board_version {
884 	uint16_t board_version;  /* A monotonously incrementing number. */
885 };
886 
887 /*
888  * Read memory-mapped data.
889  *
890  * This is an alternate interface to memory-mapped data for bus protocols
891  * which don't support direct-mapped memory - I2C, SPI, etc.
892  *
893  * Response is params.size bytes of data.
894  */
895 #define EC_CMD_READ_MEMMAP 0x0007
896 
897 struct __ec_align1 ec_params_read_memmap {
898 	uint8_t offset;   /* Offset in memmap (EC_MEMMAP_*) */
899 	uint8_t size;     /* Size to read in bytes */
900 };
901 
902 /* Read versions supported for a command */
903 #define EC_CMD_GET_CMD_VERSIONS 0x0008
904 
905 struct __ec_align1 ec_params_get_cmd_versions {
906 	uint8_t cmd;      /* Command to check */
907 };
908 
909 struct __ec_align2 ec_params_get_cmd_versions_v1 {
910 	uint16_t cmd;     /* Command to check */
911 };
912 
913 struct __ec_align4 ec_response_get_cmd_versions {
914 	/*
915 	 * Mask of supported versions; use EC_VER_MASK() to compare with a
916 	 * desired version.
917 	 */
918 	uint32_t version_mask;
919 };
920 
921 /*
922  * Check EC communications status (busy). This is needed on i2c/spi but not
923  * on lpc since it has its own out-of-band busy indicator.
924  *
925  * lpc must read the status from the command register. Attempting this on
926  * lpc will overwrite the args/parameter space and corrupt its data.
927  */
928 #define EC_CMD_GET_COMMS_STATUS		0x0009
929 
930 /* Avoid using ec_status which is for return values */
931 enum ec_comms_status {
932 	EC_COMMS_STATUS_PROCESSING	= 1 << 0,	/* Processing cmd */
933 };
934 
935 struct __ec_align4 ec_response_get_comms_status {
936 	uint32_t flags;		/* Mask of enum ec_comms_status */
937 };
938 
939 /* Fake a variety of responses, purely for testing purposes. */
940 #define EC_CMD_TEST_PROTOCOL		0x000A
941 
942 /* Tell the EC what to send back to us. */
943 struct __ec_align4 ec_params_test_protocol {
944 	uint32_t ec_result;
945 	uint32_t ret_len;
946 	uint8_t buf[32];
947 };
948 
949 /* Here it comes... */
950 struct __ec_align4 ec_response_test_protocol {
951 	uint8_t buf[32];
952 };
953 
954 /* Get protocol information */
955 #define EC_CMD_GET_PROTOCOL_INFO	0x000B
956 
957 /* Flags for ec_response_get_protocol_info.flags */
958 /* EC_RES_IN_PROGRESS may be returned if a command is slow */
959 #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED (1 << 0)
960 
961 struct __ec_align4 ec_response_get_protocol_info {
962 	/* Fields which exist if at least protocol version 3 supported */
963 
964 	/* Bitmask of protocol versions supported (1 << n means version n)*/
965 	uint32_t protocol_versions;
966 
967 	/* Maximum request packet size, in bytes */
968 	uint16_t max_request_packet_size;
969 
970 	/* Maximum response packet size, in bytes */
971 	uint16_t max_response_packet_size;
972 
973 	/* Flags; see EC_PROTOCOL_INFO_* */
974 	uint32_t flags;
975 };
976 
977 
978 /*****************************************************************************/
979 /* Get/Set miscellaneous values */
980 
981 /* The upper byte of .flags tells what to do (nothing means "get") */
982 #define EC_GSV_SET        0x80000000
983 
984 /* The lower three bytes of .flags identifies the parameter, if that has
985    meaning for an individual command. */
986 #define EC_GSV_PARAM_MASK 0x00ffffff
987 
988 struct __ec_align4 ec_params_get_set_value {
989 	uint32_t flags;
990 	uint32_t value;
991 };
992 
993 struct __ec_align4 ec_response_get_set_value {
994 	uint32_t flags;
995 	uint32_t value;
996 };
997 
998 /* More than one command can use these structs to get/set parameters. */
999 #define EC_CMD_GSV_PAUSE_IN_S5	0x000C
1000 
1001 /*****************************************************************************/
1002 /* List the features supported by the firmware */
1003 #define EC_CMD_GET_FEATURES  0x000D
1004 
1005 /* Supported features */
1006 enum ec_feature_code {
1007 	/*
1008 	 * This image contains a limited set of features. Another image
1009 	 * in RW partition may support more features.
1010 	 */
1011 	EC_FEATURE_LIMITED = 0,
1012 	/*
1013 	 * Commands for probing/reading/writing/erasing the flash in the
1014 	 * EC are present.
1015 	 */
1016 	EC_FEATURE_FLASH = 1,
1017 	/*
1018 	 * Can control the fan speed directly.
1019 	 */
1020 	EC_FEATURE_PWM_FAN = 2,
1021 	/*
1022 	 * Can control the intensity of the keyboard backlight.
1023 	 */
1024 	EC_FEATURE_PWM_KEYB = 3,
1025 	/*
1026 	 * Support Google lightbar, introduced on Pixel.
1027 	 */
1028 	EC_FEATURE_LIGHTBAR = 4,
1029 	/* Control of LEDs  */
1030 	EC_FEATURE_LED = 5,
1031 	/* Exposes an interface to control gyro and sensors.
1032 	 * The host goes through the EC to access these sensors.
1033 	 * In addition, the EC may provide composite sensors, like lid angle.
1034 	 */
1035 	EC_FEATURE_MOTION_SENSE = 6,
1036 	/* The keyboard is controlled by the EC */
1037 	EC_FEATURE_KEYB = 7,
1038 	/* The AP can use part of the EC flash as persistent storage. */
1039 	EC_FEATURE_PSTORE = 8,
1040 	/* The EC monitors BIOS port 80h, and can return POST codes. */
1041 	EC_FEATURE_PORT80 = 9,
1042 	/*
1043 	 * Thermal management: include TMP specific commands.
1044 	 * Higher level than direct fan control.
1045 	 */
1046 	EC_FEATURE_THERMAL = 10,
1047 	/* Can switch the screen backlight on/off */
1048 	EC_FEATURE_BKLIGHT_SWITCH = 11,
1049 	/* Can switch the wifi module on/off */
1050 	EC_FEATURE_WIFI_SWITCH = 12,
1051 	/* Monitor host events, through for example SMI or SCI */
1052 	EC_FEATURE_HOST_EVENTS = 13,
1053 	/* The EC exposes GPIO commands to control/monitor connected devices. */
1054 	EC_FEATURE_GPIO = 14,
1055 	/* The EC can send i2c messages to downstream devices. */
1056 	EC_FEATURE_I2C = 15,
1057 	/* Command to control charger are included */
1058 	EC_FEATURE_CHARGER = 16,
1059 	/* Simple battery support. */
1060 	EC_FEATURE_BATTERY = 17,
1061 	/*
1062 	 * Support Smart battery protocol
1063 	 * (Common Smart Battery System Interface Specification)
1064 	 */
1065 	EC_FEATURE_SMART_BATTERY = 18,
1066 	/* EC can detect when the host hangs. */
1067 	EC_FEATURE_HANG_DETECT = 19,
1068 	/* Report power information, for pit only */
1069 	EC_FEATURE_PMU = 20,
1070 	/* Another Cros EC device is present downstream of this one */
1071 	EC_FEATURE_SUB_MCU = 21,
1072 	/* Support USB Power delivery (PD) commands */
1073 	EC_FEATURE_USB_PD = 22,
1074 	/* Control USB multiplexer, for audio through USB port for instance. */
1075 	EC_FEATURE_USB_MUX = 23,
1076 	/* Motion Sensor code has an internal software FIFO */
1077 	EC_FEATURE_MOTION_SENSE_FIFO = 24,
1078 	/* Support temporary secure vstore */
1079 	EC_FEATURE_VSTORE = 25,
1080 	/* EC decides on USB-C SS mux state, muxes configured by host */
1081 	EC_FEATURE_USBC_SS_MUX_VIRTUAL = 26,
1082 	/* EC has RTC feature that can be controlled by host commands */
1083 	EC_FEATURE_RTC = 27,
1084 	/* The MCU exposes a Fingerprint sensor */
1085 	EC_FEATURE_FINGERPRINT = 28,
1086 	/* The MCU exposes a Touchpad */
1087 	EC_FEATURE_TOUCHPAD = 29,
1088 	/* The MCU has RWSIG task enabled */
1089 	EC_FEATURE_RWSIG = 30,
1090 	/* EC has device events support */
1091 	EC_FEATURE_DEVICE_EVENT = 31,
1092 	/* EC supports the unified wake masks for LPC/eSPI systems */
1093 	EC_FEATURE_UNIFIED_WAKE_MASKS = 32,
1094 	/* EC supports 64-bit host events */
1095 	EC_FEATURE_HOST_EVENT64 = 33,
1096 	/* EC runs code in RAM (not in place, a.k.a. XIP) */
1097 	EC_FEATURE_EXEC_IN_RAM = 34,
1098 };
1099 
1100 #define EC_FEATURE_MASK_0(event_code) (1UL << (event_code % 32))
1101 #define EC_FEATURE_MASK_1(event_code) (1UL << (event_code - 32))
1102 struct __ec_align4 ec_response_get_features {
1103 	uint32_t flags[2];
1104 };
1105 
1106 /*****************************************************************************/
1107 /* Flash commands */
1108 
1109 /* Get flash info */
1110 #define EC_CMD_FLASH_INFO 0x0010
1111 #define EC_VER_FLASH_INFO 2
1112 
1113 /* Version 0 returns these fields */
1114 struct __ec_align4 ec_response_flash_info {
1115 	/* Usable flash size, in bytes */
1116 	uint32_t flash_size;
1117 	/*
1118 	 * Write block size.  Write offset and size must be a multiple
1119 	 * of this.
1120 	 */
1121 	uint32_t write_block_size;
1122 	/*
1123 	 * Erase block size.  Erase offset and size must be a multiple
1124 	 * of this.
1125 	 */
1126 	uint32_t erase_block_size;
1127 	/*
1128 	 * Protection block size.  Protection offset and size must be a
1129 	 * multiple of this.
1130 	 */
1131 	uint32_t protect_block_size;
1132 };
1133 
1134 /* Flags for version 1+ flash info command */
1135 /* EC flash erases bits to 0 instead of 1 */
1136 #define EC_FLASH_INFO_ERASE_TO_0 (1 << 0)
1137 
1138 /* Flash must be selected for read/write/erase operations to succeed.  This may
1139  * be necessary on a chip where write/erase can be corrupted by other board
1140  * activity, or where the chip needs to enable some sort of programming voltage,
1141  * or where the read/write/erase operations require cleanly suspending other
1142  * chip functionality. */
1143 #define EC_FLASH_INFO_SELECT_REQUIRED (1 << 1)
1144 
1145 /*
1146  * Version 1 returns the same initial fields as version 0, with additional
1147  * fields following.
1148  *
1149  * gcc anonymous structs don't seem to get along with the __packed directive;
1150  * if they did we'd define the version 0 structure as a sub-structure of this
1151  * one.
1152  *
1153  * Version 2 supports flash banks of different sizes:
1154  * The caller specified the number of banks it has preallocated
1155  * (num_banks_desc)
1156  * The EC returns the number of banks describing the flash memory.
1157  * It adds banks descriptions up to num_banks_desc.
1158  */
1159 struct __ec_align4 ec_response_flash_info_1 {
1160 	/* Version 0 fields; see above for description */
1161 	uint32_t flash_size;
1162 	uint32_t write_block_size;
1163 	uint32_t erase_block_size;
1164 	uint32_t protect_block_size;
1165 
1166 	/* Version 1 adds these fields: */
1167 	/*
1168 	 * Ideal write size in bytes.  Writes will be fastest if size is
1169 	 * exactly this and offset is a multiple of this.  For example, an EC
1170 	 * may have a write buffer which can do half-page operations if data is
1171 	 * aligned, and a slower word-at-a-time write mode.
1172 	 */
1173 	uint32_t write_ideal_size;
1174 
1175 	/* Flags; see EC_FLASH_INFO_* */
1176 	uint32_t flags;
1177 };
1178 
1179 struct __ec_align4 ec_params_flash_info_2 {
1180 	/* Number of banks to describe */
1181 	uint16_t num_banks_desc;
1182 	/* Reserved; set 0; ignore on read */
1183 	uint8_t reserved[2];
1184 };
1185 
1186 struct ec_flash_bank {
1187 	/* Number of sector is in this bank. */
1188 	uint16_t count;
1189 	/* Size in power of 2 of each sector (8 --> 256 bytes) */
1190 	uint8_t size_exp;
1191 	/* Minimal write size for the sectors in this bank */
1192 	uint8_t write_size_exp;
1193 	/* Erase size for the sectors in this bank */
1194 	uint8_t erase_size_exp;
1195 	/* Size for write protection, usually identical to erase size. */
1196 	uint8_t protect_size_exp;
1197 	/* Reserved; set 0; ignore on read */
1198 	uint8_t reserved[2];
1199 };
1200 
1201 struct __ec_align4 ec_response_flash_info_2 {
1202 	/* Total flash in the EC. */
1203 	uint32_t flash_size;
1204 	/* Flags; see EC_FLASH_INFO_* */
1205 	uint32_t flags;
1206 	/* Maximum size to use to send data to write to the EC. */
1207 	uint32_t write_ideal_size;
1208 	/* Number of banks present in the EC. */
1209 	uint16_t num_banks_total;
1210 	/* Number of banks described in banks array. */
1211 	uint16_t num_banks_desc;
1212 	struct ec_flash_bank banks[0];
1213 };
1214 
1215 /*
1216  * Read flash
1217  *
1218  * Response is params.size bytes of data.
1219  */
1220 #define EC_CMD_FLASH_READ 0x0011
1221 
1222 struct __ec_align4 ec_params_flash_read {
1223 	uint32_t offset;   /* Byte offset to read */
1224 	uint32_t size;     /* Size to read in bytes */
1225 };
1226 
1227 /* Write flash */
1228 #define EC_CMD_FLASH_WRITE 0x0012
1229 #define EC_VER_FLASH_WRITE 1
1230 
1231 /* Version 0 of the flash command supported only 64 bytes of data */
1232 #define EC_FLASH_WRITE_VER0_SIZE 64
1233 
1234 struct __ec_align4 ec_params_flash_write {
1235 	uint32_t offset;   /* Byte offset to write */
1236 	uint32_t size;     /* Size to write in bytes */
1237 	/* Followed by data to write */
1238 };
1239 
1240 /* Erase flash */
1241 #define EC_CMD_FLASH_ERASE 0x0013
1242 
1243 /* v0 */
1244 struct __ec_align4 ec_params_flash_erase {
1245 	uint32_t offset;   /* Byte offset to erase */
1246 	uint32_t size;     /* Size to erase in bytes */
1247 };
1248 
1249 
1250 #define EC_VER_FLASH_WRITE 1
1251 /* v1 add async erase:
1252  * subcommands can returns:
1253  * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below).
1254  * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary.
1255  * EC_RES_ERROR : other errors.
1256  * EC_RES_BUSY : an existing erase operation is in progress.
1257  * EC_RES_ACCESS_DENIED: Trying to erase running image.
1258  *
1259  * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just
1260  * properly queued. The user must call ERASE_GET_RESULT subcommand to get
1261  * the proper result.
1262  * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send
1263  * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC.
1264  * ERASE_GET_RESULT command may timeout on EC where flash access is not
1265  * permitted while erasing. (For instance, STM32F4).
1266  */
1267 enum ec_flash_erase_cmd {
1268 	FLASH_ERASE_SECTOR,     /* Erase and wait for result */
1269 	FLASH_ERASE_SECTOR_ASYNC,  /* Erase and return immediately. */
1270 	FLASH_ERASE_GET_RESULT,  /* Ask for last erase result */
1271 };
1272 
1273 struct __ec_align4 ec_params_flash_erase_v1 {
1274 	/* One of ec_flash_erase_cmd. */
1275 	uint8_t  cmd;
1276 	/* Pad byte; currently always contains 0 */
1277 	uint8_t  reserved;
1278 	/* No flags defined yet; set to 0 */
1279 	uint16_t flag;
1280 	/* Same as v0 parameters. */
1281 	struct ec_params_flash_erase params;
1282 };
1283 
1284 /*
1285  * Get/set flash protection.
1286  *
1287  * If mask!=0, sets/clear the requested bits of flags.  Depending on the
1288  * firmware write protect GPIO, not all flags will take effect immediately;
1289  * some flags require a subsequent hard reset to take effect.  Check the
1290  * returned flags bits to see what actually happened.
1291  *
1292  * If mask=0, simply returns the current flags state.
1293  */
1294 #define EC_CMD_FLASH_PROTECT 0x0015
1295 #define EC_VER_FLASH_PROTECT 1  /* Command version 1 */
1296 
1297 /* Flags for flash protection */
1298 /* RO flash code protected when the EC boots */
1299 #define EC_FLASH_PROTECT_RO_AT_BOOT         (1 << 0)
1300 /*
1301  * RO flash code protected now.  If this bit is set, at-boot status cannot
1302  * be changed.
1303  */
1304 #define EC_FLASH_PROTECT_RO_NOW             (1 << 1)
1305 /* Entire flash code protected now, until reboot. */
1306 #define EC_FLASH_PROTECT_ALL_NOW            (1 << 2)
1307 /* Flash write protect GPIO is asserted now */
1308 #define EC_FLASH_PROTECT_GPIO_ASSERTED      (1 << 3)
1309 /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */
1310 #define EC_FLASH_PROTECT_ERROR_STUCK        (1 << 4)
1311 /*
1312  * Error - flash protection is in inconsistent state.  At least one bank of
1313  * flash which should be protected is not protected.  Usually fixed by
1314  * re-requesting the desired flags, or by a hard reset if that fails.
1315  */
1316 #define EC_FLASH_PROTECT_ERROR_INCONSISTENT (1 << 5)
1317 /* Entire flash code protected when the EC boots */
1318 #define EC_FLASH_PROTECT_ALL_AT_BOOT        (1 << 6)
1319 /* RW flash code protected when the EC boots */
1320 #define EC_FLASH_PROTECT_RW_AT_BOOT         (1 << 7)
1321 /* RW flash code protected now. */
1322 #define EC_FLASH_PROTECT_RW_NOW             (1 << 8)
1323 /* Rollback information flash region protected when the EC boots */
1324 #define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT   (1 << 9)
1325 /* Rollback information flash region protected now */
1326 #define EC_FLASH_PROTECT_ROLLBACK_NOW       (1 << 10)
1327 
1328 struct __ec_align4 ec_params_flash_protect {
1329 	uint32_t mask;   /* Bits in flags to apply */
1330 	uint32_t flags;  /* New flags to apply */
1331 };
1332 
1333 struct __ec_align4 ec_response_flash_protect {
1334 	/* Current value of flash protect flags */
1335 	uint32_t flags;
1336 	/*
1337 	 * Flags which are valid on this platform.  This allows the caller
1338 	 * to distinguish between flags which aren't set vs. flags which can't
1339 	 * be set on this platform.
1340 	 */
1341 	uint32_t valid_flags;
1342 	/* Flags which can be changed given the current protection state */
1343 	uint32_t writable_flags;
1344 };
1345 
1346 /*
1347  * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash
1348  * write protect.  These commands may be reused with version > 0.
1349  */
1350 
1351 /* Get the region offset/size */
1352 #define EC_CMD_FLASH_REGION_INFO 0x0016
1353 #define EC_VER_FLASH_REGION_INFO 1
1354 
1355 enum ec_flash_region {
1356 	/* Region which holds read-only EC image */
1357 	EC_FLASH_REGION_RO = 0,
1358 	/* Region which holds rewritable EC image */
1359 	EC_FLASH_REGION_RW,
1360 	/*
1361 	 * Region which should be write-protected in the factory (a superset of
1362 	 * EC_FLASH_REGION_RO)
1363 	 */
1364 	EC_FLASH_REGION_WP_RO,
1365 	/* Number of regions */
1366 	EC_FLASH_REGION_COUNT,
1367 };
1368 
1369 struct __ec_align4 ec_params_flash_region_info {
1370 	uint32_t region;  /* enum ec_flash_region */
1371 };
1372 
1373 struct __ec_align4 ec_response_flash_region_info {
1374 	uint32_t offset;
1375 	uint32_t size;
1376 };
1377 
1378 /* Read/write VbNvContext */
1379 #define EC_CMD_VBNV_CONTEXT 0x0017
1380 #define EC_VER_VBNV_CONTEXT 1
1381 #define EC_VBNV_BLOCK_SIZE 16
1382 
1383 enum ec_vbnvcontext_op {
1384 	EC_VBNV_CONTEXT_OP_READ,
1385 	EC_VBNV_CONTEXT_OP_WRITE,
1386 };
1387 
1388 struct __ec_align4 ec_params_vbnvcontext {
1389 	uint32_t op;
1390 	uint8_t block[EC_VBNV_BLOCK_SIZE];
1391 };
1392 
1393 struct __ec_align4 ec_response_vbnvcontext {
1394 	uint8_t block[EC_VBNV_BLOCK_SIZE];
1395 };
1396 
1397 
1398 /* Get SPI flash information */
1399 #define EC_CMD_FLASH_SPI_INFO 0x0018
1400 
1401 struct __ec_align1 ec_response_flash_spi_info {
1402 	/* JEDEC info from command 0x9F (manufacturer, memory type, size) */
1403 	uint8_t jedec[3];
1404 
1405 	/* Pad byte; currently always contains 0 */
1406 	uint8_t reserved0;
1407 
1408 	/* Manufacturer / device ID from command 0x90 */
1409 	uint8_t mfr_dev_id[2];
1410 
1411 	/* Status registers from command 0x05 and 0x35 */
1412 	uint8_t sr1, sr2;
1413 };
1414 
1415 
1416 /* Select flash during flash operations */
1417 #define EC_CMD_FLASH_SELECT 0x0019
1418 
1419 struct __ec_align4 ec_params_flash_select {
1420 	/* 1 to select flash, 0 to deselect flash */
1421 	uint8_t select;
1422 };
1423 
1424 
1425 /*****************************************************************************/
1426 /* PWM commands */
1427 
1428 /* Get fan target RPM */
1429 #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020
1430 
1431 struct __ec_align4 ec_response_pwm_get_fan_rpm {
1432 	uint32_t rpm;
1433 };
1434 
1435 /* Set target fan RPM */
1436 #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021
1437 
1438 /* Version 0 of input params */
1439 struct __ec_align4 ec_params_pwm_set_fan_target_rpm_v0 {
1440 	uint32_t rpm;
1441 };
1442 
1443 /* Version 1 of input params */
1444 struct __ec_align_size1 ec_params_pwm_set_fan_target_rpm_v1 {
1445 	uint32_t rpm;
1446 	uint8_t fan_idx;
1447 };
1448 
1449 /* Get keyboard backlight */
1450 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */
1451 #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022
1452 
1453 struct __ec_align1 ec_response_pwm_get_keyboard_backlight {
1454 	uint8_t percent;
1455 	uint8_t enabled;
1456 };
1457 
1458 /* Set keyboard backlight */
1459 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */
1460 #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023
1461 
1462 struct __ec_align1 ec_params_pwm_set_keyboard_backlight {
1463 	uint8_t percent;
1464 };
1465 
1466 /* Set target fan PWM duty cycle */
1467 #define EC_CMD_PWM_SET_FAN_DUTY 0x0024
1468 
1469 /* Version 0 of input params */
1470 struct __ec_align4 ec_params_pwm_set_fan_duty_v0 {
1471 	uint32_t percent;
1472 };
1473 
1474 /* Version 1 of input params */
1475 struct __ec_align_size1 ec_params_pwm_set_fan_duty_v1 {
1476 	uint32_t percent;
1477 	uint8_t fan_idx;
1478 };
1479 
1480 #define EC_CMD_PWM_SET_DUTY 0x0025
1481 /* 16 bit duty cycle, 0xffff = 100% */
1482 #define EC_PWM_MAX_DUTY 0xffff
1483 
1484 enum ec_pwm_type {
1485 	/* All types, indexed by board-specific enum pwm_channel */
1486 	EC_PWM_TYPE_GENERIC = 0,
1487 	/* Keyboard backlight */
1488 	EC_PWM_TYPE_KB_LIGHT,
1489 	/* Display backlight */
1490 	EC_PWM_TYPE_DISPLAY_LIGHT,
1491 	EC_PWM_TYPE_COUNT,
1492 };
1493 
1494 struct __ec_align4 ec_params_pwm_set_duty {
1495 	uint16_t duty;     /* Duty cycle, EC_PWM_MAX_DUTY = 100% */
1496 	uint8_t pwm_type;  /* ec_pwm_type */
1497 	uint8_t index;     /* Type-specific index, or 0 if unique */
1498 };
1499 
1500 #define EC_CMD_PWM_GET_DUTY 0x0026
1501 
1502 struct __ec_align1 ec_params_pwm_get_duty {
1503 	uint8_t pwm_type;  /* ec_pwm_type */
1504 	uint8_t index;     /* Type-specific index, or 0 if unique */
1505 };
1506 
1507 struct __ec_align2 ec_response_pwm_get_duty {
1508 	uint16_t duty;     /* Duty cycle, EC_PWM_MAX_DUTY = 100% */
1509 };
1510 
1511 /*****************************************************************************/
1512 /*
1513  * Lightbar commands. This looks worse than it is. Since we only use one HOST
1514  * command to say "talk to the lightbar", we put the "and tell it to do X" part
1515  * into a subcommand. We'll make separate structs for subcommands with
1516  * different input args, so that we know how much to expect.
1517  */
1518 #define EC_CMD_LIGHTBAR_CMD 0x0028
1519 
1520 struct __ec_todo_unpacked rgb_s {
1521 	uint8_t r, g, b;
1522 };
1523 
1524 #define LB_BATTERY_LEVELS 4
1525 /* List of tweakable parameters. NOTE: It's __packed so it can be sent in a
1526  * host command, but the alignment is the same regardless. Keep it that way.
1527  */
1528 struct __ec_todo_packed lightbar_params_v0 {
1529 	/* Timing */
1530 	int32_t google_ramp_up;
1531 	int32_t google_ramp_down;
1532 	int32_t s3s0_ramp_up;
1533 	int32_t s0_tick_delay[2];		/* AC=0/1 */
1534 	int32_t s0a_tick_delay[2];		/* AC=0/1 */
1535 	int32_t s0s3_ramp_down;
1536 	int32_t s3_sleep_for;
1537 	int32_t s3_ramp_up;
1538 	int32_t s3_ramp_down;
1539 
1540 	/* Oscillation */
1541 	uint8_t new_s0;
1542 	uint8_t osc_min[2];			/* AC=0/1 */
1543 	uint8_t osc_max[2];			/* AC=0/1 */
1544 	uint8_t w_ofs[2];			/* AC=0/1 */
1545 
1546 	/* Brightness limits based on the backlight and AC. */
1547 	uint8_t bright_bl_off_fixed[2];		/* AC=0/1 */
1548 	uint8_t bright_bl_on_min[2];		/* AC=0/1 */
1549 	uint8_t bright_bl_on_max[2];		/* AC=0/1 */
1550 
1551 	/* Battery level thresholds */
1552 	uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1553 
1554 	/* Map [AC][battery_level] to color index */
1555 	uint8_t s0_idx[2][LB_BATTERY_LEVELS];	/* AP is running */
1556 	uint8_t s3_idx[2][LB_BATTERY_LEVELS];	/* AP is sleeping */
1557 
1558 	/* Color palette */
1559 	struct rgb_s color[8];			/* 0-3 are Google colors */
1560 };
1561 
1562 struct __ec_todo_packed lightbar_params_v1 {
1563 	/* Timing */
1564 	int32_t google_ramp_up;
1565 	int32_t google_ramp_down;
1566 	int32_t s3s0_ramp_up;
1567 	int32_t s0_tick_delay[2];		/* AC=0/1 */
1568 	int32_t s0a_tick_delay[2];		/* AC=0/1 */
1569 	int32_t s0s3_ramp_down;
1570 	int32_t s3_sleep_for;
1571 	int32_t s3_ramp_up;
1572 	int32_t s3_ramp_down;
1573 	int32_t s5_ramp_up;
1574 	int32_t s5_ramp_down;
1575 	int32_t tap_tick_delay;
1576 	int32_t tap_gate_delay;
1577 	int32_t tap_display_time;
1578 
1579 	/* Tap-for-battery params */
1580 	uint8_t tap_pct_red;
1581 	uint8_t tap_pct_green;
1582 	uint8_t tap_seg_min_on;
1583 	uint8_t tap_seg_max_on;
1584 	uint8_t tap_seg_osc;
1585 	uint8_t tap_idx[3];
1586 
1587 	/* Oscillation */
1588 	uint8_t osc_min[2];			/* AC=0/1 */
1589 	uint8_t osc_max[2];			/* AC=0/1 */
1590 	uint8_t w_ofs[2];			/* AC=0/1 */
1591 
1592 	/* Brightness limits based on the backlight and AC. */
1593 	uint8_t bright_bl_off_fixed[2];		/* AC=0/1 */
1594 	uint8_t bright_bl_on_min[2];		/* AC=0/1 */
1595 	uint8_t bright_bl_on_max[2];		/* AC=0/1 */
1596 
1597 	/* Battery level thresholds */
1598 	uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1599 
1600 	/* Map [AC][battery_level] to color index */
1601 	uint8_t s0_idx[2][LB_BATTERY_LEVELS];	/* AP is running */
1602 	uint8_t s3_idx[2][LB_BATTERY_LEVELS];	/* AP is sleeping */
1603 
1604 	/* s5: single color pulse on inhibited power-up */
1605 	uint8_t s5_idx;
1606 
1607 	/* Color palette */
1608 	struct rgb_s color[8];			/* 0-3 are Google colors */
1609 };
1610 
1611 /* Lightbar command params v2
1612  * crbug.com/467716
1613  *
1614  * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by
1615  * logical groups to make it more manageable ( < 120 bytes).
1616  *
1617  * NOTE: Each of these groups must be less than 120 bytes.
1618  */
1619 
1620 struct __ec_todo_packed lightbar_params_v2_timing {
1621 	/* Timing */
1622 	int32_t google_ramp_up;
1623 	int32_t google_ramp_down;
1624 	int32_t s3s0_ramp_up;
1625 	int32_t s0_tick_delay[2];		/* AC=0/1 */
1626 	int32_t s0a_tick_delay[2];		/* AC=0/1 */
1627 	int32_t s0s3_ramp_down;
1628 	int32_t s3_sleep_for;
1629 	int32_t s3_ramp_up;
1630 	int32_t s3_ramp_down;
1631 	int32_t s5_ramp_up;
1632 	int32_t s5_ramp_down;
1633 	int32_t tap_tick_delay;
1634 	int32_t tap_gate_delay;
1635 	int32_t tap_display_time;
1636 };
1637 
1638 struct __ec_todo_packed lightbar_params_v2_tap {
1639 	/* Tap-for-battery params */
1640 	uint8_t tap_pct_red;
1641 	uint8_t tap_pct_green;
1642 	uint8_t tap_seg_min_on;
1643 	uint8_t tap_seg_max_on;
1644 	uint8_t tap_seg_osc;
1645 	uint8_t tap_idx[3];
1646 };
1647 
1648 struct __ec_todo_packed lightbar_params_v2_oscillation {
1649 	/* Oscillation */
1650 	uint8_t osc_min[2];			/* AC=0/1 */
1651 	uint8_t osc_max[2];			/* AC=0/1 */
1652 	uint8_t w_ofs[2];			/* AC=0/1 */
1653 };
1654 
1655 struct __ec_todo_packed lightbar_params_v2_brightness {
1656 	/* Brightness limits based on the backlight and AC. */
1657 	uint8_t bright_bl_off_fixed[2];		/* AC=0/1 */
1658 	uint8_t bright_bl_on_min[2];		/* AC=0/1 */
1659 	uint8_t bright_bl_on_max[2];		/* AC=0/1 */
1660 };
1661 
1662 struct __ec_todo_packed lightbar_params_v2_thresholds {
1663 	/* Battery level thresholds */
1664 	uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1665 };
1666 
1667 struct __ec_todo_packed lightbar_params_v2_colors {
1668 	/* Map [AC][battery_level] to color index */
1669 	uint8_t s0_idx[2][LB_BATTERY_LEVELS];	/* AP is running */
1670 	uint8_t s3_idx[2][LB_BATTERY_LEVELS];	/* AP is sleeping */
1671 
1672 	/* s5: single color pulse on inhibited power-up */
1673 	uint8_t s5_idx;
1674 
1675 	/* Color palette */
1676 	struct rgb_s color[8];			/* 0-3 are Google colors */
1677 };
1678 
1679 /* Lightbyte program. */
1680 #define EC_LB_PROG_LEN 192
1681 struct __ec_todo_unpacked lightbar_program {
1682 	uint8_t size;
1683 	uint8_t data[EC_LB_PROG_LEN];
1684 };
1685 
1686 struct __ec_todo_packed ec_params_lightbar {
1687 	uint8_t cmd;		      /* Command (see enum lightbar_command) */
1688 	union {
1689 		struct __ec_todo_unpacked {
1690 			/* no args */
1691 		} dump, off, on, init, get_seq, get_params_v0, get_params_v1,
1692 			version, get_brightness, get_demo, suspend, resume,
1693 			get_params_v2_timing, get_params_v2_tap,
1694 			get_params_v2_osc, get_params_v2_bright,
1695 			get_params_v2_thlds, get_params_v2_colors;
1696 
1697 		struct __ec_todo_unpacked {
1698 			uint8_t num;
1699 		} set_brightness, seq, demo;
1700 
1701 		struct __ec_todo_unpacked {
1702 			uint8_t ctrl, reg, value;
1703 		} reg;
1704 
1705 		struct __ec_todo_unpacked {
1706 			uint8_t led, red, green, blue;
1707 		} set_rgb;
1708 
1709 		struct __ec_todo_unpacked {
1710 			uint8_t led;
1711 		} get_rgb;
1712 
1713 		struct __ec_todo_unpacked {
1714 			uint8_t enable;
1715 		} manual_suspend_ctrl;
1716 
1717 		struct lightbar_params_v0 set_params_v0;
1718 		struct lightbar_params_v1 set_params_v1;
1719 
1720 		struct lightbar_params_v2_timing set_v2par_timing;
1721 		struct lightbar_params_v2_tap set_v2par_tap;
1722 		struct lightbar_params_v2_oscillation set_v2par_osc;
1723 		struct lightbar_params_v2_brightness set_v2par_bright;
1724 		struct lightbar_params_v2_thresholds set_v2par_thlds;
1725 		struct lightbar_params_v2_colors set_v2par_colors;
1726 
1727 		struct lightbar_program set_program;
1728 	};
1729 };
1730 
1731 struct __ec_todo_packed ec_response_lightbar {
1732 	union {
1733 		struct __ec_todo_unpacked {
1734 			struct __ec_todo_unpacked {
1735 				uint8_t reg;
1736 				uint8_t ic0;
1737 				uint8_t ic1;
1738 			} vals[23];
1739 		} dump;
1740 
1741 		struct __ec_todo_unpacked {
1742 			uint8_t num;
1743 		} get_seq, get_brightness, get_demo;
1744 
1745 		struct lightbar_params_v0 get_params_v0;
1746 		struct lightbar_params_v1 get_params_v1;
1747 
1748 
1749 		struct lightbar_params_v2_timing get_params_v2_timing;
1750 		struct lightbar_params_v2_tap get_params_v2_tap;
1751 		struct lightbar_params_v2_oscillation get_params_v2_osc;
1752 		struct lightbar_params_v2_brightness get_params_v2_bright;
1753 		struct lightbar_params_v2_thresholds get_params_v2_thlds;
1754 		struct lightbar_params_v2_colors get_params_v2_colors;
1755 
1756 		struct __ec_todo_unpacked {
1757 			uint32_t num;
1758 			uint32_t flags;
1759 		} version;
1760 
1761 		struct __ec_todo_unpacked {
1762 			uint8_t red, green, blue;
1763 		} get_rgb;
1764 
1765 		struct __ec_todo_unpacked {
1766 			/* no return params */
1767 		} off, on, init, set_brightness, seq, reg, set_rgb,
1768 			demo, set_params_v0, set_params_v1,
1769 			set_program, manual_suspend_ctrl, suspend, resume,
1770 			set_v2par_timing, set_v2par_tap,
1771 			set_v2par_osc, set_v2par_bright, set_v2par_thlds,
1772 			set_v2par_colors;
1773 	};
1774 };
1775 
1776 /* Lightbar commands */
1777 enum lightbar_command {
1778 	LIGHTBAR_CMD_DUMP = 0,
1779 	LIGHTBAR_CMD_OFF = 1,
1780 	LIGHTBAR_CMD_ON = 2,
1781 	LIGHTBAR_CMD_INIT = 3,
1782 	LIGHTBAR_CMD_SET_BRIGHTNESS = 4,
1783 	LIGHTBAR_CMD_SEQ = 5,
1784 	LIGHTBAR_CMD_REG = 6,
1785 	LIGHTBAR_CMD_SET_RGB = 7,
1786 	LIGHTBAR_CMD_GET_SEQ = 8,
1787 	LIGHTBAR_CMD_DEMO = 9,
1788 	LIGHTBAR_CMD_GET_PARAMS_V0 = 10,
1789 	LIGHTBAR_CMD_SET_PARAMS_V0 = 11,
1790 	LIGHTBAR_CMD_VERSION = 12,
1791 	LIGHTBAR_CMD_GET_BRIGHTNESS = 13,
1792 	LIGHTBAR_CMD_GET_RGB = 14,
1793 	LIGHTBAR_CMD_GET_DEMO = 15,
1794 	LIGHTBAR_CMD_GET_PARAMS_V1 = 16,
1795 	LIGHTBAR_CMD_SET_PARAMS_V1 = 17,
1796 	LIGHTBAR_CMD_SET_PROGRAM = 18,
1797 	LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19,
1798 	LIGHTBAR_CMD_SUSPEND = 20,
1799 	LIGHTBAR_CMD_RESUME = 21,
1800 	LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22,
1801 	LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23,
1802 	LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24,
1803 	LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25,
1804 	LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26,
1805 	LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27,
1806 	LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28,
1807 	LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29,
1808 	LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30,
1809 	LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31,
1810 	LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32,
1811 	LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33,
1812 	LIGHTBAR_NUM_CMDS
1813 };
1814 
1815 /*****************************************************************************/
1816 /* LED control commands */
1817 
1818 #define EC_CMD_LED_CONTROL 0x0029
1819 
1820 enum ec_led_id {
1821 	/* LED to indicate battery state of charge */
1822 	EC_LED_ID_BATTERY_LED = 0,
1823 	/*
1824 	 * LED to indicate system power state (on or in suspend).
1825 	 * May be on power button or on C-panel.
1826 	 */
1827 	EC_LED_ID_POWER_LED,
1828 	/* LED on power adapter or its plug */
1829 	EC_LED_ID_ADAPTER_LED,
1830 	/* LED to indicate left side */
1831 	EC_LED_ID_LEFT_LED,
1832 	/* LED to indicate right side */
1833 	EC_LED_ID_RIGHT_LED,
1834 	/* LED to indicate recovery mode with HW_REINIT */
1835 	EC_LED_ID_RECOVERY_HW_REINIT_LED,
1836 	/* LED to indicate sysrq debug mode. */
1837 	EC_LED_ID_SYSRQ_DEBUG_LED,
1838 
1839 	EC_LED_ID_COUNT
1840 };
1841 
1842 /* LED control flags */
1843 #define EC_LED_FLAGS_QUERY (1 << 0) /* Query LED capability only */
1844 #define EC_LED_FLAGS_AUTO  (1 << 1) /* Switch LED back to automatic control */
1845 
1846 enum ec_led_colors {
1847 	EC_LED_COLOR_RED = 0,
1848 	EC_LED_COLOR_GREEN,
1849 	EC_LED_COLOR_BLUE,
1850 	EC_LED_COLOR_YELLOW,
1851 	EC_LED_COLOR_WHITE,
1852 	EC_LED_COLOR_AMBER,
1853 
1854 	EC_LED_COLOR_COUNT
1855 };
1856 
1857 struct __ec_align1 ec_params_led_control {
1858 	uint8_t led_id;     /* Which LED to control */
1859 	uint8_t flags;      /* Control flags */
1860 
1861 	uint8_t brightness[EC_LED_COLOR_COUNT];
1862 };
1863 
1864 struct __ec_align1 ec_response_led_control {
1865 	/*
1866 	 * Available brightness value range.
1867 	 *
1868 	 * Range 0 means color channel not present.
1869 	 * Range 1 means on/off control.
1870 	 * Other values means the LED is control by PWM.
1871 	 */
1872 	uint8_t brightness_range[EC_LED_COLOR_COUNT];
1873 };
1874 
1875 /*****************************************************************************/
1876 /* Verified boot commands */
1877 
1878 /*
1879  * Note: command code 0x29 version 0 was VBOOT_CMD in Link EVT; it may be
1880  * reused for other purposes with version > 0.
1881  */
1882 
1883 /* Verified boot hash command */
1884 #define EC_CMD_VBOOT_HASH 0x002A
1885 
1886 struct __ec_align4 ec_params_vboot_hash {
1887 	uint8_t cmd;             /* enum ec_vboot_hash_cmd */
1888 	uint8_t hash_type;       /* enum ec_vboot_hash_type */
1889 	uint8_t nonce_size;      /* Nonce size; may be 0 */
1890 	uint8_t reserved0;       /* Reserved; set 0 */
1891 	uint32_t offset;         /* Offset in flash to hash */
1892 	uint32_t size;           /* Number of bytes to hash */
1893 	uint8_t nonce_data[64];  /* Nonce data; ignored if nonce_size=0 */
1894 };
1895 
1896 struct __ec_align4 ec_response_vboot_hash {
1897 	uint8_t status;          /* enum ec_vboot_hash_status */
1898 	uint8_t hash_type;       /* enum ec_vboot_hash_type */
1899 	uint8_t digest_size;     /* Size of hash digest in bytes */
1900 	uint8_t reserved0;       /* Ignore; will be 0 */
1901 	uint32_t offset;         /* Offset in flash which was hashed */
1902 	uint32_t size;           /* Number of bytes hashed */
1903 	uint8_t hash_digest[64]; /* Hash digest data */
1904 };
1905 
1906 enum ec_vboot_hash_cmd {
1907 	EC_VBOOT_HASH_GET = 0,       /* Get current hash status */
1908 	EC_VBOOT_HASH_ABORT = 1,     /* Abort calculating current hash */
1909 	EC_VBOOT_HASH_START = 2,     /* Start computing a new hash */
1910 	EC_VBOOT_HASH_RECALC = 3,    /* Synchronously compute a new hash */
1911 };
1912 
1913 enum ec_vboot_hash_type {
1914 	EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */
1915 };
1916 
1917 enum ec_vboot_hash_status {
1918 	EC_VBOOT_HASH_STATUS_NONE = 0, /* No hash (not started, or aborted) */
1919 	EC_VBOOT_HASH_STATUS_DONE = 1, /* Finished computing a hash */
1920 	EC_VBOOT_HASH_STATUS_BUSY = 2, /* Busy computing a hash */
1921 };
1922 
1923 /*
1924  * Special values for offset for EC_VBOOT_HASH_START and EC_VBOOT_HASH_RECALC.
1925  * If one of these is specified, the EC will automatically update offset and
1926  * size to the correct values for the specified image (RO or RW).
1927  */
1928 #define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe
1929 #define EC_VBOOT_HASH_OFFSET_RW 0xfffffffd
1930 
1931 /*****************************************************************************/
1932 /*
1933  * Motion sense commands. We'll make separate structs for sub-commands with
1934  * different input args, so that we know how much to expect.
1935  */
1936 #define EC_CMD_MOTION_SENSE_CMD 0x002B
1937 
1938 /* Motion sense commands */
1939 enum motionsense_command {
1940 	/*
1941 	 * Dump command returns all motion sensor data including motion sense
1942 	 * module flags and individual sensor flags.
1943 	 */
1944 	MOTIONSENSE_CMD_DUMP = 0,
1945 
1946 	/*
1947 	 * Info command returns data describing the details of a given sensor,
1948 	 * including enum motionsensor_type, enum motionsensor_location, and
1949 	 * enum motionsensor_chip.
1950 	 */
1951 	MOTIONSENSE_CMD_INFO = 1,
1952 
1953 	/*
1954 	 * EC Rate command is a setter/getter command for the EC sampling rate
1955 	 * in milliseconds.
1956 	 * It is per sensor, the EC run sample task  at the minimum of all
1957 	 * sensors EC_RATE.
1958 	 * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR
1959 	 * to collect all the sensor samples.
1960 	 * For sensor with hardware FIFO, EC_RATE is used as the maximal delay
1961 	 * to process of all motion sensors in milliseconds.
1962 	 */
1963 	MOTIONSENSE_CMD_EC_RATE = 2,
1964 
1965 	/*
1966 	 * Sensor ODR command is a setter/getter command for the output data
1967 	 * rate of a specific motion sensor in millihertz.
1968 	 */
1969 	MOTIONSENSE_CMD_SENSOR_ODR = 3,
1970 
1971 	/*
1972 	 * Sensor range command is a setter/getter command for the range of
1973 	 * a specified motion sensor in +/-G's or +/- deg/s.
1974 	 */
1975 	MOTIONSENSE_CMD_SENSOR_RANGE = 4,
1976 
1977 	/*
1978 	 * Setter/getter command for the keyboard wake angle. When the lid
1979 	 * angle is greater than this value, keyboard wake is disabled in S3,
1980 	 * and when the lid angle goes less than this value, keyboard wake is
1981 	 * enabled. Note, the lid angle measurement is an approximate,
1982 	 * un-calibrated value, hence the wake angle isn't exact.
1983 	 */
1984 	MOTIONSENSE_CMD_KB_WAKE_ANGLE = 5,
1985 
1986 	/*
1987 	 * Returns a single sensor data.
1988 	 */
1989 	MOTIONSENSE_CMD_DATA = 6,
1990 
1991 	/*
1992 	 * Return sensor fifo info.
1993 	 */
1994 	MOTIONSENSE_CMD_FIFO_INFO = 7,
1995 
1996 	/*
1997 	 * Insert a flush element in the fifo and return sensor fifo info.
1998 	 * The host can use that element to synchronize its operation.
1999 	 */
2000 	MOTIONSENSE_CMD_FIFO_FLUSH = 8,
2001 
2002 	/*
2003 	 * Return a portion of the fifo.
2004 	 */
2005 	MOTIONSENSE_CMD_FIFO_READ = 9,
2006 
2007 	/*
2008 	 * Perform low level calibration.
2009 	 * On sensors that support it, ask to do offset calibration.
2010 	 */
2011 	MOTIONSENSE_CMD_PERFORM_CALIB = 10,
2012 
2013 	/*
2014 	 * Sensor Offset command is a setter/getter command for the offset
2015 	 * used for calibration.
2016 	 * The offsets can be calculated by the host, or via
2017 	 * PERFORM_CALIB command.
2018 	 */
2019 	MOTIONSENSE_CMD_SENSOR_OFFSET = 11,
2020 
2021 	/*
2022 	 * List available activities for a MOTION sensor.
2023 	 * Indicates if they are enabled or disabled.
2024 	 */
2025 	MOTIONSENSE_CMD_LIST_ACTIVITIES = 12,
2026 
2027 	/*
2028 	 * Activity management
2029 	 * Enable/Disable activity recognition.
2030 	 */
2031 	MOTIONSENSE_CMD_SET_ACTIVITY = 13,
2032 
2033 	/*
2034 	 * Lid Angle
2035 	 */
2036 	MOTIONSENSE_CMD_LID_ANGLE = 14,
2037 
2038 	/*
2039 	 * Allow the FIFO to trigger interrupt via MKBP events.
2040 	 * By default the FIFO does not send interrupt to process the FIFO
2041 	 * until the AP is ready or it is coming from a wakeup sensor.
2042 	 */
2043 	MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15,
2044 
2045 	/*
2046 	 * Spoof the readings of the sensors.  The spoofed readings can be set
2047 	 * to arbitrary values, or will lock to the last read actual values.
2048 	 */
2049 	MOTIONSENSE_CMD_SPOOF = 16,
2050 
2051 	/* Number of motionsense sub-commands. */
2052 	MOTIONSENSE_NUM_CMDS
2053 };
2054 
2055 /* List of motion sensor types. */
2056 enum motionsensor_type {
2057 	MOTIONSENSE_TYPE_ACCEL = 0,
2058 	MOTIONSENSE_TYPE_GYRO = 1,
2059 	MOTIONSENSE_TYPE_MAG = 2,
2060 	MOTIONSENSE_TYPE_PROX = 3,
2061 	MOTIONSENSE_TYPE_LIGHT = 4,
2062 	MOTIONSENSE_TYPE_ACTIVITY = 5,
2063 	MOTIONSENSE_TYPE_BARO = 6,
2064 	MOTIONSENSE_TYPE_MAX,
2065 };
2066 
2067 /* List of motion sensor locations. */
2068 enum motionsensor_location {
2069 	MOTIONSENSE_LOC_BASE = 0,
2070 	MOTIONSENSE_LOC_LID = 1,
2071 	MOTIONSENSE_LOC_MAX,
2072 };
2073 
2074 /* List of motion sensor chips. */
2075 enum motionsensor_chip {
2076 	MOTIONSENSE_CHIP_KXCJ9 = 0,
2077 	MOTIONSENSE_CHIP_LSM6DS0 = 1,
2078 	MOTIONSENSE_CHIP_BMI160 = 2,
2079 	MOTIONSENSE_CHIP_SI1141 = 3,
2080 	MOTIONSENSE_CHIP_SI1142 = 4,
2081 	MOTIONSENSE_CHIP_SI1143 = 5,
2082 	MOTIONSENSE_CHIP_KX022 = 6,
2083 	MOTIONSENSE_CHIP_L3GD20H = 7,
2084 	MOTIONSENSE_CHIP_BMA255 = 8,
2085 	MOTIONSENSE_CHIP_BMP280 = 9,
2086 	MOTIONSENSE_CHIP_OPT3001 = 10,
2087 };
2088 
2089 struct __ec_todo_packed ec_response_motion_sensor_data {
2090 	/* Flags for each sensor. */
2091 	uint8_t flags;
2092 	/* sensor number the data comes from */
2093 	uint8_t sensor_num;
2094 	/* Each sensor is up to 3-axis. */
2095 	union {
2096 		int16_t             data[3];
2097 		struct __ec_todo_packed {
2098 			uint16_t    reserved;
2099 			uint32_t    timestamp;
2100 		};
2101 		struct __ec_todo_unpacked {
2102 			uint8_t     activity; /* motionsensor_activity */
2103 			uint8_t     state;
2104 			int16_t     add_info[2];
2105 		};
2106 	};
2107 };
2108 
2109 /* Note: used in ec_response_get_next_data */
2110 struct __ec_todo_packed ec_response_motion_sense_fifo_info {
2111 	/* Size of the fifo */
2112 	uint16_t size;
2113 	/* Amount of space used in the fifo */
2114 	uint16_t count;
2115 	/* Timestamp recorded in us */
2116 	uint32_t timestamp;
2117 	/* Total amount of vector lost */
2118 	uint16_t total_lost;
2119 	/* Lost events since the last fifo_info, per sensors */
2120 	uint16_t lost[0];
2121 };
2122 
2123 struct __ec_todo_packed ec_response_motion_sense_fifo_data {
2124 	uint32_t number_data;
2125 	struct ec_response_motion_sensor_data data[0];
2126 };
2127 
2128 /* List supported activity recognition */
2129 enum motionsensor_activity {
2130 	MOTIONSENSE_ACTIVITY_RESERVED = 0,
2131 	MOTIONSENSE_ACTIVITY_SIG_MOTION = 1,
2132 	MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2,
2133 };
2134 
2135 struct __ec_todo_unpacked ec_motion_sense_activity {
2136 	uint8_t sensor_num;
2137 	uint8_t activity; /* one of enum motionsensor_activity */
2138 	uint8_t enable;   /* 1: enable, 0: disable */
2139 	uint8_t reserved;
2140 	uint16_t parameters[3]; /* activity dependent parameters */
2141 };
2142 
2143 /* Module flag masks used for the dump sub-command. */
2144 #define MOTIONSENSE_MODULE_FLAG_ACTIVE (1<<0)
2145 
2146 /* Sensor flag masks used for the dump sub-command. */
2147 #define MOTIONSENSE_SENSOR_FLAG_PRESENT (1<<0)
2148 
2149 /*
2150  * Flush entry for synchronization.
2151  * data contains time stamp
2152  */
2153 #define MOTIONSENSE_SENSOR_FLAG_FLUSH (1<<0)
2154 #define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP (1<<1)
2155 #define MOTIONSENSE_SENSOR_FLAG_WAKEUP (1<<2)
2156 #define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE (1<<3)
2157 
2158 /*
2159  * Send this value for the data element to only perform a read. If you
2160  * send any other value, the EC will interpret it as data to set and will
2161  * return the actual value set.
2162  */
2163 #define EC_MOTION_SENSE_NO_VALUE -1
2164 
2165 #define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000
2166 
2167 /* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */
2168 /* Set Calibration information */
2169 #define MOTION_SENSE_SET_OFFSET 1
2170 
2171 #define LID_ANGLE_UNRELIABLE 500
2172 
2173 enum motionsense_spoof_mode {
2174 	/* Disable spoof mode. */
2175 	MOTIONSENSE_SPOOF_MODE_DISABLE = 0,
2176 
2177 	/* Enable spoof mode, but use provided component values. */
2178 	MOTIONSENSE_SPOOF_MODE_CUSTOM,
2179 
2180 	/* Enable spoof mode, but use the current sensor values. */
2181 	MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT,
2182 
2183 	/* Query the current spoof mode status for the sensor. */
2184 	MOTIONSENSE_SPOOF_MODE_QUERY,
2185 };
2186 
2187 struct __ec_todo_packed ec_params_motion_sense {
2188 	uint8_t cmd;
2189 	union {
2190 		/* Used for MOTIONSENSE_CMD_DUMP */
2191 		struct __ec_todo_unpacked {
2192 			/*
2193 			 * Maximal number of sensor the host is expecting.
2194 			 * 0 means the host is only interested in the number
2195 			 * of sensors controlled by the EC.
2196 			 */
2197 			uint8_t max_sensor_count;
2198 		} dump;
2199 
2200 		/*
2201 		 * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE.
2202 		 */
2203 		struct __ec_todo_unpacked {
2204 			/* Data to set or EC_MOTION_SENSE_NO_VALUE to read.
2205 			 * kb_wake_angle: angle to wakup AP.
2206 			 */
2207 			int16_t data;
2208 		} kb_wake_angle;
2209 
2210 		/* Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA
2211 		 * and MOTIONSENSE_CMD_PERFORM_CALIB. */
2212 		struct __ec_todo_unpacked {
2213 			uint8_t sensor_num;
2214 		} info, info_3, data, fifo_flush, perform_calib,
2215 				list_activities;
2216 
2217 		/*
2218 		 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR
2219 		 * and MOTIONSENSE_CMD_SENSOR_RANGE.
2220 		 */
2221 		struct __ec_todo_unpacked {
2222 			uint8_t sensor_num;
2223 
2224 			/* Rounding flag, true for round-up, false for down. */
2225 			uint8_t roundup;
2226 
2227 			uint16_t reserved;
2228 
2229 			/* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */
2230 			int32_t data;
2231 		} ec_rate, sensor_odr, sensor_range;
2232 
2233 		/* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */
2234 		struct __ec_todo_packed {
2235 			uint8_t sensor_num;
2236 
2237 			/*
2238 			 * bit 0: If set (MOTION_SENSE_SET_OFFSET), set
2239 			 * the calibration information in the EC.
2240 			 * If unset, just retrieve calibration information.
2241 			 */
2242 			uint16_t flags;
2243 
2244 			/*
2245 			 * Temperature at calibration, in units of 0.01 C
2246 			 * 0x8000: invalid / unknown.
2247 			 * 0x0: 0C
2248 			 * 0x7fff: +327.67C
2249 			 */
2250 			int16_t temp;
2251 
2252 			/*
2253 			 * Offset for calibration.
2254 			 * Unit:
2255 			 * Accelerometer: 1/1024 g
2256 			 * Gyro:          1/1024 deg/s
2257 			 * Compass:       1/16 uT
2258 			 */
2259 			int16_t offset[3];
2260 		} sensor_offset;
2261 
2262 		/* Used for MOTIONSENSE_CMD_FIFO_INFO */
2263 		struct __ec_todo_unpacked {
2264 		} fifo_info;
2265 
2266 		/* Used for MOTIONSENSE_CMD_FIFO_READ */
2267 		struct __ec_todo_unpacked {
2268 			/*
2269 			 * Number of expected vector to return.
2270 			 * EC may return less or 0 if none available.
2271 			 */
2272 			uint32_t max_data_vector;
2273 		} fifo_read;
2274 
2275 		struct ec_motion_sense_activity set_activity;
2276 
2277 		/* Used for MOTIONSENSE_CMD_LID_ANGLE */
2278 		struct __ec_todo_unpacked {
2279 		} lid_angle;
2280 
2281 		/* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */
2282 		struct __ec_todo_unpacked {
2283 			/*
2284 			 * 1: enable, 0 disable fifo,
2285 			 * EC_MOTION_SENSE_NO_VALUE return value.
2286 			 */
2287 			int8_t enable;
2288 		} fifo_int_enable;
2289 
2290 		/* Used for MOTIONSENSE_CMD_SPOOF */
2291 		struct __ec_todo_packed {
2292 			uint8_t sensor_id;
2293 
2294 			/* See enum motionsense_spoof_mode. */
2295 			uint8_t spoof_enable;
2296 
2297 			/* Ignored, used for alignment. */
2298 			uint8_t reserved;
2299 
2300 			/* Individual component values to spoof. */
2301 			int16_t components[3];
2302 		} spoof;
2303 	};
2304 };
2305 
2306 struct __ec_todo_packed ec_response_motion_sense {
2307 	union {
2308 		/* Used for MOTIONSENSE_CMD_DUMP */
2309 		struct __ec_todo_unpacked {
2310 			/* Flags representing the motion sensor module. */
2311 			uint8_t module_flags;
2312 
2313 			/* Number of sensors managed directly by the EC */
2314 			uint8_t sensor_count;
2315 
2316 			/*
2317 			 * sensor data is truncated if response_max is too small
2318 			 * for holding all the data.
2319 			 */
2320 			struct ec_response_motion_sensor_data sensor[0];
2321 		} dump;
2322 
2323 		/* Used for MOTIONSENSE_CMD_INFO. */
2324 		struct __ec_todo_unpacked {
2325 			/* Should be element of enum motionsensor_type. */
2326 			uint8_t type;
2327 
2328 			/* Should be element of enum motionsensor_location. */
2329 			uint8_t location;
2330 
2331 			/* Should be element of enum motionsensor_chip. */
2332 			uint8_t chip;
2333 		} info;
2334 
2335 		/* Used for MOTIONSENSE_CMD_INFO version 3 */
2336 		struct __ec_todo_unpacked {
2337 			/* Should be element of enum motionsensor_type. */
2338 			uint8_t type;
2339 
2340 			/* Should be element of enum motionsensor_location. */
2341 			uint8_t location;
2342 
2343 			/* Should be element of enum motionsensor_chip. */
2344 			uint8_t chip;
2345 
2346 			/* Minimum sensor sampling frequency */
2347 			uint32_t min_frequency;
2348 
2349 			/* Maximum sensor sampling frequency */
2350 			uint32_t max_frequency;
2351 
2352 			/* Max number of sensor events that could be in fifo */
2353 			uint32_t fifo_max_event_count;
2354 		} info_3;
2355 
2356 		/* Used for MOTIONSENSE_CMD_DATA */
2357 		struct ec_response_motion_sensor_data data;
2358 
2359 		/*
2360 		 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR,
2361 		 * MOTIONSENSE_CMD_SENSOR_RANGE,
2362 		 * MOTIONSENSE_CMD_KB_WAKE_ANGLE,
2363 		 * MOTIONSENSE_CMD_FIFO_INT_ENABLE and
2364 		 * MOTIONSENSE_CMD_SPOOF.
2365 		 */
2366 		struct __ec_todo_unpacked {
2367 			/* Current value of the parameter queried. */
2368 			int32_t ret;
2369 		} ec_rate, sensor_odr, sensor_range, kb_wake_angle,
2370 		  fifo_int_enable, spoof;
2371 
2372 		/* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */
2373 		struct __ec_todo_unpacked  {
2374 			int16_t temp;
2375 			int16_t offset[3];
2376 		} sensor_offset, perform_calib;
2377 
2378 		struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush;
2379 
2380 		struct ec_response_motion_sense_fifo_data fifo_read;
2381 
2382 		struct __ec_todo_packed {
2383 			uint16_t reserved;
2384 			uint32_t enabled;
2385 			uint32_t disabled;
2386 		} list_activities;
2387 
2388 		struct __ec_todo_unpacked {
2389 		} set_activity;
2390 
2391 		/* Used for MOTIONSENSE_CMD_LID_ANGLE */
2392 		struct __ec_todo_unpacked {
2393 			/*
2394 			 * Angle between 0 and 360 degree if available,
2395 			 * LID_ANGLE_UNRELIABLE otherwise.
2396 			 */
2397 			uint16_t value;
2398 		} lid_angle;
2399 	};
2400 };
2401 
2402 /*****************************************************************************/
2403 /* Force lid open command */
2404 
2405 /* Make lid event always open */
2406 #define EC_CMD_FORCE_LID_OPEN 0x002C
2407 
2408 struct __ec_align1 ec_params_force_lid_open {
2409 	uint8_t enabled;
2410 };
2411 
2412 /*****************************************************************************/
2413 /* Configure the behavior of the power button */
2414 #define EC_CMD_CONFIG_POWER_BUTTON 0x002D
2415 
2416 enum ec_config_power_button_flags {
2417 	/* Enable/Disable power button pulses for x86 devices */
2418 	EC_POWER_BUTTON_ENABLE_PULSE = (1 << 0),
2419 };
2420 
2421 struct __ec_align1 ec_params_config_power_button {
2422 	/* See enum ec_config_power_button_flags */
2423 	uint8_t flags;
2424 };
2425 
2426 /*****************************************************************************/
2427 /* USB charging control commands */
2428 
2429 /* Set USB port charging mode */
2430 #define EC_CMD_USB_CHARGE_SET_MODE 0x0030
2431 
2432 struct __ec_align1 ec_params_usb_charge_set_mode {
2433 	uint8_t usb_port_id;
2434 	uint8_t mode;
2435 };
2436 
2437 /*****************************************************************************/
2438 /* Persistent storage for host */
2439 
2440 /* Maximum bytes that can be read/written in a single command */
2441 #define EC_PSTORE_SIZE_MAX 64
2442 
2443 /* Get persistent storage info */
2444 #define EC_CMD_PSTORE_INFO 0x0040
2445 
2446 struct __ec_align4 ec_response_pstore_info {
2447 	/* Persistent storage size, in bytes */
2448 	uint32_t pstore_size;
2449 	/* Access size; read/write offset and size must be a multiple of this */
2450 	uint32_t access_size;
2451 };
2452 
2453 /*
2454  * Read persistent storage
2455  *
2456  * Response is params.size bytes of data.
2457  */
2458 #define EC_CMD_PSTORE_READ 0x0041
2459 
2460 struct __ec_align4 ec_params_pstore_read {
2461 	uint32_t offset;   /* Byte offset to read */
2462 	uint32_t size;     /* Size to read in bytes */
2463 };
2464 
2465 /* Write persistent storage */
2466 #define EC_CMD_PSTORE_WRITE 0x0042
2467 
2468 struct __ec_align4 ec_params_pstore_write {
2469 	uint32_t offset;   /* Byte offset to write */
2470 	uint32_t size;     /* Size to write in bytes */
2471 	uint8_t data[EC_PSTORE_SIZE_MAX];
2472 };
2473 
2474 /*****************************************************************************/
2475 /* Real-time clock */
2476 
2477 /* RTC params and response structures */
2478 struct __ec_align4 ec_params_rtc {
2479 	uint32_t time;
2480 };
2481 
2482 struct __ec_align4 ec_response_rtc {
2483 	uint32_t time;
2484 };
2485 
2486 /* These use ec_response_rtc */
2487 #define EC_CMD_RTC_GET_VALUE 0x0044
2488 #define EC_CMD_RTC_GET_ALARM 0x0045
2489 
2490 /* These all use ec_params_rtc */
2491 #define EC_CMD_RTC_SET_VALUE 0x0046
2492 #define EC_CMD_RTC_SET_ALARM 0x0047
2493 
2494 /* Pass as time param to SET_ALARM to clear the current alarm */
2495 #define EC_RTC_ALARM_CLEAR 0
2496 
2497 /*****************************************************************************/
2498 /* Port80 log access */
2499 
2500 /* Maximum entries that can be read/written in a single command */
2501 #define EC_PORT80_SIZE_MAX 32
2502 
2503 /* Get last port80 code from previous boot */
2504 #define EC_CMD_PORT80_LAST_BOOT 0x0048
2505 #define EC_CMD_PORT80_READ 0x0048
2506 
2507 enum ec_port80_subcmd {
2508 	EC_PORT80_GET_INFO = 0,
2509 	EC_PORT80_READ_BUFFER,
2510 };
2511 
2512 struct __ec_todo_packed ec_params_port80_read {
2513 	uint16_t subcmd;
2514 	union {
2515 		struct __ec_todo_unpacked {
2516 			uint32_t offset;
2517 			uint32_t num_entries;
2518 		} read_buffer;
2519 	};
2520 };
2521 
2522 struct __ec_todo_packed ec_response_port80_read {
2523 	union {
2524 		struct __ec_todo_unpacked {
2525 			uint32_t writes;
2526 			uint32_t history_size;
2527 			uint32_t last_boot;
2528 		} get_info;
2529 		struct __ec_todo_unpacked {
2530 			uint16_t codes[EC_PORT80_SIZE_MAX];
2531 		} data;
2532 	};
2533 };
2534 
2535 struct __ec_align2 ec_response_port80_last_boot {
2536 	uint16_t code;
2537 };
2538 
2539 /*****************************************************************************/
2540 /* Temporary secure storage for host verified boot use */
2541 
2542 /* Number of bytes in a vstore slot */
2543 #define EC_VSTORE_SLOT_SIZE 64
2544 
2545 /* Maximum number of vstore slots */
2546 #define EC_VSTORE_SLOT_MAX 32
2547 
2548 /* Get persistent storage info */
2549 #define EC_CMD_VSTORE_INFO 0x0049
2550 struct __ec_align_size1 ec_response_vstore_info {
2551 	/* Indicates which slots are locked */
2552 	uint32_t slot_locked;
2553 	/* Total number of slots available */
2554 	uint8_t slot_count;
2555 };
2556 
2557 /*
2558  * Read temporary secure storage
2559  *
2560  * Response is EC_VSTORE_SLOT_SIZE bytes of data.
2561  */
2562 #define EC_CMD_VSTORE_READ 0x004A
2563 
2564 struct __ec_align1 ec_params_vstore_read {
2565 	uint8_t slot; /* Slot to read from */
2566 };
2567 
2568 struct __ec_align1 ec_response_vstore_read {
2569 	uint8_t data[EC_VSTORE_SLOT_SIZE];
2570 };
2571 
2572 /*
2573  * Write temporary secure storage and lock it.
2574  */
2575 #define EC_CMD_VSTORE_WRITE 0x004B
2576 
2577 struct __ec_align1 ec_params_vstore_write {
2578 	uint8_t slot; /* Slot to write to */
2579 	uint8_t data[EC_VSTORE_SLOT_SIZE];
2580 };
2581 
2582 /*****************************************************************************/
2583 /* Thermal engine commands. Note that there are two implementations. We'll
2584  * reuse the command number, but the data and behavior is incompatible.
2585  * Version 0 is what originally shipped on Link.
2586  * Version 1 separates the CPU thermal limits from the fan control.
2587  */
2588 
2589 #define EC_CMD_THERMAL_SET_THRESHOLD 0x0050
2590 #define EC_CMD_THERMAL_GET_THRESHOLD 0x0051
2591 
2592 /* The version 0 structs are opaque. You have to know what they are for
2593  * the get/set commands to make any sense.
2594  */
2595 
2596 /* Version 0 - set */
2597 struct __ec_align2 ec_params_thermal_set_threshold {
2598 	uint8_t sensor_type;
2599 	uint8_t threshold_id;
2600 	uint16_t value;
2601 };
2602 
2603 /* Version 0 - get */
2604 struct __ec_align1 ec_params_thermal_get_threshold {
2605 	uint8_t sensor_type;
2606 	uint8_t threshold_id;
2607 };
2608 
2609 struct __ec_align2 ec_response_thermal_get_threshold {
2610 	uint16_t value;
2611 };
2612 
2613 
2614 /* The version 1 structs are visible. */
2615 enum ec_temp_thresholds {
2616 	EC_TEMP_THRESH_WARN = 0,
2617 	EC_TEMP_THRESH_HIGH,
2618 	EC_TEMP_THRESH_HALT,
2619 
2620 	EC_TEMP_THRESH_COUNT
2621 };
2622 
2623 /*
2624  * Thermal configuration for one temperature sensor. Temps are in degrees K.
2625  * Zero values will be silently ignored by the thermal task.
2626  *
2627  * Note that this structure is a sub-structure of
2628  * ec_params_thermal_set_threshold_v1, but maintains its alignment there.
2629  */
2630 struct __ec_align4 ec_thermal_config {
2631 	uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */
2632 	uint32_t temp_fan_off;		/* no active cooling needed */
2633 	uint32_t temp_fan_max;		/* max active cooling needed */
2634 };
2635 
2636 /* Version 1 - get config for one sensor. */
2637 struct __ec_align4 ec_params_thermal_get_threshold_v1 {
2638 	uint32_t sensor_num;
2639 };
2640 /* This returns a struct ec_thermal_config */
2641 
2642 /* Version 1 - set config for one sensor.
2643  * Use read-modify-write for best results! */
2644 struct __ec_align4 ec_params_thermal_set_threshold_v1 {
2645 	uint32_t sensor_num;
2646 	struct ec_thermal_config cfg;
2647 };
2648 /* This returns no data */
2649 
2650 /****************************************************************************/
2651 
2652 /* Toggle automatic fan control */
2653 #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052
2654 
2655 /* Version 1 of input params */
2656 struct __ec_align1 ec_params_auto_fan_ctrl_v1 {
2657 	uint8_t fan_idx;
2658 };
2659 
2660 /* Get/Set TMP006 calibration data */
2661 #define EC_CMD_TMP006_GET_CALIBRATION 0x0053
2662 #define EC_CMD_TMP006_SET_CALIBRATION 0x0054
2663 
2664 /*
2665  * The original TMP006 calibration only needed four params, but now we need
2666  * more. Since the algorithm is nothing but magic numbers anyway, we'll leave
2667  * the params opaque. The v1 "get" response will include the algorithm number
2668  * and how many params it requires. That way we can change the EC code without
2669  * needing to update this file. We can also use a different algorithm on each
2670  * sensor.
2671  */
2672 
2673 /* This is the same struct for both v0 and v1. */
2674 struct __ec_align1 ec_params_tmp006_get_calibration {
2675 	uint8_t index;
2676 };
2677 
2678 /* Version 0 */
2679 struct __ec_align4 ec_response_tmp006_get_calibration_v0 {
2680 	float s0;
2681 	float b0;
2682 	float b1;
2683 	float b2;
2684 };
2685 
2686 struct __ec_align4 ec_params_tmp006_set_calibration_v0 {
2687 	uint8_t index;
2688 	uint8_t reserved[3];
2689 	float s0;
2690 	float b0;
2691 	float b1;
2692 	float b2;
2693 };
2694 
2695 /* Version 1 */
2696 struct __ec_align4 ec_response_tmp006_get_calibration_v1 {
2697 	uint8_t algorithm;
2698 	uint8_t num_params;
2699 	uint8_t reserved[2];
2700 	float val[0];
2701 };
2702 
2703 struct __ec_align4 ec_params_tmp006_set_calibration_v1 {
2704 	uint8_t index;
2705 	uint8_t algorithm;
2706 	uint8_t num_params;
2707 	uint8_t reserved;
2708 	float val[0];
2709 };
2710 
2711 
2712 /* Read raw TMP006 data */
2713 #define EC_CMD_TMP006_GET_RAW 0x0055
2714 
2715 struct __ec_align1 ec_params_tmp006_get_raw {
2716 	uint8_t index;
2717 };
2718 
2719 struct __ec_align4 ec_response_tmp006_get_raw {
2720 	int32_t t;  /* In 1/100 K */
2721 	int32_t v;  /* In nV */
2722 };
2723 
2724 /*****************************************************************************/
2725 /* MKBP - Matrix KeyBoard Protocol */
2726 
2727 /*
2728  * Read key state
2729  *
2730  * Returns raw data for keyboard cols; see ec_response_mkbp_info.cols for
2731  * expected response size.
2732  *
2733  * NOTE: This has been superseded by EC_CMD_MKBP_GET_NEXT_EVENT.  If you wish
2734  * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type
2735  * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX.
2736  */
2737 #define EC_CMD_MKBP_STATE 0x0060
2738 
2739 /*
2740  * Provide information about various MKBP things.  See enum ec_mkbp_info_type.
2741  */
2742 #define EC_CMD_MKBP_INFO 0x0061
2743 
2744 struct __ec_align_size1 ec_response_mkbp_info {
2745 	uint32_t rows;
2746 	uint32_t cols;
2747 	/* Formerly "switches", which was 0. */
2748 	uint8_t reserved;
2749 };
2750 
2751 struct __ec_align1 ec_params_mkbp_info {
2752 	uint8_t info_type;
2753 	uint8_t event_type;
2754 };
2755 
2756 enum ec_mkbp_info_type {
2757 	/*
2758 	 * Info about the keyboard matrix: number of rows and columns.
2759 	 *
2760 	 * Returns struct ec_response_mkbp_info.
2761 	 */
2762 	EC_MKBP_INFO_KBD = 0,
2763 
2764 	/*
2765 	 * For buttons and switches, info about which specifically are
2766 	 * supported.  event_type must be set to one of the values in enum
2767 	 * ec_mkbp_event.
2768 	 *
2769 	 * For EC_MKBP_EVENT_BUTTON and EC_MKBP_EVENT_SWITCH, returns a 4 byte
2770 	 * bitmask indicating which buttons or switches are present.  See the
2771 	 * bit inidices below.
2772 	 */
2773 	EC_MKBP_INFO_SUPPORTED = 1,
2774 
2775 	/*
2776 	 * Instantaneous state of buttons and switches.
2777 	 *
2778 	 * event_type must be set to one of the values in enum ec_mkbp_event.
2779 	 *
2780 	 * For EC_MKBP_EVENT_KEY_MATRIX, returns uint8_t key_matrix[13]
2781 	 * indicating the current state of the keyboard matrix.
2782 	 *
2783 	 * For EC_MKBP_EVENT_HOST_EVENT, return uint32_t host_event, the raw
2784 	 * event state.
2785 	 *
2786 	 * For EC_MKBP_EVENT_BUTTON, returns uint32_t buttons, indicating the
2787 	 * state of supported buttons.
2788 	 *
2789 	 * For EC_MKBP_EVENT_SWITCH, returns uint32_t switches, indicating the
2790 	 * state of supported switches.
2791 	 */
2792 	EC_MKBP_INFO_CURRENT = 2,
2793 };
2794 
2795 /* Simulate key press */
2796 #define EC_CMD_MKBP_SIMULATE_KEY 0x0062
2797 
2798 struct __ec_align1 ec_params_mkbp_simulate_key {
2799 	uint8_t col;
2800 	uint8_t row;
2801 	uint8_t pressed;
2802 };
2803 
2804 /* Configure keyboard scanning */
2805 #define EC_CMD_MKBP_SET_CONFIG 0x0064
2806 #define EC_CMD_MKBP_GET_CONFIG 0x0065
2807 
2808 /* flags */
2809 enum mkbp_config_flags {
2810 	EC_MKBP_FLAGS_ENABLE = 1,	/* Enable keyboard scanning */
2811 };
2812 
2813 enum mkbp_config_valid {
2814 	EC_MKBP_VALID_SCAN_PERIOD		= 1 << 0,
2815 	EC_MKBP_VALID_POLL_TIMEOUT		= 1 << 1,
2816 	EC_MKBP_VALID_MIN_POST_SCAN_DELAY	= 1 << 3,
2817 	EC_MKBP_VALID_OUTPUT_SETTLE		= 1 << 4,
2818 	EC_MKBP_VALID_DEBOUNCE_DOWN		= 1 << 5,
2819 	EC_MKBP_VALID_DEBOUNCE_UP		= 1 << 6,
2820 	EC_MKBP_VALID_FIFO_MAX_DEPTH		= 1 << 7,
2821 };
2822 
2823 /*
2824  * Configuration for our key scanning algorithm.
2825  *
2826  * Note that this is used as a sub-structure of
2827  * ec_{params/response}_mkbp_get_config.
2828  */
2829 struct __ec_align_size1 ec_mkbp_config {
2830 	uint32_t valid_mask;		/* valid fields */
2831 	uint8_t flags;		/* some flags (enum mkbp_config_flags) */
2832 	uint8_t valid_flags;		/* which flags are valid */
2833 	uint16_t scan_period_us;	/* period between start of scans */
2834 	/* revert to interrupt mode after no activity for this long */
2835 	uint32_t poll_timeout_us;
2836 	/*
2837 	 * minimum post-scan relax time. Once we finish a scan we check
2838 	 * the time until we are due to start the next one. If this time is
2839 	 * shorter this field, we use this instead.
2840 	 */
2841 	uint16_t min_post_scan_delay_us;
2842 	/* delay between setting up output and waiting for it to settle */
2843 	uint16_t output_settle_us;
2844 	uint16_t debounce_down_us;	/* time for debounce on key down */
2845 	uint16_t debounce_up_us;	/* time for debounce on key up */
2846 	/* maximum depth to allow for fifo (0 = no keyscan output) */
2847 	uint8_t fifo_max_depth;
2848 };
2849 
2850 struct __ec_align_size1 ec_params_mkbp_set_config {
2851 	struct ec_mkbp_config config;
2852 };
2853 
2854 struct __ec_align_size1 ec_response_mkbp_get_config {
2855 	struct ec_mkbp_config config;
2856 };
2857 
2858 /* Run the key scan emulation */
2859 #define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066
2860 
2861 enum ec_keyscan_seq_cmd {
2862 	EC_KEYSCAN_SEQ_STATUS = 0,	/* Get status information */
2863 	EC_KEYSCAN_SEQ_CLEAR = 1,	/* Clear sequence */
2864 	EC_KEYSCAN_SEQ_ADD = 2,		/* Add item to sequence */
2865 	EC_KEYSCAN_SEQ_START = 3,	/* Start running sequence */
2866 	EC_KEYSCAN_SEQ_COLLECT = 4,	/* Collect sequence summary data */
2867 };
2868 
2869 enum ec_collect_flags {
2870 	/*
2871 	 * Indicates this scan was processed by the EC. Due to timing, some
2872 	 * scans may be skipped.
2873 	 */
2874 	EC_KEYSCAN_SEQ_FLAG_DONE	= 1 << 0,
2875 };
2876 
2877 struct __ec_align1 ec_collect_item {
2878 	uint8_t flags;		/* some flags (enum ec_collect_flags) */
2879 };
2880 
2881 struct __ec_todo_packed ec_params_keyscan_seq_ctrl {
2882 	uint8_t cmd;	/* Command to send (enum ec_keyscan_seq_cmd) */
2883 	union {
2884 		struct __ec_align1 {
2885 			uint8_t active;		/* still active */
2886 			uint8_t num_items;	/* number of items */
2887 			/* Current item being presented */
2888 			uint8_t cur_item;
2889 		} status;
2890 		struct __ec_todo_unpacked {
2891 			/*
2892 			 * Absolute time for this scan, measured from the
2893 			 * start of the sequence.
2894 			 */
2895 			uint32_t time_us;
2896 			uint8_t scan[0];	/* keyscan data */
2897 		} add;
2898 		struct __ec_align1 {
2899 			uint8_t start_item;	/* First item to return */
2900 			uint8_t num_items;	/* Number of items to return */
2901 		} collect;
2902 	};
2903 };
2904 
2905 struct __ec_todo_packed ec_result_keyscan_seq_ctrl {
2906 	union {
2907 		struct __ec_todo_unpacked {
2908 			uint8_t num_items;	/* Number of items */
2909 			/* Data for each item */
2910 			struct ec_collect_item item[0];
2911 		} collect;
2912 	};
2913 };
2914 
2915 /*
2916  * Get the next pending MKBP event.
2917  *
2918  * Returns EC_RES_UNAVAILABLE if there is no event pending.
2919  */
2920 #define EC_CMD_GET_NEXT_EVENT 0x0067
2921 
2922 enum ec_mkbp_event {
2923 	/* Keyboard matrix changed. The event data is the new matrix state. */
2924 	EC_MKBP_EVENT_KEY_MATRIX = 0,
2925 
2926 	/* New host event. The event data is 4 bytes of host event flags. */
2927 	EC_MKBP_EVENT_HOST_EVENT = 1,
2928 
2929 	/* New Sensor FIFO data. The event data is fifo_info structure. */
2930 	EC_MKBP_EVENT_SENSOR_FIFO = 2,
2931 
2932 	/* The state of the non-matrixed buttons have changed. */
2933 	EC_MKBP_EVENT_BUTTON = 3,
2934 
2935 	/* The state of the switches have changed. */
2936 	EC_MKBP_EVENT_SWITCH = 4,
2937 
2938 	/* New Fingerprint sensor event, the event data is fp_events bitmap. */
2939 	EC_MKBP_EVENT_FINGERPRINT = 5,
2940 
2941 	/*
2942 	 * Sysrq event: send emulated sysrq. The event data is sysrq,
2943 	 * corresponding to the key to be pressed.
2944 	 */
2945 	EC_MKBP_EVENT_SYSRQ = 6,
2946 
2947 	/* Number of MKBP events */
2948 	EC_MKBP_EVENT_COUNT,
2949 };
2950 
2951 union __ec_align_offset1 ec_response_get_next_data {
2952 	uint8_t key_matrix[13];
2953 
2954 	/* Unaligned */
2955 	uint32_t host_event;
2956 
2957 	struct __ec_todo_unpacked {
2958 		/* For aligning the fifo_info */
2959 		uint8_t reserved[3];
2960 		struct ec_response_motion_sense_fifo_info info;
2961 	} sensor_fifo;
2962 
2963 	uint32_t buttons;
2964 
2965 	uint32_t switches;
2966 
2967 	uint32_t fp_events;
2968 
2969 	uint32_t sysrq;
2970 };
2971 
2972 struct __ec_align1 ec_response_get_next_event {
2973 	uint8_t event_type;
2974 	/* Followed by event data if any */
2975 	union ec_response_get_next_data data;
2976 };
2977 
2978 /* Bit indices for buttons and switches.*/
2979 /* Buttons */
2980 #define EC_MKBP_POWER_BUTTON	0
2981 #define EC_MKBP_VOL_UP		1
2982 #define EC_MKBP_VOL_DOWN	2
2983 #define EC_MKBP_RECOVERY	3
2984 
2985 /* Switches */
2986 #define EC_MKBP_LID_OPEN	0
2987 #define EC_MKBP_TABLET_MODE	1
2988 
2989 /* Run keyboard factory test scanning */
2990 #define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068
2991 
2992 struct __ec_align2 ec_response_keyboard_factory_test {
2993 	uint16_t shorted;	/* Keyboard pins are shorted */
2994 };
2995 
2996 /* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */
2997 #define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF)
2998 #define EC_MKBP_FP_FINGER_DOWN          (1 << 29)
2999 #define EC_MKBP_FP_FINGER_UP            (1 << 30)
3000 #define EC_MKBP_FP_IMAGE_READY          (1 << 31)
3001 
3002 /*****************************************************************************/
3003 /* Temperature sensor commands */
3004 
3005 /* Read temperature sensor info */
3006 #define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070
3007 
3008 struct __ec_align1 ec_params_temp_sensor_get_info {
3009 	uint8_t id;
3010 };
3011 
3012 struct __ec_align1 ec_response_temp_sensor_get_info {
3013 	char sensor_name[32];
3014 	uint8_t sensor_type;
3015 };
3016 
3017 /*****************************************************************************/
3018 
3019 /*
3020  * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI
3021  * commands accidentally sent to the wrong interface.  See the ACPI section
3022  * below.
3023  */
3024 
3025 /*****************************************************************************/
3026 /* Host event commands */
3027 
3028 /*
3029  * Host event mask params and response structures, shared by all of the host
3030  * event commands below.
3031  */
3032 struct __ec_align4 ec_params_host_event_mask {
3033 	uint32_t mask;
3034 };
3035 
3036 struct __ec_align4 ec_response_host_event_mask {
3037 	uint32_t mask;
3038 };
3039 
3040 /* These all use ec_response_host_event_mask */
3041 #define EC_CMD_HOST_EVENT_GET_B         0x0087
3042 #define EC_CMD_HOST_EVENT_GET_SMI_MASK  0x0088
3043 #define EC_CMD_HOST_EVENT_GET_SCI_MASK  0x0089
3044 #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D
3045 
3046 /* These all use ec_params_host_event_mask */
3047 #define EC_CMD_HOST_EVENT_SET_SMI_MASK  0x008A
3048 #define EC_CMD_HOST_EVENT_SET_SCI_MASK  0x008B
3049 #define EC_CMD_HOST_EVENT_CLEAR         0x008C
3050 #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E
3051 #define EC_CMD_HOST_EVENT_CLEAR_B       0x008F
3052 
3053 /*****************************************************************************/
3054 /* Switch commands */
3055 
3056 /* Enable/disable LCD backlight */
3057 #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090
3058 
3059 struct __ec_align1 ec_params_switch_enable_backlight {
3060 	uint8_t enabled;
3061 };
3062 
3063 /* Enable/disable WLAN/Bluetooth */
3064 #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091
3065 #define EC_VER_SWITCH_ENABLE_WIRELESS 1
3066 
3067 /* Version 0 params; no response */
3068 struct __ec_align1 ec_params_switch_enable_wireless_v0 {
3069 	uint8_t enabled;
3070 };
3071 
3072 /* Version 1 params */
3073 struct __ec_align1 ec_params_switch_enable_wireless_v1 {
3074 	/* Flags to enable now */
3075 	uint8_t now_flags;
3076 
3077 	/* Which flags to copy from now_flags */
3078 	uint8_t now_mask;
3079 
3080 	/*
3081 	 * Flags to leave enabled in S3, if they're on at the S0->S3
3082 	 * transition.  (Other flags will be disabled by the S0->S3
3083 	 * transition.)
3084 	 */
3085 	uint8_t suspend_flags;
3086 
3087 	/* Which flags to copy from suspend_flags */
3088 	uint8_t suspend_mask;
3089 };
3090 
3091 /* Version 1 response */
3092 struct __ec_align1 ec_response_switch_enable_wireless_v1 {
3093 	/* Flags to enable now */
3094 	uint8_t now_flags;
3095 
3096 	/* Flags to leave enabled in S3 */
3097 	uint8_t suspend_flags;
3098 };
3099 
3100 /*****************************************************************************/
3101 /* GPIO commands. Only available on EC if write protect has been disabled. */
3102 
3103 /* Set GPIO output value */
3104 #define EC_CMD_GPIO_SET 0x0092
3105 
3106 struct __ec_align1 ec_params_gpio_set {
3107 	char name[32];
3108 	uint8_t val;
3109 };
3110 
3111 /* Get GPIO value */
3112 #define EC_CMD_GPIO_GET 0x0093
3113 
3114 /* Version 0 of input params and response */
3115 struct __ec_align1 ec_params_gpio_get {
3116 	char name[32];
3117 };
3118 
3119 struct __ec_align1 ec_response_gpio_get {
3120 	uint8_t val;
3121 };
3122 
3123 /* Version 1 of input params and response */
3124 struct __ec_align1 ec_params_gpio_get_v1 {
3125 	uint8_t subcmd;
3126 	union {
3127 		struct __ec_align1 {
3128 			char name[32];
3129 		} get_value_by_name;
3130 		struct __ec_align1 {
3131 			uint8_t index;
3132 		} get_info;
3133 	};
3134 };
3135 
3136 struct __ec_todo_packed ec_response_gpio_get_v1 {
3137 	union {
3138 		struct __ec_align1 {
3139 			uint8_t val;
3140 		} get_value_by_name, get_count;
3141 		struct __ec_todo_unpacked {
3142 			uint8_t val;
3143 			char name[32];
3144 			uint32_t flags;
3145 		} get_info;
3146 	};
3147 };
3148 
3149 enum gpio_get_subcmd {
3150 	EC_GPIO_GET_BY_NAME = 0,
3151 	EC_GPIO_GET_COUNT = 1,
3152 	EC_GPIO_GET_INFO = 2,
3153 };
3154 
3155 /*****************************************************************************/
3156 /* I2C commands. Only available when flash write protect is unlocked. */
3157 
3158 /*
3159  * CAUTION: These commands are deprecated, and are not supported anymore in EC
3160  * builds >= 8398.0.0 (see crosbug.com/p/23570).
3161  *
3162  * Use EC_CMD_I2C_PASSTHRU instead.
3163  */
3164 
3165 /* Read I2C bus */
3166 #define EC_CMD_I2C_READ 0x0094
3167 
3168 struct __ec_align_size1 ec_params_i2c_read {
3169 	uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
3170 	uint8_t read_size; /* Either 8 or 16. */
3171 	uint8_t port;
3172 	uint8_t offset;
3173 };
3174 
3175 struct __ec_align2 ec_response_i2c_read {
3176 	uint16_t data;
3177 };
3178 
3179 /* Write I2C bus */
3180 #define EC_CMD_I2C_WRITE 0x0095
3181 
3182 struct __ec_align_size1 ec_params_i2c_write {
3183 	uint16_t data;
3184 	uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
3185 	uint8_t write_size; /* Either 8 or 16. */
3186 	uint8_t port;
3187 	uint8_t offset;
3188 };
3189 
3190 /*****************************************************************************/
3191 /* Charge state commands. Only available when flash write protect unlocked. */
3192 
3193 /* Force charge state machine to stop charging the battery or force it to
3194  * discharge the battery.
3195  */
3196 #define EC_CMD_CHARGE_CONTROL 0x0096
3197 #define EC_VER_CHARGE_CONTROL 1
3198 
3199 enum ec_charge_control_mode {
3200 	CHARGE_CONTROL_NORMAL = 0,
3201 	CHARGE_CONTROL_IDLE,
3202 	CHARGE_CONTROL_DISCHARGE,
3203 };
3204 
3205 struct __ec_align4 ec_params_charge_control {
3206 	uint32_t mode;  /* enum charge_control_mode */
3207 };
3208 
3209 /*****************************************************************************/
3210 /* Console commands. Only available when flash write protect is unlocked. */
3211 
3212 /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */
3213 #define EC_CMD_CONSOLE_SNAPSHOT 0x0097
3214 
3215 /*
3216  * Read data from the saved snapshot. If the subcmd parameter is
3217  * CONSOLE_READ_NEXT, this will return data starting from the beginning of
3218  * the latest snapshot. If it is CONSOLE_READ_RECENT, it will start from the
3219  * end of the previous snapshot.
3220  *
3221  * The params are only looked at in version >= 1 of this command. Prior
3222  * versions will just default to CONSOLE_READ_NEXT behavior.
3223  *
3224  * Response is null-terminated string.  Empty string, if there is no more
3225  * remaining output.
3226  */
3227 #define EC_CMD_CONSOLE_READ 0x0098
3228 
3229 enum ec_console_read_subcmd {
3230 	CONSOLE_READ_NEXT = 0,
3231 	CONSOLE_READ_RECENT
3232 };
3233 
3234 struct __ec_align1 ec_params_console_read_v1 {
3235 	uint8_t subcmd; /* enum ec_console_read_subcmd */
3236 };
3237 
3238 /*****************************************************************************/
3239 
3240 /*
3241  * Cut off battery power immediately or after the host has shut down.
3242  *
3243  * return EC_RES_INVALID_COMMAND if unsupported by a board/battery.
3244  *	  EC_RES_SUCCESS if the command was successful.
3245  *	  EC_RES_ERROR if the cut off command failed.
3246  */
3247 #define EC_CMD_BATTERY_CUT_OFF 0x0099
3248 
3249 #define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN	(1 << 0)
3250 
3251 struct __ec_align1 ec_params_battery_cutoff {
3252 	uint8_t flags;
3253 };
3254 
3255 /*****************************************************************************/
3256 /* USB port mux control. */
3257 
3258 /*
3259  * Switch USB mux or return to automatic switching.
3260  */
3261 #define EC_CMD_USB_MUX 0x009A
3262 
3263 struct __ec_align1 ec_params_usb_mux {
3264 	uint8_t mux;
3265 };
3266 
3267 /*****************************************************************************/
3268 /* LDOs / FETs control. */
3269 
3270 enum ec_ldo_state {
3271 	EC_LDO_STATE_OFF = 0,	/* the LDO / FET is shut down */
3272 	EC_LDO_STATE_ON = 1,	/* the LDO / FET is ON / providing power */
3273 };
3274 
3275 /*
3276  * Switch on/off a LDO.
3277  */
3278 #define EC_CMD_LDO_SET 0x009B
3279 
3280 struct __ec_align1 ec_params_ldo_set {
3281 	uint8_t index;
3282 	uint8_t state;
3283 };
3284 
3285 /*
3286  * Get LDO state.
3287  */
3288 #define EC_CMD_LDO_GET 0x009C
3289 
3290 struct __ec_align1 ec_params_ldo_get {
3291 	uint8_t index;
3292 };
3293 
3294 struct __ec_align1 ec_response_ldo_get {
3295 	uint8_t state;
3296 };
3297 
3298 /*****************************************************************************/
3299 /* Power info. */
3300 
3301 /*
3302  * Get power info.
3303  */
3304 #define EC_CMD_POWER_INFO 0x009D
3305 
3306 struct __ec_align4 ec_response_power_info {
3307 	uint32_t usb_dev_type;
3308 	uint16_t voltage_ac;
3309 	uint16_t voltage_system;
3310 	uint16_t current_system;
3311 	uint16_t usb_current_limit;
3312 };
3313 
3314 /*****************************************************************************/
3315 /* I2C passthru command */
3316 
3317 #define EC_CMD_I2C_PASSTHRU 0x009E
3318 
3319 /* Read data; if not present, message is a write */
3320 #define EC_I2C_FLAG_READ	(1 << 15)
3321 
3322 /* Mask for address */
3323 #define EC_I2C_ADDR_MASK	0x3ff
3324 
3325 #define EC_I2C_STATUS_NAK	(1 << 0) /* Transfer was not acknowledged */
3326 #define EC_I2C_STATUS_TIMEOUT	(1 << 1) /* Timeout during transfer */
3327 
3328 /* Any error */
3329 #define EC_I2C_STATUS_ERROR	(EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT)
3330 
3331 struct __ec_align2 ec_params_i2c_passthru_msg {
3332 	uint16_t addr_flags;	/* I2C slave address (7 or 10 bits) and flags */
3333 	uint16_t len;		/* Number of bytes to read or write */
3334 };
3335 
3336 struct __ec_align2 ec_params_i2c_passthru {
3337 	uint8_t port;		/* I2C port number */
3338 	uint8_t num_msgs;	/* Number of messages */
3339 	struct ec_params_i2c_passthru_msg msg[];
3340 	/* Data to write for all messages is concatenated here */
3341 };
3342 
3343 struct __ec_align1 ec_response_i2c_passthru {
3344 	uint8_t i2c_status;	/* Status flags (EC_I2C_STATUS_...) */
3345 	uint8_t num_msgs;	/* Number of messages processed */
3346 	uint8_t data[];		/* Data read by messages concatenated here */
3347 };
3348 
3349 /*****************************************************************************/
3350 /* Power button hang detect */
3351 
3352 #define EC_CMD_HANG_DETECT 0x009F
3353 
3354 /* Reasons to start hang detection timer */
3355 /* Power button pressed */
3356 #define EC_HANG_START_ON_POWER_PRESS  (1 << 0)
3357 
3358 /* Lid closed */
3359 #define EC_HANG_START_ON_LID_CLOSE    (1 << 1)
3360 
3361  /* Lid opened */
3362 #define EC_HANG_START_ON_LID_OPEN     (1 << 2)
3363 
3364 /* Start of AP S3->S0 transition (booting or resuming from suspend) */
3365 #define EC_HANG_START_ON_RESUME       (1 << 3)
3366 
3367 /* Reasons to cancel hang detection */
3368 
3369 /* Power button released */
3370 #define EC_HANG_STOP_ON_POWER_RELEASE (1 << 8)
3371 
3372 /* Any host command from AP received */
3373 #define EC_HANG_STOP_ON_HOST_COMMAND  (1 << 9)
3374 
3375 /* Stop on end of AP S0->S3 transition (suspending or shutting down) */
3376 #define EC_HANG_STOP_ON_SUSPEND       (1 << 10)
3377 
3378 /*
3379  * If this flag is set, all the other fields are ignored, and the hang detect
3380  * timer is started.  This provides the AP a way to start the hang timer
3381  * without reconfiguring any of the other hang detect settings.  Note that
3382  * you must previously have configured the timeouts.
3383  */
3384 #define EC_HANG_START_NOW             (1 << 30)
3385 
3386 /*
3387  * If this flag is set, all the other fields are ignored (including
3388  * EC_HANG_START_NOW).  This provides the AP a way to stop the hang timer
3389  * without reconfiguring any of the other hang detect settings.
3390  */
3391 #define EC_HANG_STOP_NOW              (1 << 31)
3392 
3393 struct __ec_align4 ec_params_hang_detect {
3394 	/* Flags; see EC_HANG_* */
3395 	uint32_t flags;
3396 
3397 	/* Timeout in msec before generating host event, if enabled */
3398 	uint16_t host_event_timeout_msec;
3399 
3400 	/* Timeout in msec before generating warm reboot, if enabled */
3401 	uint16_t warm_reboot_timeout_msec;
3402 };
3403 
3404 /*****************************************************************************/
3405 /* Commands for battery charging */
3406 
3407 /*
3408  * This is the single catch-all host command to exchange data regarding the
3409  * charge state machine (v2 and up).
3410  */
3411 #define EC_CMD_CHARGE_STATE 0x00A0
3412 
3413 /* Subcommands for this host command */
3414 enum charge_state_command {
3415 	CHARGE_STATE_CMD_GET_STATE,
3416 	CHARGE_STATE_CMD_GET_PARAM,
3417 	CHARGE_STATE_CMD_SET_PARAM,
3418 	CHARGE_STATE_NUM_CMDS
3419 };
3420 
3421 /*
3422  * Known param numbers are defined here. Ranges are reserved for board-specific
3423  * params, which are handled by the particular implementations.
3424  */
3425 enum charge_state_params {
3426 	CS_PARAM_CHG_VOLTAGE,	      /* charger voltage limit */
3427 	CS_PARAM_CHG_CURRENT,	      /* charger current limit */
3428 	CS_PARAM_CHG_INPUT_CURRENT,   /* charger input current limit */
3429 	CS_PARAM_CHG_STATUS,	      /* charger-specific status */
3430 	CS_PARAM_CHG_OPTION,	      /* charger-specific options */
3431 	CS_PARAM_LIMIT_POWER,	      /*
3432 				       * Check if power is limited due to
3433 				       * low battery and / or a weak external
3434 				       * charger. READ ONLY.
3435 				       */
3436 	/* How many so far? */
3437 	CS_NUM_BASE_PARAMS,
3438 
3439 	/* Range for CONFIG_CHARGER_PROFILE_OVERRIDE params */
3440 	CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000,
3441 	CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff,
3442 
3443 	/* Other custom param ranges go here... */
3444 };
3445 
3446 struct __ec_todo_packed ec_params_charge_state {
3447 	uint8_t cmd;				/* enum charge_state_command */
3448 	union {
3449 		struct __ec_align1 {
3450 			/* no args */
3451 		} get_state;
3452 
3453 		struct __ec_todo_unpacked {
3454 			uint32_t param;		/* enum charge_state_param */
3455 		} get_param;
3456 
3457 		struct __ec_todo_unpacked {
3458 			uint32_t param;		/* param to set */
3459 			uint32_t value;		/* value to set */
3460 		} set_param;
3461 	};
3462 };
3463 
3464 struct __ec_align4 ec_response_charge_state {
3465 	union {
3466 		struct __ec_align4 {
3467 			int ac;
3468 			int chg_voltage;
3469 			int chg_current;
3470 			int chg_input_current;
3471 			int batt_state_of_charge;
3472 		} get_state;
3473 
3474 		struct __ec_align4 {
3475 			uint32_t value;
3476 		} get_param;
3477 		struct __ec_align4 {
3478 			/* no return values */
3479 		} set_param;
3480 	};
3481 };
3482 
3483 
3484 /*
3485  * Set maximum battery charging current.
3486  */
3487 #define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1
3488 
3489 struct __ec_align4 ec_params_current_limit {
3490 	uint32_t limit; /* in mA */
3491 };
3492 
3493 /*
3494  * Set maximum external voltage / current.
3495  */
3496 #define EC_CMD_EXTERNAL_POWER_LIMIT 0x00A2
3497 
3498 /* Command v0 is used only on Spring and is obsolete + unsupported */
3499 struct __ec_align2 ec_params_external_power_limit_v1 {
3500 	uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */
3501 	uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */
3502 };
3503 
3504 #define EC_POWER_LIMIT_NONE 0xffff
3505 
3506 /*****************************************************************************/
3507 /* Hibernate/Deep Sleep Commands */
3508 
3509 /* Set the delay before going into hibernation. */
3510 #define EC_CMD_HIBERNATION_DELAY 0x00A8
3511 
3512 struct __ec_align4 ec_params_hibernation_delay {
3513 	/*
3514 	 * Seconds to wait in G3 before hibernate.  Pass in 0 to read the
3515 	 * current settings without changing them.
3516 	 */
3517 	uint32_t seconds;
3518 };
3519 
3520 struct __ec_align4 ec_response_hibernation_delay {
3521 	/*
3522 	 * The current time in seconds in which the system has been in the G3
3523 	 * state.  This value is reset if the EC transitions out of G3.
3524 	 */
3525 	uint32_t time_g3;
3526 
3527 	/*
3528 	 * The current time remaining in seconds until the EC should hibernate.
3529 	 * This value is also reset if the EC transitions out of G3.
3530 	 */
3531 	uint32_t time_remaining;
3532 
3533 	/*
3534 	 * The current time in seconds that the EC should wait in G3 before
3535 	 * hibernating.
3536 	 */
3537 	uint32_t hibernate_delay;
3538 };
3539 
3540 /* Inform the EC when entering a sleep state */
3541 #define EC_CMD_HOST_SLEEP_EVENT 0x00A9
3542 
3543 enum host_sleep_event {
3544 	HOST_SLEEP_EVENT_S3_SUSPEND   = 1,
3545 	HOST_SLEEP_EVENT_S3_RESUME    = 2,
3546 	HOST_SLEEP_EVENT_S0IX_SUSPEND = 3,
3547 	HOST_SLEEP_EVENT_S0IX_RESUME  = 4
3548 };
3549 
3550 struct __ec_align1 ec_params_host_sleep_event {
3551 	uint8_t sleep_event;
3552 };
3553 
3554 /*****************************************************************************/
3555 /* Device events */
3556 #define EC_CMD_DEVICE_EVENT 0x00AA
3557 
3558 enum ec_device_event {
3559 	EC_DEVICE_EVENT_TRACKPAD,
3560 	EC_DEVICE_EVENT_DSP,
3561 	EC_DEVICE_EVENT_WIFI,
3562 };
3563 
3564 enum ec_device_event_param {
3565 	/* Get and clear pending device events */
3566 	EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS,
3567 	/* Get device event mask */
3568 	EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS,
3569 	/* Set device event mask */
3570 	EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS,
3571 };
3572 
3573 #define EC_DEVICE_EVENT_MASK(event_code) (1UL << (event_code % 32))
3574 
3575 struct __ec_align_size1 ec_params_device_event {
3576 	uint32_t event_mask;
3577 	uint8_t param;
3578 };
3579 
3580 struct __ec_align4 ec_response_device_event {
3581 	uint32_t event_mask;
3582 };
3583 
3584 /*****************************************************************************/
3585 /* Smart battery pass-through */
3586 
3587 /* Get / Set 16-bit smart battery registers */
3588 #define EC_CMD_SB_READ_WORD   0x00B0
3589 #define EC_CMD_SB_WRITE_WORD  0x00B1
3590 
3591 /* Get / Set string smart battery parameters
3592  * formatted as SMBUS "block".
3593  */
3594 #define EC_CMD_SB_READ_BLOCK  0x00B2
3595 #define EC_CMD_SB_WRITE_BLOCK 0x00B3
3596 
3597 struct __ec_align1 ec_params_sb_rd {
3598 	uint8_t reg;
3599 };
3600 
3601 struct __ec_align2 ec_response_sb_rd_word {
3602 	uint16_t value;
3603 };
3604 
3605 struct __ec_align1 ec_params_sb_wr_word {
3606 	uint8_t reg;
3607 	uint16_t value;
3608 };
3609 
3610 struct __ec_align1 ec_response_sb_rd_block {
3611 	uint8_t data[32];
3612 };
3613 
3614 struct __ec_align1 ec_params_sb_wr_block {
3615 	uint8_t reg;
3616 	uint16_t data[32];
3617 };
3618 
3619 /*****************************************************************************/
3620 /* Battery vendor parameters
3621  *
3622  * Get or set vendor-specific parameters in the battery. Implementations may
3623  * differ between boards or batteries. On a set operation, the response
3624  * contains the actual value set, which may be rounded or clipped from the
3625  * requested value.
3626  */
3627 
3628 #define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4
3629 
3630 enum ec_battery_vendor_param_mode {
3631 	BATTERY_VENDOR_PARAM_MODE_GET = 0,
3632 	BATTERY_VENDOR_PARAM_MODE_SET,
3633 };
3634 
3635 struct __ec_align_size1 ec_params_battery_vendor_param {
3636 	uint32_t param;
3637 	uint32_t value;
3638 	uint8_t mode;
3639 };
3640 
3641 struct __ec_align4 ec_response_battery_vendor_param {
3642 	uint32_t value;
3643 };
3644 
3645 /*****************************************************************************/
3646 /*
3647  * Smart Battery Firmware Update Commands
3648  */
3649 #define EC_CMD_SB_FW_UPDATE 0x00B5
3650 
3651 enum ec_sb_fw_update_subcmd {
3652 	EC_SB_FW_UPDATE_PREPARE  = 0x0,
3653 	EC_SB_FW_UPDATE_INFO     = 0x1, /*query sb info */
3654 	EC_SB_FW_UPDATE_BEGIN    = 0x2, /*check if protected */
3655 	EC_SB_FW_UPDATE_WRITE    = 0x3, /*check if protected */
3656 	EC_SB_FW_UPDATE_END      = 0x4,
3657 	EC_SB_FW_UPDATE_STATUS   = 0x5,
3658 	EC_SB_FW_UPDATE_PROTECT  = 0x6,
3659 	EC_SB_FW_UPDATE_MAX      = 0x7,
3660 };
3661 
3662 #define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32
3663 #define SB_FW_UPDATE_CMD_STATUS_SIZE 2
3664 #define SB_FW_UPDATE_CMD_INFO_SIZE 8
3665 
3666 struct __ec_align4 ec_sb_fw_update_header {
3667 	uint16_t subcmd;  /* enum ec_sb_fw_update_subcmd */
3668 	uint16_t fw_id;   /* firmware id */
3669 };
3670 
3671 struct __ec_align4 ec_params_sb_fw_update {
3672 	struct ec_sb_fw_update_header hdr;
3673 	union {
3674 		/* EC_SB_FW_UPDATE_PREPARE  = 0x0 */
3675 		/* EC_SB_FW_UPDATE_INFO     = 0x1 */
3676 		/* EC_SB_FW_UPDATE_BEGIN    = 0x2 */
3677 		/* EC_SB_FW_UPDATE_END      = 0x4 */
3678 		/* EC_SB_FW_UPDATE_STATUS   = 0x5 */
3679 		/* EC_SB_FW_UPDATE_PROTECT  = 0x6 */
3680 		struct __ec_align4 {
3681 			/* no args */
3682 		} dummy;
3683 
3684 		/* EC_SB_FW_UPDATE_WRITE    = 0x3 */
3685 		struct __ec_align4 {
3686 			uint8_t  data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE];
3687 		} write;
3688 	};
3689 };
3690 
3691 struct __ec_align1 ec_response_sb_fw_update {
3692 	union {
3693 		/* EC_SB_FW_UPDATE_INFO     = 0x1 */
3694 		struct __ec_align1 {
3695 			uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE];
3696 		} info;
3697 
3698 		/* EC_SB_FW_UPDATE_STATUS   = 0x5 */
3699 		struct __ec_align1 {
3700 			uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE];
3701 		} status;
3702 	};
3703 };
3704 
3705 /*
3706  * Entering Verified Boot Mode Command
3707  * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command.
3708  * Valid Modes are: normal, developer, and recovery.
3709  */
3710 #define EC_CMD_ENTERING_MODE 0x00B6
3711 
3712 struct __ec_align4 ec_params_entering_mode {
3713 	int vboot_mode;
3714 };
3715 
3716 #define VBOOT_MODE_NORMAL    0
3717 #define VBOOT_MODE_DEVELOPER 1
3718 #define VBOOT_MODE_RECOVERY  2
3719 
3720 /*****************************************************************************/
3721 /*
3722  * I2C passthru protection command: Protects I2C tunnels against access on
3723  * certain addresses (board-specific).
3724  */
3725 #define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7
3726 
3727 enum ec_i2c_passthru_protect_subcmd {
3728 	EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0,
3729 	EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1,
3730 };
3731 
3732 struct __ec_align1 ec_params_i2c_passthru_protect {
3733 	uint8_t subcmd;
3734 	uint8_t port;		/* I2C port number */
3735 };
3736 
3737 struct __ec_align1 ec_response_i2c_passthru_protect {
3738 	uint8_t status;		/* Status flags (0: unlocked, 1: locked) */
3739 };
3740 
3741 /*****************************************************************************/
3742 /* System commands */
3743 
3744 /*
3745  * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't
3746  * necessarily reboot the EC.  Rename to "image" or something similar?
3747  */
3748 #define EC_CMD_REBOOT_EC 0x00D2
3749 
3750 /* Command */
3751 enum ec_reboot_cmd {
3752 	EC_REBOOT_CANCEL = 0,        /* Cancel a pending reboot */
3753 	EC_REBOOT_JUMP_RO = 1,       /* Jump to RO without rebooting */
3754 	EC_REBOOT_JUMP_RW = 2,       /* Jump to RW without rebooting */
3755 	/* (command 3 was jump to RW-B) */
3756 	EC_REBOOT_COLD = 4,          /* Cold-reboot */
3757 	EC_REBOOT_DISABLE_JUMP = 5,  /* Disable jump until next reboot */
3758 	EC_REBOOT_HIBERNATE = 6      /* Hibernate EC */
3759 };
3760 
3761 /* Flags for ec_params_reboot_ec.reboot_flags */
3762 #define EC_REBOOT_FLAG_RESERVED0      (1 << 0)  /* Was recovery request */
3763 #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN (1 << 1)  /* Reboot after AP shutdown */
3764 
3765 struct __ec_align1 ec_params_reboot_ec {
3766 	uint8_t cmd;           /* enum ec_reboot_cmd */
3767 	uint8_t flags;         /* See EC_REBOOT_FLAG_* */
3768 };
3769 
3770 /*
3771  * Get information on last EC panic.
3772  *
3773  * Returns variable-length platform-dependent panic information.  See panic.h
3774  * for details.
3775  */
3776 #define EC_CMD_GET_PANIC_INFO 0x00D3
3777 
3778 /*****************************************************************************/
3779 /*
3780  * Special commands
3781  *
3782  * These do not follow the normal rules for commands.  See each command for
3783  * details.
3784  */
3785 
3786 /*
3787  * Reboot NOW
3788  *
3789  * This command will work even when the EC LPC interface is busy, because the
3790  * reboot command is processed at interrupt level.  Note that when the EC
3791  * reboots, the host will reboot too, so there is no response to this command.
3792  *
3793  * Use EC_CMD_REBOOT_EC to reboot the EC more politely.
3794  */
3795 #define EC_CMD_REBOOT 0x00D1  /* Think "die" */
3796 
3797 /*
3798  * Resend last response (not supported on LPC).
3799  *
3800  * Returns EC_RES_UNAVAILABLE if there is no response available - for example,
3801  * there was no previous command, or the previous command's response was too
3802  * big to save.
3803  */
3804 #define EC_CMD_RESEND_RESPONSE 0x00DB
3805 
3806 /*
3807  * This header byte on a command indicate version 0. Any header byte less
3808  * than this means that we are talking to an old EC which doesn't support
3809  * versioning. In that case, we assume version 0.
3810  *
3811  * Header bytes greater than this indicate a later version. For example,
3812  * EC_CMD_VERSION0 + 1 means we are using version 1.
3813  *
3814  * The old EC interface must not use commands 0xdc or higher.
3815  */
3816 #define EC_CMD_VERSION0 0x00DC
3817 
3818 /*****************************************************************************/
3819 /*
3820  * PD commands
3821  *
3822  * These commands are for PD MCU communication.
3823  */
3824 
3825 /* EC to PD MCU exchange status command */
3826 #define EC_CMD_PD_EXCHANGE_STATUS 0x0100
3827 #define EC_VER_PD_EXCHANGE_STATUS 2
3828 
3829 enum pd_charge_state {
3830 	PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */
3831 	PD_CHARGE_NONE,          /* No charging allowed */
3832 	PD_CHARGE_5V,            /* 5V charging only */
3833 	PD_CHARGE_MAX            /* Charge at max voltage */
3834 };
3835 
3836 /* Status of EC being sent to PD */
3837 #define EC_STATUS_HIBERNATING	(1 << 0)
3838 
3839 struct __ec_align1 ec_params_pd_status {
3840 	uint8_t status;       /* EC status */
3841 	int8_t batt_soc;      /* battery state of charge */
3842 	uint8_t charge_state; /* charging state (from enum pd_charge_state) */
3843 };
3844 
3845 /* Status of PD being sent back to EC */
3846 #define PD_STATUS_HOST_EVENT      (1 << 0) /* Forward host event to AP */
3847 #define PD_STATUS_IN_RW           (1 << 1) /* Running RW image */
3848 #define PD_STATUS_JUMPED_TO_IMAGE (1 << 2) /* Current image was jumped to */
3849 #define PD_STATUS_TCPC_ALERT_0    (1 << 3) /* Alert active in port 0 TCPC */
3850 #define PD_STATUS_TCPC_ALERT_1    (1 << 4) /* Alert active in port 1 TCPC */
3851 #define PD_STATUS_TCPC_ALERT_2    (1 << 5) /* Alert active in port 2 TCPC */
3852 #define PD_STATUS_TCPC_ALERT_3    (1 << 6) /* Alert active in port 3 TCPC */
3853 #define PD_STATUS_EC_INT_ACTIVE  (PD_STATUS_TCPC_ALERT_0 | \
3854 				      PD_STATUS_TCPC_ALERT_1 | \
3855 				      PD_STATUS_HOST_EVENT)
3856 struct __ec_align_size1 ec_response_pd_status {
3857 	uint32_t curr_lim_ma;       /* input current limit */
3858 	uint16_t status;            /* PD MCU status */
3859 	int8_t active_charge_port;  /* active charging port */
3860 };
3861 
3862 /* AP to PD MCU host event status command, cleared on read */
3863 #define EC_CMD_PD_HOST_EVENT_STATUS 0x0104
3864 
3865 /* PD MCU host event status bits */
3866 #define PD_EVENT_UPDATE_DEVICE     (1 << 0)
3867 #define PD_EVENT_POWER_CHANGE      (1 << 1)
3868 #define PD_EVENT_IDENTITY_RECEIVED (1 << 2)
3869 #define PD_EVENT_DATA_SWAP         (1 << 3)
3870 struct __ec_align4 ec_response_host_event_status {
3871 	uint32_t status;      /* PD MCU host event status */
3872 };
3873 
3874 /* Set USB type-C port role and muxes */
3875 #define EC_CMD_USB_PD_CONTROL 0x0101
3876 
3877 enum usb_pd_control_role {
3878 	USB_PD_CTRL_ROLE_NO_CHANGE = 0,
3879 	USB_PD_CTRL_ROLE_TOGGLE_ON = 1, /* == AUTO */
3880 	USB_PD_CTRL_ROLE_TOGGLE_OFF = 2,
3881 	USB_PD_CTRL_ROLE_FORCE_SINK = 3,
3882 	USB_PD_CTRL_ROLE_FORCE_SOURCE = 4,
3883 	USB_PD_CTRL_ROLE_COUNT
3884 };
3885 
3886 enum usb_pd_control_mux {
3887 	USB_PD_CTRL_MUX_NO_CHANGE = 0,
3888 	USB_PD_CTRL_MUX_NONE = 1,
3889 	USB_PD_CTRL_MUX_USB = 2,
3890 	USB_PD_CTRL_MUX_DP = 3,
3891 	USB_PD_CTRL_MUX_DOCK = 4,
3892 	USB_PD_CTRL_MUX_AUTO = 5,
3893 	USB_PD_CTRL_MUX_COUNT
3894 };
3895 
3896 enum usb_pd_control_swap {
3897 	USB_PD_CTRL_SWAP_NONE = 0,
3898 	USB_PD_CTRL_SWAP_DATA = 1,
3899 	USB_PD_CTRL_SWAP_POWER = 2,
3900 	USB_PD_CTRL_SWAP_VCONN = 3,
3901 	USB_PD_CTRL_SWAP_COUNT
3902 };
3903 
3904 struct __ec_align1 ec_params_usb_pd_control {
3905 	uint8_t port;
3906 	uint8_t role;
3907 	uint8_t mux;
3908 	uint8_t swap;
3909 };
3910 
3911 #define PD_CTRL_RESP_ENABLED_COMMS      (1 << 0) /* Communication enabled */
3912 #define PD_CTRL_RESP_ENABLED_CONNECTED  (1 << 1) /* Device connected */
3913 #define PD_CTRL_RESP_ENABLED_PD_CAPABLE (1 << 2) /* Partner is PD capable */
3914 
3915 #define PD_CTRL_RESP_ROLE_POWER         (1 << 0) /* 0=SNK/1=SRC */
3916 #define PD_CTRL_RESP_ROLE_DATA          (1 << 1) /* 0=UFP/1=DFP */
3917 #define PD_CTRL_RESP_ROLE_VCONN         (1 << 2) /* Vconn status */
3918 #define PD_CTRL_RESP_ROLE_DR_POWER      (1 << 3) /* Partner is dualrole power */
3919 #define PD_CTRL_RESP_ROLE_DR_DATA       (1 << 4) /* Partner is dualrole data */
3920 #define PD_CTRL_RESP_ROLE_USB_COMM      (1 << 5) /* Partner USB comm capable */
3921 #define PD_CTRL_RESP_ROLE_EXT_POWERED   (1 << 6) /* Partner externally powerd */
3922 
3923 struct __ec_align1 ec_response_usb_pd_control {
3924 	uint8_t enabled;
3925 	uint8_t role;
3926 	uint8_t polarity;
3927 	uint8_t state;
3928 };
3929 
3930 struct __ec_align1 ec_response_usb_pd_control_v1 {
3931 	uint8_t enabled;
3932 	uint8_t role;
3933 	uint8_t polarity;
3934 	char state[32];
3935 };
3936 
3937 #define EC_CMD_USB_PD_PORTS 0x0102
3938 
3939 /* Maximum number of PD ports on a device, num_ports will be <= this */
3940 #define EC_USB_PD_MAX_PORTS 8
3941 
3942 struct __ec_align1 ec_response_usb_pd_ports {
3943 	uint8_t num_ports;
3944 };
3945 
3946 #define EC_CMD_USB_PD_POWER_INFO 0x0103
3947 
3948 #define PD_POWER_CHARGING_PORT 0xff
3949 struct __ec_align1 ec_params_usb_pd_power_info {
3950 	uint8_t port;
3951 };
3952 
3953 enum usb_chg_type {
3954 	USB_CHG_TYPE_NONE,
3955 	USB_CHG_TYPE_PD,
3956 	USB_CHG_TYPE_C,
3957 	USB_CHG_TYPE_PROPRIETARY,
3958 	USB_CHG_TYPE_BC12_DCP,
3959 	USB_CHG_TYPE_BC12_CDP,
3960 	USB_CHG_TYPE_BC12_SDP,
3961 	USB_CHG_TYPE_OTHER,
3962 	USB_CHG_TYPE_VBUS,
3963 	USB_CHG_TYPE_UNKNOWN,
3964 };
3965 enum usb_power_roles {
3966 	USB_PD_PORT_POWER_DISCONNECTED,
3967 	USB_PD_PORT_POWER_SOURCE,
3968 	USB_PD_PORT_POWER_SINK,
3969 	USB_PD_PORT_POWER_SINK_NOT_CHARGING,
3970 };
3971 
3972 struct __ec_align2 usb_chg_measures {
3973 	uint16_t voltage_max;
3974 	uint16_t voltage_now;
3975 	uint16_t current_max;
3976 	uint16_t current_lim;
3977 };
3978 
3979 struct __ec_align4 ec_response_usb_pd_power_info {
3980 	uint8_t role;
3981 	uint8_t type;
3982 	uint8_t dualrole;
3983 	uint8_t reserved1;
3984 	struct usb_chg_measures meas;
3985 	uint32_t max_power;
3986 };
3987 
3988 /* Write USB-PD device FW */
3989 #define EC_CMD_USB_PD_FW_UPDATE 0x0110
3990 
3991 enum usb_pd_fw_update_cmds {
3992 	USB_PD_FW_REBOOT,
3993 	USB_PD_FW_FLASH_ERASE,
3994 	USB_PD_FW_FLASH_WRITE,
3995 	USB_PD_FW_ERASE_SIG,
3996 };
3997 
3998 struct __ec_align4 ec_params_usb_pd_fw_update {
3999 	uint16_t dev_id;
4000 	uint8_t cmd;
4001 	uint8_t port;
4002 	uint32_t size;     /* Size to write in bytes */
4003 	/* Followed by data to write */
4004 };
4005 
4006 /* Write USB-PD Accessory RW_HASH table entry */
4007 #define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111
4008 /* RW hash is first 20 bytes of SHA-256 of RW section */
4009 #define PD_RW_HASH_SIZE 20
4010 struct __ec_align1 ec_params_usb_pd_rw_hash_entry {
4011 	uint16_t dev_id;
4012 	uint8_t dev_rw_hash[PD_RW_HASH_SIZE];
4013 	uint8_t reserved;        /* For alignment of current_image
4014 				  * TODO(rspangler) but it's not aligned!
4015 				  * Should have been reserved[2]. */
4016 	uint32_t current_image;  /* One of ec_current_image */
4017 };
4018 
4019 /* Read USB-PD Accessory info */
4020 #define EC_CMD_USB_PD_DEV_INFO 0x0112
4021 
4022 struct __ec_align1 ec_params_usb_pd_info_request {
4023 	uint8_t port;
4024 };
4025 
4026 /* Read USB-PD Device discovery info */
4027 #define EC_CMD_USB_PD_DISCOVERY 0x0113
4028 struct __ec_align_size1 ec_params_usb_pd_discovery_entry {
4029 	uint16_t vid;  /* USB-IF VID */
4030 	uint16_t pid;  /* USB-IF PID */
4031 	uint8_t ptype; /* product type (hub,periph,cable,ama) */
4032 };
4033 
4034 /* Override default charge behavior */
4035 #define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114
4036 
4037 /* Negative port parameters have special meaning */
4038 enum usb_pd_override_ports {
4039 	OVERRIDE_DONT_CHARGE = -2,
4040 	OVERRIDE_OFF = -1,
4041 	/* [0, CONFIG_USB_PD_PORT_COUNT): Port# */
4042 };
4043 
4044 struct __ec_align2 ec_params_charge_port_override {
4045 	int16_t override_port; /* Override port# */
4046 };
4047 
4048 /* Read (and delete) one entry of PD event log */
4049 #define EC_CMD_PD_GET_LOG_ENTRY 0x0115
4050 
4051 struct __ec_align4 ec_response_pd_log {
4052 	uint32_t timestamp; /* relative timestamp in milliseconds */
4053 	uint8_t type;       /* event type : see PD_EVENT_xx below */
4054 	uint8_t size_port;  /* [7:5] port number [4:0] payload size in bytes */
4055 	uint16_t data;      /* type-defined data payload */
4056 	uint8_t payload[0]; /* optional additional data payload: 0..16 bytes */
4057 };
4058 
4059 
4060 /* The timestamp is the microsecond counter shifted to get about a ms. */
4061 #define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */
4062 
4063 #define PD_LOG_SIZE_MASK  0x1f
4064 #define PD_LOG_PORT_MASK  0xe0
4065 #define PD_LOG_PORT_SHIFT    5
4066 #define PD_LOG_PORT_SIZE(port, size) (((port) << PD_LOG_PORT_SHIFT) | \
4067 				      ((size) & PD_LOG_SIZE_MASK))
4068 #define PD_LOG_PORT(size_port) ((size_port) >> PD_LOG_PORT_SHIFT)
4069 #define PD_LOG_SIZE(size_port) ((size_port) & PD_LOG_SIZE_MASK)
4070 
4071 /* PD event log : entry types */
4072 /* PD MCU events */
4073 #define PD_EVENT_MCU_BASE       0x00
4074 #define PD_EVENT_MCU_CHARGE             (PD_EVENT_MCU_BASE+0)
4075 #define PD_EVENT_MCU_CONNECT            (PD_EVENT_MCU_BASE+1)
4076 /* Reserved for custom board event */
4077 #define PD_EVENT_MCU_BOARD_CUSTOM       (PD_EVENT_MCU_BASE+2)
4078 /* PD generic accessory events */
4079 #define PD_EVENT_ACC_BASE       0x20
4080 #define PD_EVENT_ACC_RW_FAIL   (PD_EVENT_ACC_BASE+0)
4081 #define PD_EVENT_ACC_RW_ERASE  (PD_EVENT_ACC_BASE+1)
4082 /* PD power supply events */
4083 #define PD_EVENT_PS_BASE        0x40
4084 #define PD_EVENT_PS_FAULT      (PD_EVENT_PS_BASE+0)
4085 /* PD video dongles events */
4086 #define PD_EVENT_VIDEO_BASE     0x60
4087 #define PD_EVENT_VIDEO_DP_MODE (PD_EVENT_VIDEO_BASE+0)
4088 #define PD_EVENT_VIDEO_CODEC   (PD_EVENT_VIDEO_BASE+1)
4089 /* Returned in the "type" field, when there is no entry available */
4090 #define PD_EVENT_NO_ENTRY       0xff
4091 
4092 /*
4093  * PD_EVENT_MCU_CHARGE event definition :
4094  * the payload is "struct usb_chg_measures"
4095  * the data field contains the port state flags as defined below :
4096  */
4097 /* Port partner is a dual role device */
4098 #define CHARGE_FLAGS_DUAL_ROLE         (1 << 15)
4099 /* Port is the pending override port */
4100 #define CHARGE_FLAGS_DELAYED_OVERRIDE  (1 << 14)
4101 /* Port is the override port */
4102 #define CHARGE_FLAGS_OVERRIDE          (1 << 13)
4103 /* Charger type */
4104 #define CHARGE_FLAGS_TYPE_SHIFT               3
4105 #define CHARGE_FLAGS_TYPE_MASK       (0xf << CHARGE_FLAGS_TYPE_SHIFT)
4106 /* Power delivery role */
4107 #define CHARGE_FLAGS_ROLE_MASK         (7 <<  0)
4108 
4109 /*
4110  * PD_EVENT_PS_FAULT data field flags definition :
4111  */
4112 #define PS_FAULT_OCP                          1
4113 #define PS_FAULT_FAST_OCP                     2
4114 #define PS_FAULT_OVP                          3
4115 #define PS_FAULT_DISCH                        4
4116 
4117 /*
4118  * PD_EVENT_VIDEO_CODEC payload is "struct mcdp_info".
4119  */
4120 struct __ec_align4 mcdp_version {
4121 	uint8_t major;
4122 	uint8_t minor;
4123 	uint16_t build;
4124 };
4125 
4126 struct __ec_align4 mcdp_info {
4127 	uint8_t family[2];
4128 	uint8_t chipid[2];
4129 	struct mcdp_version irom;
4130 	struct mcdp_version fw;
4131 };
4132 
4133 /* struct mcdp_info field decoding */
4134 #define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1])
4135 #define MCDP_FAMILY(family) ((family[0] << 8) | family[1])
4136 
4137 /* Get/Set USB-PD Alternate mode info */
4138 #define EC_CMD_USB_PD_GET_AMODE 0x0116
4139 struct __ec_align_size1 ec_params_usb_pd_get_mode_request {
4140 	uint16_t svid_idx; /* SVID index to get */
4141 	uint8_t port;      /* port */
4142 };
4143 
4144 struct __ec_align4 ec_params_usb_pd_get_mode_response {
4145 	uint16_t svid;   /* SVID */
4146 	uint16_t opos;    /* Object Position */
4147 	uint32_t vdo[6]; /* Mode VDOs */
4148 };
4149 
4150 #define EC_CMD_USB_PD_SET_AMODE 0x0117
4151 
4152 enum pd_mode_cmd {
4153 	PD_EXIT_MODE = 0,
4154 	PD_ENTER_MODE = 1,
4155 	/* Not a command.  Do NOT remove. */
4156 	PD_MODE_CMD_COUNT,
4157 };
4158 
4159 struct __ec_align4 ec_params_usb_pd_set_mode_request {
4160 	uint32_t cmd;  /* enum pd_mode_cmd */
4161 	uint16_t svid; /* SVID to set */
4162 	uint8_t opos;  /* Object Position */
4163 	uint8_t port;  /* port */
4164 };
4165 
4166 /* Ask the PD MCU to record a log of a requested type */
4167 #define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118
4168 
4169 struct __ec_align1 ec_params_pd_write_log_entry {
4170 	uint8_t type; /* event type : see PD_EVENT_xx above */
4171 	uint8_t port; /* port#, or 0 for events unrelated to a given port */
4172 };
4173 
4174 
4175 /* Control USB-PD chip */
4176 #define EC_CMD_PD_CONTROL 0x0119
4177 
4178 enum ec_pd_control_cmd {
4179 	PD_SUSPEND = 0,      /* Suspend the PD chip (EC: stop talking to PD) */
4180 	PD_RESUME,           /* Resume the PD chip (EC: start talking to PD) */
4181 	PD_RESET,            /* Force reset the PD chip */
4182 	PD_CONTROL_DISABLE   /* Disable further calls to this command */
4183 };
4184 
4185 struct __ec_align1 ec_params_pd_control {
4186 	uint8_t chip;         /* chip id (should be 0) */
4187 	uint8_t subcmd;
4188 };
4189 
4190 /* Get info about USB-C SS muxes */
4191 #define EC_CMD_USB_PD_MUX_INFO 0x011A
4192 
4193 struct __ec_align1 ec_params_usb_pd_mux_info {
4194 	uint8_t port; /* USB-C port number */
4195 };
4196 
4197 /* Flags representing mux state */
4198 #define USB_PD_MUX_USB_ENABLED       (1 << 0)
4199 #define USB_PD_MUX_DP_ENABLED        (1 << 1)
4200 #define USB_PD_MUX_POLARITY_INVERTED (1 << 2)
4201 #define USB_PD_MUX_HPD_IRQ           (1 << 3)
4202 
4203 struct __ec_align1 ec_response_usb_pd_mux_info {
4204 	uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */
4205 };
4206 
4207 #define EC_CMD_PD_CHIP_INFO		0x011B
4208 
4209 struct __ec_align1 ec_params_pd_chip_info {
4210 	uint8_t port;	/* USB-C port number */
4211 	uint8_t renew;	/* Force renewal */
4212 };
4213 
4214 struct __ec_align2 ec_response_pd_chip_info {
4215 	uint16_t vendor_id;
4216 	uint16_t product_id;
4217 	uint16_t device_id;
4218 	union {
4219 		uint8_t fw_version_string[8];
4220 		uint64_t fw_version_number;
4221 	};
4222 };
4223 
4224 /* Run RW signature verification and get status */
4225 #define EC_CMD_RWSIG_CHECK_STATUS	0x011C
4226 
4227 struct __ec_align4 ec_response_rwsig_check_status {
4228 	uint32_t status;
4229 };
4230 
4231 /* For controlling RWSIG task */
4232 #define EC_CMD_RWSIG_ACTION	0x011D
4233 
4234 enum rwsig_action {
4235 	RWSIG_ACTION_ABORT = 0,		/* Abort RWSIG and prevent jumping */
4236 	RWSIG_ACTION_CONTINUE = 1,	/* Jump to RW immediately */
4237 };
4238 
4239 struct __ec_align4 ec_params_rwsig_action {
4240 	uint32_t action;
4241 };
4242 
4243 /*****************************************************************************/
4244 /* The command range 0x200-0x2FF is reserved for Rotor. */
4245 
4246 /*****************************************************************************/
4247 /*
4248  * Reserve a range of host commands for the CR51 firmware.
4249  */
4250 #define EC_CMD_CR51_BASE 0x0300
4251 #define EC_CMD_CR51_LAST 0x03FF
4252 
4253 /*****************************************************************************/
4254 /* Fingerprint MCU commands: range 0x0400-0x040x */
4255 
4256 /* Fingerprint SPI sensor passthru command: prototyping ONLY */
4257 #define EC_CMD_FP_PASSTHRU 0x0400
4258 
4259 #define EC_FP_FLAG_NOT_COMPLETE 0x1
4260 
4261 struct __ec_align2 ec_params_fp_passthru {
4262 	uint16_t len;		/* Number of bytes to write then read */
4263 	uint16_t flags;		/* EC_FP_FLAG_xxx */
4264 	uint8_t data[];		/* Data to send */
4265 };
4266 
4267 /* Fingerprint sensor configuration command: prototyping ONLY */
4268 #define EC_CMD_FP_SENSOR_CONFIG 0x0401
4269 
4270 #define EC_FP_SENSOR_CONFIG_MAX_REGS 16
4271 
4272 struct __ec_align2 ec_params_fp_sensor_config {
4273 	uint8_t count;		/* Number of setup registers */
4274 	/*
4275 	 * the value to send to each of the 'count' setup registers
4276 	 * is stored in the 'data' array for 'len' bytes just after
4277 	 * the previous one.
4278 	 */
4279 	uint8_t len[EC_FP_SENSOR_CONFIG_MAX_REGS];
4280 	uint8_t data[];
4281 };
4282 
4283 /* Configure the Fingerprint MCU behavior */
4284 #define EC_CMD_FP_MODE 0x0402
4285 
4286 /* Put the sensor in its lowest power mode */
4287 #define FP_MODE_DEEPSLEEP     (1<<0)
4288 /* Wait to see a finger on the sensor */
4289 #define FP_MODE_FINGER_DOWN   (1<<1)
4290 /* Poll until the finger has left the sensor */
4291 #define FP_MODE_FINGER_UP     (1<<2)
4292 /* Capture the current finger image */
4293 #define FP_MODE_CAPTURE       (1<<3)
4294 /* special value: don't change anything just read back current mode */
4295 #define FP_MODE_DONT_CHANGE   (1<<31)
4296 
4297 struct __ec_align4 ec_params_fp_mode {
4298 	uint32_t mode; /* as defined by FP_MODE_ constants */
4299 	/* TBD */
4300 };
4301 
4302 struct __ec_align4 ec_response_fp_mode {
4303 	uint32_t mode; /* as defined by FP_MODE_ constants */
4304 	/* TBD */
4305 };
4306 
4307 /* Retrieve Fingerprint sensor information */
4308 #define EC_CMD_FP_INFO 0x0403
4309 
4310 struct __ec_align2 ec_response_fp_info {
4311 	/* Sensor identification */
4312 	uint32_t vendor_id;
4313 	uint32_t product_id;
4314 	uint32_t model_id;
4315 	uint32_t version;
4316 	/* Image frame characteristics */
4317 	uint32_t frame_size;
4318 	uint32_t pixel_format; /* using V4L2_PIX_FMT_ */
4319 	uint16_t width;
4320 	uint16_t height;
4321 	uint16_t bpp;
4322 };
4323 
4324 /* Get the last captured finger frame: TODO: will be AES-encrypted */
4325 #define EC_CMD_FP_FRAME 0x0404
4326 
4327 struct __ec_align4 ec_params_fp_frame {
4328 	uint32_t offset;
4329 	uint32_t size;
4330 };
4331 
4332 /*****************************************************************************/
4333 /* Touchpad MCU commands: range 0x0500-0x05FF */
4334 
4335 /* Perform touchpad self test */
4336 #define EC_CMD_TP_SELF_TEST 0x0500
4337 
4338 /* Get number of frame types, and the size of each type */
4339 #define EC_CMD_TP_FRAME_INFO 0x0501
4340 
4341 struct __ec_align4 ec_response_tp_frame_info {
4342 	uint32_t n_frames;
4343 	uint32_t frame_sizes[0];
4344 };
4345 
4346 /* Create a snapshot of current frame readings */
4347 #define EC_CMD_TP_FRAME_SNAPSHOT 0x0502
4348 
4349 /* Read the frame */
4350 #define EC_CMD_TP_FRAME_GET 0x0503
4351 
4352 struct __ec_align4 ec_params_tp_frame_get {
4353 	uint32_t frame_index;
4354 	uint32_t offset;
4355 	uint32_t size;
4356 };
4357 
4358 /*****************************************************************************/
4359 /*
4360  * Reserve a range of host commands for board-specific, experimental, or
4361  * special purpose features. These can be (re)used without updating this file.
4362  *
4363  * CAUTION: Don't go nuts with this. Shipping products should document ALL
4364  * their EC commands for easier development, testing, debugging, and support.
4365  *
4366  * All commands MUST be #defined to be 4-digit UPPER CASE hex values
4367  * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work.
4368  *
4369  * In your experimental code, you may want to do something like this:
4370  *
4371  *   #define EC_CMD_MAGIC_FOO 0x0000
4372  *   #define EC_CMD_MAGIC_BAR 0x0001
4373  *   #define EC_CMD_MAGIC_HEY 0x0002
4374  *
4375  *   DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler,
4376  *      EC_VER_MASK(0);
4377  *
4378  *   DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler,
4379  *      EC_VER_MASK(0);
4380  *
4381  *   DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler,
4382  *      EC_VER_MASK(0);
4383  */
4384 #define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00
4385 #define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF
4386 
4387 /*
4388  * Given the private host command offset, calculate the true private host
4389  * command value.
4390  */
4391 #define EC_PRIVATE_HOST_COMMAND_VALUE(command) \
4392 	(EC_CMD_BOARD_SPECIFIC_BASE + (command))
4393 
4394 /*****************************************************************************/
4395 /*
4396  * Passthru commands
4397  *
4398  * Some platforms have sub-processors chained to each other.  For example.
4399  *
4400  *     AP <--> EC <--> PD MCU
4401  *
4402  * The top 2 bits of the command number are used to indicate which device the
4403  * command is intended for.  Device 0 is always the device receiving the
4404  * command; other device mapping is board-specific.
4405  *
4406  * When a device receives a command to be passed to a sub-processor, it passes
4407  * it on with the device number set back to 0.  This allows the sub-processor
4408  * to remain blissfully unaware of whether the command originated on the next
4409  * device up the chain, or was passed through from the AP.
4410  *
4411  * In the above example, if the AP wants to send command 0x0002 to the PD MCU,
4412  *     AP sends command 0x4002 to the EC
4413  *     EC sends command 0x0002 to the PD MCU
4414  *     EC forwards PD MCU response back to the AP
4415  */
4416 
4417 /* Offset and max command number for sub-device n */
4418 #define EC_CMD_PASSTHRU_OFFSET(n) (0x4000 * (n))
4419 #define EC_CMD_PASSTHRU_MAX(n) (EC_CMD_PASSTHRU_OFFSET(n) + 0x3fff)
4420 
4421 /*****************************************************************************/
4422 /*
4423  * Deprecated constants. These constants have been renamed for clarity. The
4424  * meaning and size has not changed. Programs that use the old names should
4425  * switch to the new names soon, as the old names may not be carried forward
4426  * forever.
4427  */
4428 #define EC_HOST_PARAM_SIZE      EC_PROTO2_MAX_PARAM_SIZE
4429 #define EC_LPC_ADDR_OLD_PARAM   EC_HOST_CMD_REGION1
4430 #define EC_OLD_PARAM_SIZE       EC_HOST_CMD_REGION_SIZE
4431 
4432 #endif  /* !__ACPI__ */
4433 
4434 #endif  /* __CROS_EC_EC_COMMANDS_H */
4435