1*cd60bc56SAndroid Build Coastguard Worker/dts-v1/; 2*cd60bc56SAndroid Build Coastguard Worker 3*cd60bc56SAndroid Build Coastguard Worker/ { 4*cd60bc56SAndroid Build Coastguard Worker compatible = "example,pci-bridge-ok"; 5*cd60bc56SAndroid Build Coastguard Worker #address-cells = < 2 >; 6*cd60bc56SAndroid Build Coastguard Worker #size-cells = < 2 >; 7*cd60bc56SAndroid Build Coastguard Worker pci@0 { 8*cd60bc56SAndroid Build Coastguard Worker device_type = "pci"; 9*cd60bc56SAndroid Build Coastguard Worker compatible = "example,pci-bridge"; 10*cd60bc56SAndroid Build Coastguard Worker #address-cells = < 3 >; 11*cd60bc56SAndroid Build Coastguard Worker #size-cells = < 2 >; 12*cd60bc56SAndroid Build Coastguard Worker reg = <0 0 0 0x1000>; 13*cd60bc56SAndroid Build Coastguard Worker bus-range = <0 0xff>; 14*cd60bc56SAndroid Build Coastguard Worker ranges = <0 0 0 0 0 0 0x10000>; 15*cd60bc56SAndroid Build Coastguard Worker }; 16*cd60bc56SAndroid Build Coastguard Worker pcie@10000000000 { 17*cd60bc56SAndroid Build Coastguard Worker device_type = "pci"; 18*cd60bc56SAndroid Build Coastguard Worker compatible = "example,pcie-bridge"; 19*cd60bc56SAndroid Build Coastguard Worker #address-cells = < 3 >; 20*cd60bc56SAndroid Build Coastguard Worker #size-cells = < 2 >; 21*cd60bc56SAndroid Build Coastguard Worker reg = <0x10 0x00000000 0 0x1000>; 22*cd60bc56SAndroid Build Coastguard Worker bus-range = <0 0xff>; 23*cd60bc56SAndroid Build Coastguard Worker ranges = <0 0 0 0 0 0 0x10000>; 24*cd60bc56SAndroid Build Coastguard Worker }; 25*cd60bc56SAndroid Build Coastguard Worker}; 26