1*2b54f0dbSXin Li #include <stdint.h>
2*2b54f0dbSXin Li
3*2b54f0dbSXin Li #include <cpuinfo.h>
4*2b54f0dbSXin Li #include <x86/api.h>
5*2b54f0dbSXin Li
6*2b54f0dbSXin Li
cpuinfo_x86_decode_uarch(enum cpuinfo_vendor vendor,const struct cpuinfo_x86_model_info * model_info)7*2b54f0dbSXin Li enum cpuinfo_uarch cpuinfo_x86_decode_uarch(
8*2b54f0dbSXin Li enum cpuinfo_vendor vendor,
9*2b54f0dbSXin Li const struct cpuinfo_x86_model_info* model_info)
10*2b54f0dbSXin Li {
11*2b54f0dbSXin Li switch (vendor) {
12*2b54f0dbSXin Li case cpuinfo_vendor_intel:
13*2b54f0dbSXin Li switch (model_info->family) {
14*2b54f0dbSXin Li #if CPUINFO_ARCH_X86
15*2b54f0dbSXin Li case 0x05:
16*2b54f0dbSXin Li switch (model_info->model) {
17*2b54f0dbSXin Li case 0x01: // Pentium (60, 66)
18*2b54f0dbSXin Li case 0x02: // Pentium (75, 90, 100, 120, 133, 150, 166, 200)
19*2b54f0dbSXin Li case 0x03: // Pentium OverDrive for Intel486-based systems
20*2b54f0dbSXin Li case 0x04: // Pentium MMX
21*2b54f0dbSXin Li return cpuinfo_uarch_p5;
22*2b54f0dbSXin Li case 0x09:
23*2b54f0dbSXin Li return cpuinfo_uarch_quark;
24*2b54f0dbSXin Li }
25*2b54f0dbSXin Li break;
26*2b54f0dbSXin Li #endif /* CPUINFO_ARCH_X86 */
27*2b54f0dbSXin Li case 0x06:
28*2b54f0dbSXin Li switch (model_info->model) {
29*2b54f0dbSXin Li /* Mainstream cores */
30*2b54f0dbSXin Li #if CPUINFO_ARCH_X86
31*2b54f0dbSXin Li case 0x01: // Pentium Pro
32*2b54f0dbSXin Li case 0x03: // Pentium II (Klamath) and Pentium II Overdrive
33*2b54f0dbSXin Li case 0x05: // Pentium II (Deschutes, Tonga), Pentium II Celeron (Covington), Pentium II Xeon (Drake)
34*2b54f0dbSXin Li case 0x06: // Pentium II (Dixon), Pentium II Celeron (Mendocino)
35*2b54f0dbSXin Li case 0x07: // Pentium III (Katmai), Pentium III Xeon (Tanner)
36*2b54f0dbSXin Li case 0x08: // Pentium III (Coppermine), Pentium II Celeron (Coppermine-128), Pentium III Xeon (Cascades)
37*2b54f0dbSXin Li case 0x0A: // Pentium III Xeon (Cascades-2MB)
38*2b54f0dbSXin Li case 0x0B: // Pentium III (Tualatin), Pentium III Celeron (Tualatin-256)
39*2b54f0dbSXin Li return cpuinfo_uarch_p6;
40*2b54f0dbSXin Li case 0x09: // Pentium M (Banias), Pentium M Celeron (Banias-0, Banias-512)
41*2b54f0dbSXin Li case 0x0D: // Pentium M (Dothan), Pentium M Celeron (Dothan-512, Dothan-1024)
42*2b54f0dbSXin Li case 0x15: // Intel 80579 (Tolapai)
43*2b54f0dbSXin Li return cpuinfo_uarch_dothan;
44*2b54f0dbSXin Li case 0x0E: // Core Solo/Duo (Yonah), Pentium Dual-Core T2xxx (Yonah), Celeron M (Yonah-512, Yonah-1024), Dual-Core Xeon (Sossaman)
45*2b54f0dbSXin Li return cpuinfo_uarch_yonah;
46*2b54f0dbSXin Li #endif /* CPUINFO_ARCH_X86 */
47*2b54f0dbSXin Li case 0x0F: // Core 2 Duo (Conroe, Conroe-2M, Merom), Core 2 Quad (Tigerton), Xeon (Woodcrest, Clovertown, Kentsfield)
48*2b54f0dbSXin Li case 0x16: // Celeron (Conroe-L, Merom-L), Core 2 Duo (Merom)
49*2b54f0dbSXin Li return cpuinfo_uarch_conroe;
50*2b54f0dbSXin Li case 0x17: // Core 2 Duo (Penryn-3M), Core 2 Quad (Yorkfield), Core 2 Extreme (Yorkfield), Xeon (Harpertown), Pentium Dual-Core (Penryn)
51*2b54f0dbSXin Li case 0x1D: // Xeon (Dunnington)
52*2b54f0dbSXin Li return cpuinfo_uarch_penryn;
53*2b54f0dbSXin Li case 0x1A: // Core iX (Bloomfield), Xeon (Gainestown)
54*2b54f0dbSXin Li case 0x1E: // Core iX (Lynnfield, Clarksfield)
55*2b54f0dbSXin Li case 0x1F: // Core iX (Havendale)
56*2b54f0dbSXin Li case 0x2E: // Xeon (Beckton)
57*2b54f0dbSXin Li case 0x25: // Core iX (Clarkdale)
58*2b54f0dbSXin Li case 0x2C: // Core iX (Gulftown), Xeon (Gulftown)
59*2b54f0dbSXin Li case 0x2F: // Xeon (Eagleton)
60*2b54f0dbSXin Li return cpuinfo_uarch_nehalem;
61*2b54f0dbSXin Li case 0x2A: // Core iX (Sandy Bridge)
62*2b54f0dbSXin Li case 0x2D: // Core iX (Sandy Bridge-E), Xeon (Sandy Bridge EP/EX)
63*2b54f0dbSXin Li return cpuinfo_uarch_sandy_bridge;
64*2b54f0dbSXin Li case 0x3A: // Core iX (Ivy Bridge)
65*2b54f0dbSXin Li case 0x3E: // Ivy Bridge-E
66*2b54f0dbSXin Li return cpuinfo_uarch_ivy_bridge;
67*2b54f0dbSXin Li case 0x3C:
68*2b54f0dbSXin Li case 0x3F: // Haswell-E
69*2b54f0dbSXin Li case 0x45: // Haswell ULT
70*2b54f0dbSXin Li case 0x46: // Haswell with eDRAM
71*2b54f0dbSXin Li return cpuinfo_uarch_haswell;
72*2b54f0dbSXin Li case 0x3D: // Broadwell-U
73*2b54f0dbSXin Li case 0x47: // Broadwell-H
74*2b54f0dbSXin Li case 0x4F: // Broadwell-E
75*2b54f0dbSXin Li case 0x56: // Broadwell-DE
76*2b54f0dbSXin Li return cpuinfo_uarch_broadwell;
77*2b54f0dbSXin Li case 0x4E: // Sky Lake Client Y/U
78*2b54f0dbSXin Li case 0x55: // Sky/Cascade/Cooper Lake Server
79*2b54f0dbSXin Li case 0x5E: // Sky Lake Client DT/H/S
80*2b54f0dbSXin Li case 0x8E: // Kaby/Whiskey/Amber/Comet Lake Y/U
81*2b54f0dbSXin Li case 0x9E: // Kaby/Coffee Lake DT/H/S
82*2b54f0dbSXin Li case 0xA5: // Comet Lake H/S
83*2b54f0dbSXin Li case 0xA6: // Comet Lake U/Y
84*2b54f0dbSXin Li return cpuinfo_uarch_sky_lake;
85*2b54f0dbSXin Li case 0x66: // Cannon Lake (Core i3-8121U)
86*2b54f0dbSXin Li return cpuinfo_uarch_palm_cove;
87*2b54f0dbSXin Li case 0x6A: // Ice Lake-DE
88*2b54f0dbSXin Li case 0x6C: // Ice Lake-SP
89*2b54f0dbSXin Li case 0x7D: // Ice Lake-Y
90*2b54f0dbSXin Li case 0x7E: // Ice Lake-U
91*2b54f0dbSXin Li return cpuinfo_uarch_sunny_cove;
92*2b54f0dbSXin Li
93*2b54f0dbSXin Li /* Low-power cores */
94*2b54f0dbSXin Li case 0x1C: // Diamondville, Silverthorne, Pineview
95*2b54f0dbSXin Li case 0x26: // Tunnel Creek
96*2b54f0dbSXin Li return cpuinfo_uarch_bonnell;
97*2b54f0dbSXin Li case 0x27: // Medfield
98*2b54f0dbSXin Li case 0x35: // Cloverview
99*2b54f0dbSXin Li case 0x36: // Cedarview, Centerton
100*2b54f0dbSXin Li return cpuinfo_uarch_saltwell;
101*2b54f0dbSXin Li case 0x37: // Bay Trail
102*2b54f0dbSXin Li case 0x4A: // Merrifield
103*2b54f0dbSXin Li case 0x4D: // Avoton, Rangeley
104*2b54f0dbSXin Li case 0x5A: // Moorefield
105*2b54f0dbSXin Li case 0x5D: // SoFIA
106*2b54f0dbSXin Li return cpuinfo_uarch_silvermont;
107*2b54f0dbSXin Li case 0x4C: // Braswell, Cherry Trail
108*2b54f0dbSXin Li case 0x75: // Spreadtrum SC9853I-IA
109*2b54f0dbSXin Li return cpuinfo_uarch_airmont;
110*2b54f0dbSXin Li case 0x5C: // Apollo Lake
111*2b54f0dbSXin Li case 0x5F: // Denverton
112*2b54f0dbSXin Li return cpuinfo_uarch_goldmont;
113*2b54f0dbSXin Li case 0x7A: // Gemini Lake
114*2b54f0dbSXin Li return cpuinfo_uarch_goldmont_plus;
115*2b54f0dbSXin Li
116*2b54f0dbSXin Li /* Knights-series cores */
117*2b54f0dbSXin Li case 0x57:
118*2b54f0dbSXin Li return cpuinfo_uarch_knights_landing;
119*2b54f0dbSXin Li case 0x85:
120*2b54f0dbSXin Li return cpuinfo_uarch_knights_mill;
121*2b54f0dbSXin Li }
122*2b54f0dbSXin Li break;
123*2b54f0dbSXin Li case 0x0F:
124*2b54f0dbSXin Li switch (model_info->model) {
125*2b54f0dbSXin Li case 0x00: // Pentium 4 Xeon (Foster)
126*2b54f0dbSXin Li case 0x01: // Pentium 4 Celeron (Willamette-128), Pentium 4 Xeon (Foster, Foster MP)
127*2b54f0dbSXin Li case 0x02: // Pentium 4 (Northwood), Pentium 4 EE (Gallatin), Pentium 4 Celeron (Northwood-128, Northwood-256), Pentium 4 Xeon (Gallatin DP, Prestonia)
128*2b54f0dbSXin Li return cpuinfo_uarch_willamette;
129*2b54f0dbSXin Li break;
130*2b54f0dbSXin Li case 0x03: // Pentium 4 (Prescott), Pentium 4 Xeon (Nocona)
131*2b54f0dbSXin Li case 0x04: // Pentium 4 (Prescott-2M), Pentium 4 EE (Prescott-2M), Pentium D (Smithfield), Celeron D (Prescott-256), Pentium 4 Xeon (Cranford, Irwindale, Paxville)
132*2b54f0dbSXin Li case 0x06: // Pentium 4 (Cedar Mill), Pentium D EE (Presler), Celeron D (Cedar Mill), Pentium 4 Xeon (Dempsey, Tulsa)
133*2b54f0dbSXin Li return cpuinfo_uarch_prescott;
134*2b54f0dbSXin Li }
135*2b54f0dbSXin Li break;
136*2b54f0dbSXin Li }
137*2b54f0dbSXin Li break;
138*2b54f0dbSXin Li case cpuinfo_vendor_amd:
139*2b54f0dbSXin Li switch (model_info->family) {
140*2b54f0dbSXin Li #if CPUINFO_ARCH_X86
141*2b54f0dbSXin Li case 0x5:
142*2b54f0dbSXin Li switch (model_info->model) {
143*2b54f0dbSXin Li case 0x00:
144*2b54f0dbSXin Li case 0x01:
145*2b54f0dbSXin Li case 0x02:
146*2b54f0dbSXin Li return cpuinfo_uarch_k5;
147*2b54f0dbSXin Li case 0x06:
148*2b54f0dbSXin Li case 0x07:
149*2b54f0dbSXin Li case 0x08:
150*2b54f0dbSXin Li case 0x0D:
151*2b54f0dbSXin Li return cpuinfo_uarch_k6;
152*2b54f0dbSXin Li case 0x0A:
153*2b54f0dbSXin Li return cpuinfo_uarch_geode;
154*2b54f0dbSXin Li }
155*2b54f0dbSXin Li break;
156*2b54f0dbSXin Li case 0x6:
157*2b54f0dbSXin Li return cpuinfo_uarch_k7;
158*2b54f0dbSXin Li #endif /* CPUINFO_ARCH_X86 */
159*2b54f0dbSXin Li case 0xF: // Opteron, Athlon 64, Sempron
160*2b54f0dbSXin Li case 0x11: // Turion
161*2b54f0dbSXin Li return cpuinfo_uarch_k8;
162*2b54f0dbSXin Li case 0x10: // Opteron, Phenom, Athlon, Sempron
163*2b54f0dbSXin Li case 0x12: // Llano APU
164*2b54f0dbSXin Li return cpuinfo_uarch_k10;
165*2b54f0dbSXin Li case 0x14:
166*2b54f0dbSXin Li return cpuinfo_uarch_bobcat;
167*2b54f0dbSXin Li case 0x15:
168*2b54f0dbSXin Li switch (model_info->model) {
169*2b54f0dbSXin Li case 0x00: // Engineering samples
170*2b54f0dbSXin Li case 0x01: // Zambezi, Interlagos
171*2b54f0dbSXin Li return cpuinfo_uarch_bulldozer;
172*2b54f0dbSXin Li case 0x02: // Vishera
173*2b54f0dbSXin Li case 0x10: // Trinity
174*2b54f0dbSXin Li case 0x13: // Richland
175*2b54f0dbSXin Li return cpuinfo_uarch_piledriver;
176*2b54f0dbSXin Li case 0x38: // Godavari
177*2b54f0dbSXin Li case 0x30: // Kaveri
178*2b54f0dbSXin Li return cpuinfo_uarch_steamroller;
179*2b54f0dbSXin Li case 0x60: // Carrizo
180*2b54f0dbSXin Li case 0x65: // Bristol Ridge
181*2b54f0dbSXin Li case 0x70: // Stoney Ridge
182*2b54f0dbSXin Li return cpuinfo_uarch_excavator;
183*2b54f0dbSXin Li default:
184*2b54f0dbSXin Li switch (model_info->extended_model) {
185*2b54f0dbSXin Li case 0x0:
186*2b54f0dbSXin Li return cpuinfo_uarch_bulldozer;
187*2b54f0dbSXin Li case 0x1: // No L3 cache
188*2b54f0dbSXin Li case 0x2: // With L3 cache
189*2b54f0dbSXin Li return cpuinfo_uarch_piledriver;
190*2b54f0dbSXin Li case 0x3: // With L3 cache
191*2b54f0dbSXin Li case 0x4: // No L3 cache
192*2b54f0dbSXin Li return cpuinfo_uarch_steamroller;
193*2b54f0dbSXin Li }
194*2b54f0dbSXin Li break;
195*2b54f0dbSXin Li }
196*2b54f0dbSXin Li break;
197*2b54f0dbSXin Li case 0x16:
198*2b54f0dbSXin Li if (model_info->model >= 0x03) {
199*2b54f0dbSXin Li return cpuinfo_uarch_puma;
200*2b54f0dbSXin Li } else {
201*2b54f0dbSXin Li return cpuinfo_uarch_jaguar;
202*2b54f0dbSXin Li }
203*2b54f0dbSXin Li case 0x17:
204*2b54f0dbSXin Li switch (model_info->model) {
205*2b54f0dbSXin Li case 0x01: // 14 nm Naples, Whitehaven, Summit Ridge, Snowy Owl
206*2b54f0dbSXin Li case 0x08: // 12 nm Pinnacle Ridge
207*2b54f0dbSXin Li case 0x11: // 14 nm Raven Ridge, Great Horned Owl
208*2b54f0dbSXin Li case 0x18: // 12 nm Picasso
209*2b54f0dbSXin Li return cpuinfo_uarch_zen;
210*2b54f0dbSXin Li case 0x31: // Rome, Castle Peak
211*2b54f0dbSXin Li case 0x60: // Renoir
212*2b54f0dbSXin Li case 0x68: // Lucienne
213*2b54f0dbSXin Li case 0x71: // Matisse
214*2b54f0dbSXin Li case 0x90: // Van Gogh
215*2b54f0dbSXin Li case 0x98: // Mero
216*2b54f0dbSXin Li return cpuinfo_uarch_zen2;
217*2b54f0dbSXin Li }
218*2b54f0dbSXin Li break;
219*2b54f0dbSXin Li case 0x19:
220*2b54f0dbSXin Li switch (model_info->model) {
221*2b54f0dbSXin Li case 0x01: // Genesis
222*2b54f0dbSXin Li case 0x21: // Vermeer
223*2b54f0dbSXin Li case 0x30: // Badami, Trento
224*2b54f0dbSXin Li case 0x40: // Rembrandt
225*2b54f0dbSXin Li case 0x50: // Cezanne
226*2b54f0dbSXin Li return cpuinfo_uarch_zen3;
227*2b54f0dbSXin Li }
228*2b54f0dbSXin Li break;
229*2b54f0dbSXin Li }
230*2b54f0dbSXin Li break;
231*2b54f0dbSXin Li case cpuinfo_vendor_hygon:
232*2b54f0dbSXin Li switch (model_info->family) {
233*2b54f0dbSXin Li case 0x00:
234*2b54f0dbSXin Li return cpuinfo_uarch_dhyana;
235*2b54f0dbSXin Li }
236*2b54f0dbSXin Li break;
237*2b54f0dbSXin Li default:
238*2b54f0dbSXin Li break;
239*2b54f0dbSXin Li }
240*2b54f0dbSXin Li return cpuinfo_uarch_unknown;
241*2b54f0dbSXin Li }
242