1*2b54f0dbSXin Li #include <stdint.h>
2*2b54f0dbSXin Li #include <stdlib.h>
3*2b54f0dbSXin Li #include <string.h>
4*2b54f0dbSXin Li
5*2b54f0dbSXin Li #include <cpuinfo.h>
6*2b54f0dbSXin Li #include <x86/api.h>
7*2b54f0dbSXin Li #include <mach/api.h>
8*2b54f0dbSXin Li #include <cpuinfo/internal-api.h>
9*2b54f0dbSXin Li #include <cpuinfo/log.h>
10*2b54f0dbSXin Li
11*2b54f0dbSXin Li
max(uint32_t a,uint32_t b)12*2b54f0dbSXin Li static inline uint32_t max(uint32_t a, uint32_t b) {
13*2b54f0dbSXin Li return a > b ? a : b;
14*2b54f0dbSXin Li }
15*2b54f0dbSXin Li
bit_mask(uint32_t bits)16*2b54f0dbSXin Li static inline uint32_t bit_mask(uint32_t bits) {
17*2b54f0dbSXin Li return (UINT32_C(1) << bits) - UINT32_C(1);
18*2b54f0dbSXin Li }
19*2b54f0dbSXin Li
cpuinfo_x86_mach_init(void)20*2b54f0dbSXin Li void cpuinfo_x86_mach_init(void) {
21*2b54f0dbSXin Li struct cpuinfo_processor* processors = NULL;
22*2b54f0dbSXin Li struct cpuinfo_core* cores = NULL;
23*2b54f0dbSXin Li struct cpuinfo_cluster* clusters = NULL;
24*2b54f0dbSXin Li struct cpuinfo_package* packages = NULL;
25*2b54f0dbSXin Li struct cpuinfo_cache* l1i = NULL;
26*2b54f0dbSXin Li struct cpuinfo_cache* l1d = NULL;
27*2b54f0dbSXin Li struct cpuinfo_cache* l2 = NULL;
28*2b54f0dbSXin Li struct cpuinfo_cache* l3 = NULL;
29*2b54f0dbSXin Li struct cpuinfo_cache* l4 = NULL;
30*2b54f0dbSXin Li
31*2b54f0dbSXin Li struct cpuinfo_mach_topology mach_topology = cpuinfo_mach_detect_topology();
32*2b54f0dbSXin Li processors = calloc(mach_topology.threads, sizeof(struct cpuinfo_processor));
33*2b54f0dbSXin Li if (processors == NULL) {
34*2b54f0dbSXin Li cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" logical processors",
35*2b54f0dbSXin Li mach_topology.threads * sizeof(struct cpuinfo_processor), mach_topology.threads);
36*2b54f0dbSXin Li goto cleanup;
37*2b54f0dbSXin Li }
38*2b54f0dbSXin Li cores = calloc(mach_topology.cores, sizeof(struct cpuinfo_core));
39*2b54f0dbSXin Li if (cores == NULL) {
40*2b54f0dbSXin Li cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" cores",
41*2b54f0dbSXin Li mach_topology.cores * sizeof(struct cpuinfo_core), mach_topology.cores);
42*2b54f0dbSXin Li goto cleanup;
43*2b54f0dbSXin Li }
44*2b54f0dbSXin Li /* On x86 cluster of cores is a physical package */
45*2b54f0dbSXin Li clusters = calloc(mach_topology.packages, sizeof(struct cpuinfo_cluster));
46*2b54f0dbSXin Li if (clusters == NULL) {
47*2b54f0dbSXin Li cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" core clusters",
48*2b54f0dbSXin Li mach_topology.packages * sizeof(struct cpuinfo_cluster), mach_topology.packages);
49*2b54f0dbSXin Li goto cleanup;
50*2b54f0dbSXin Li }
51*2b54f0dbSXin Li packages = calloc(mach_topology.packages, sizeof(struct cpuinfo_package));
52*2b54f0dbSXin Li if (packages == NULL) {
53*2b54f0dbSXin Li cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" physical packages",
54*2b54f0dbSXin Li mach_topology.packages * sizeof(struct cpuinfo_package), mach_topology.packages);
55*2b54f0dbSXin Li goto cleanup;
56*2b54f0dbSXin Li }
57*2b54f0dbSXin Li
58*2b54f0dbSXin Li struct cpuinfo_x86_processor x86_processor;
59*2b54f0dbSXin Li memset(&x86_processor, 0, sizeof(x86_processor));
60*2b54f0dbSXin Li cpuinfo_x86_init_processor(&x86_processor);
61*2b54f0dbSXin Li char brand_string[48];
62*2b54f0dbSXin Li cpuinfo_x86_normalize_brand_string(x86_processor.brand_string, brand_string);
63*2b54f0dbSXin Li
64*2b54f0dbSXin Li const uint32_t threads_per_core = mach_topology.threads / mach_topology.cores;
65*2b54f0dbSXin Li const uint32_t threads_per_package = mach_topology.threads / mach_topology.packages;
66*2b54f0dbSXin Li const uint32_t cores_per_package = mach_topology.cores / mach_topology.packages;
67*2b54f0dbSXin Li for (uint32_t i = 0; i < mach_topology.packages; i++) {
68*2b54f0dbSXin Li clusters[i] = (struct cpuinfo_cluster) {
69*2b54f0dbSXin Li .processor_start = i * threads_per_package,
70*2b54f0dbSXin Li .processor_count = threads_per_package,
71*2b54f0dbSXin Li .core_start = i * cores_per_package,
72*2b54f0dbSXin Li .core_count = cores_per_package,
73*2b54f0dbSXin Li .cluster_id = 0,
74*2b54f0dbSXin Li .package = packages + i,
75*2b54f0dbSXin Li .vendor = x86_processor.vendor,
76*2b54f0dbSXin Li .uarch = x86_processor.uarch,
77*2b54f0dbSXin Li .cpuid = x86_processor.cpuid,
78*2b54f0dbSXin Li };
79*2b54f0dbSXin Li packages[i].processor_start = i * threads_per_package;
80*2b54f0dbSXin Li packages[i].processor_count = threads_per_package;
81*2b54f0dbSXin Li packages[i].core_start = i * cores_per_package;
82*2b54f0dbSXin Li packages[i].core_count = cores_per_package;
83*2b54f0dbSXin Li packages[i].cluster_start = i;
84*2b54f0dbSXin Li packages[i].cluster_count = 1;
85*2b54f0dbSXin Li cpuinfo_x86_format_package_name(x86_processor.vendor, brand_string, packages[i].name);
86*2b54f0dbSXin Li }
87*2b54f0dbSXin Li for (uint32_t i = 0; i < mach_topology.cores; i++) {
88*2b54f0dbSXin Li cores[i] = (struct cpuinfo_core) {
89*2b54f0dbSXin Li .processor_start = i * threads_per_core,
90*2b54f0dbSXin Li .processor_count = threads_per_core,
91*2b54f0dbSXin Li .core_id = i % cores_per_package,
92*2b54f0dbSXin Li .cluster = clusters + i / cores_per_package,
93*2b54f0dbSXin Li .package = packages + i / cores_per_package,
94*2b54f0dbSXin Li .vendor = x86_processor.vendor,
95*2b54f0dbSXin Li .uarch = x86_processor.uarch,
96*2b54f0dbSXin Li .cpuid = x86_processor.cpuid,
97*2b54f0dbSXin Li };
98*2b54f0dbSXin Li }
99*2b54f0dbSXin Li for (uint32_t i = 0; i < mach_topology.threads; i++) {
100*2b54f0dbSXin Li const uint32_t smt_id = i % threads_per_core;
101*2b54f0dbSXin Li const uint32_t core_id = i / threads_per_core;
102*2b54f0dbSXin Li const uint32_t package_id = i / threads_per_package;
103*2b54f0dbSXin Li
104*2b54f0dbSXin Li /* Reconstruct APIC IDs from topology components */
105*2b54f0dbSXin Li const uint32_t thread_bits_mask = bit_mask(x86_processor.topology.thread_bits_length);
106*2b54f0dbSXin Li const uint32_t core_bits_mask = bit_mask(x86_processor.topology.core_bits_length);
107*2b54f0dbSXin Li const uint32_t package_bits_offset = max(
108*2b54f0dbSXin Li x86_processor.topology.thread_bits_offset + x86_processor.topology.thread_bits_length,
109*2b54f0dbSXin Li x86_processor.topology.core_bits_offset + x86_processor.topology.core_bits_length);
110*2b54f0dbSXin Li const uint32_t apic_id =
111*2b54f0dbSXin Li ((smt_id & thread_bits_mask) << x86_processor.topology.thread_bits_offset) |
112*2b54f0dbSXin Li ((core_id & core_bits_mask) << x86_processor.topology.core_bits_offset) |
113*2b54f0dbSXin Li (package_id << package_bits_offset);
114*2b54f0dbSXin Li cpuinfo_log_debug("reconstructed APIC ID 0x%08"PRIx32" for thread %"PRIu32, apic_id, i);
115*2b54f0dbSXin Li
116*2b54f0dbSXin Li processors[i].smt_id = smt_id;
117*2b54f0dbSXin Li processors[i].core = cores + i / threads_per_core;
118*2b54f0dbSXin Li processors[i].cluster = clusters + i / threads_per_package;
119*2b54f0dbSXin Li processors[i].package = packages + i / threads_per_package;
120*2b54f0dbSXin Li processors[i].apic_id = apic_id;
121*2b54f0dbSXin Li }
122*2b54f0dbSXin Li
123*2b54f0dbSXin Li uint32_t threads_per_l1 = 0, l1_count = 0;
124*2b54f0dbSXin Li if (x86_processor.cache.l1i.size != 0 || x86_processor.cache.l1d.size != 0) {
125*2b54f0dbSXin Li threads_per_l1 = mach_topology.threads_per_cache[1];
126*2b54f0dbSXin Li if (threads_per_l1 == 0) {
127*2b54f0dbSXin Li /* Assume that threads on the same core share L1 */
128*2b54f0dbSXin Li threads_per_l1 = mach_topology.threads / mach_topology.cores;
129*2b54f0dbSXin Li cpuinfo_log_warning("Mach kernel did not report number of threads sharing L1 cache; assume %"PRIu32,
130*2b54f0dbSXin Li threads_per_l1);
131*2b54f0dbSXin Li }
132*2b54f0dbSXin Li l1_count = mach_topology.threads / threads_per_l1;
133*2b54f0dbSXin Li cpuinfo_log_debug("detected %"PRIu32" L1 caches", l1_count);
134*2b54f0dbSXin Li }
135*2b54f0dbSXin Li
136*2b54f0dbSXin Li uint32_t threads_per_l2 = 0, l2_count = 0;
137*2b54f0dbSXin Li if (x86_processor.cache.l2.size != 0) {
138*2b54f0dbSXin Li threads_per_l2 = mach_topology.threads_per_cache[2];
139*2b54f0dbSXin Li if (threads_per_l2 == 0) {
140*2b54f0dbSXin Li if (x86_processor.cache.l3.size != 0) {
141*2b54f0dbSXin Li /* This is not a last-level cache; assume that threads on the same core share L2 */
142*2b54f0dbSXin Li threads_per_l2 = mach_topology.threads / mach_topology.cores;
143*2b54f0dbSXin Li } else {
144*2b54f0dbSXin Li /* This is a last-level cache; assume that threads on the same package share L2 */
145*2b54f0dbSXin Li threads_per_l2 = mach_topology.threads / mach_topology.packages;
146*2b54f0dbSXin Li }
147*2b54f0dbSXin Li cpuinfo_log_warning("Mach kernel did not report number of threads sharing L2 cache; assume %"PRIu32,
148*2b54f0dbSXin Li threads_per_l2);
149*2b54f0dbSXin Li }
150*2b54f0dbSXin Li l2_count = mach_topology.threads / threads_per_l2;
151*2b54f0dbSXin Li cpuinfo_log_debug("detected %"PRIu32" L2 caches", l2_count);
152*2b54f0dbSXin Li }
153*2b54f0dbSXin Li
154*2b54f0dbSXin Li uint32_t threads_per_l3 = 0, l3_count = 0;
155*2b54f0dbSXin Li if (x86_processor.cache.l3.size != 0) {
156*2b54f0dbSXin Li threads_per_l3 = mach_topology.threads_per_cache[3];
157*2b54f0dbSXin Li if (threads_per_l3 == 0) {
158*2b54f0dbSXin Li /*
159*2b54f0dbSXin Li * Assume that threads on the same package share L3.
160*2b54f0dbSXin Li * However, is it not necessarily the last-level cache (there may be L4 cache as well)
161*2b54f0dbSXin Li */
162*2b54f0dbSXin Li threads_per_l3 = mach_topology.threads / mach_topology.packages;
163*2b54f0dbSXin Li cpuinfo_log_warning("Mach kernel did not report number of threads sharing L3 cache; assume %"PRIu32,
164*2b54f0dbSXin Li threads_per_l3);
165*2b54f0dbSXin Li }
166*2b54f0dbSXin Li l3_count = mach_topology.threads / threads_per_l3;
167*2b54f0dbSXin Li cpuinfo_log_debug("detected %"PRIu32" L3 caches", l3_count);
168*2b54f0dbSXin Li }
169*2b54f0dbSXin Li
170*2b54f0dbSXin Li uint32_t threads_per_l4 = 0, l4_count = 0;
171*2b54f0dbSXin Li if (x86_processor.cache.l4.size != 0) {
172*2b54f0dbSXin Li threads_per_l4 = mach_topology.threads_per_cache[4];
173*2b54f0dbSXin Li if (threads_per_l4 == 0) {
174*2b54f0dbSXin Li /*
175*2b54f0dbSXin Li * Assume that all threads share this L4.
176*2b54f0dbSXin Li * As of now, L4 cache exists only on notebook x86 CPUs, which are single-package,
177*2b54f0dbSXin Li * but multi-socket systems could have shared L4 (like on IBM POWER8).
178*2b54f0dbSXin Li */
179*2b54f0dbSXin Li threads_per_l4 = mach_topology.threads;
180*2b54f0dbSXin Li cpuinfo_log_warning("Mach kernel did not report number of threads sharing L4 cache; assume %"PRIu32,
181*2b54f0dbSXin Li threads_per_l4);
182*2b54f0dbSXin Li }
183*2b54f0dbSXin Li l4_count = mach_topology.threads / threads_per_l4;
184*2b54f0dbSXin Li cpuinfo_log_debug("detected %"PRIu32" L4 caches", l4_count);
185*2b54f0dbSXin Li }
186*2b54f0dbSXin Li
187*2b54f0dbSXin Li if (x86_processor.cache.l1i.size != 0) {
188*2b54f0dbSXin Li l1i = calloc(l1_count, sizeof(struct cpuinfo_cache));
189*2b54f0dbSXin Li if (l1i == NULL) {
190*2b54f0dbSXin Li cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" L1I caches",
191*2b54f0dbSXin Li l1_count * sizeof(struct cpuinfo_cache), l1_count);
192*2b54f0dbSXin Li return;
193*2b54f0dbSXin Li }
194*2b54f0dbSXin Li for (uint32_t c = 0; c < l1_count; c++) {
195*2b54f0dbSXin Li l1i[c] = (struct cpuinfo_cache) {
196*2b54f0dbSXin Li .size = x86_processor.cache.l1i.size,
197*2b54f0dbSXin Li .associativity = x86_processor.cache.l1i.associativity,
198*2b54f0dbSXin Li .sets = x86_processor.cache.l1i.sets,
199*2b54f0dbSXin Li .partitions = x86_processor.cache.l1i.partitions,
200*2b54f0dbSXin Li .line_size = x86_processor.cache.l1i.line_size,
201*2b54f0dbSXin Li .flags = x86_processor.cache.l1i.flags,
202*2b54f0dbSXin Li .processor_start = c * threads_per_l1,
203*2b54f0dbSXin Li .processor_count = threads_per_l1,
204*2b54f0dbSXin Li };
205*2b54f0dbSXin Li }
206*2b54f0dbSXin Li for (uint32_t t = 0; t < mach_topology.threads; t++) {
207*2b54f0dbSXin Li processors[t].cache.l1i = &l1i[t / threads_per_l1];
208*2b54f0dbSXin Li }
209*2b54f0dbSXin Li }
210*2b54f0dbSXin Li
211*2b54f0dbSXin Li if (x86_processor.cache.l1d.size != 0) {
212*2b54f0dbSXin Li l1d = calloc(l1_count, sizeof(struct cpuinfo_cache));
213*2b54f0dbSXin Li if (l1d == NULL) {
214*2b54f0dbSXin Li cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" L1D caches",
215*2b54f0dbSXin Li l1_count * sizeof(struct cpuinfo_cache), l1_count);
216*2b54f0dbSXin Li return;
217*2b54f0dbSXin Li }
218*2b54f0dbSXin Li for (uint32_t c = 0; c < l1_count; c++) {
219*2b54f0dbSXin Li l1d[c] = (struct cpuinfo_cache) {
220*2b54f0dbSXin Li .size = x86_processor.cache.l1d.size,
221*2b54f0dbSXin Li .associativity = x86_processor.cache.l1d.associativity,
222*2b54f0dbSXin Li .sets = x86_processor.cache.l1d.sets,
223*2b54f0dbSXin Li .partitions = x86_processor.cache.l1d.partitions,
224*2b54f0dbSXin Li .line_size = x86_processor.cache.l1d.line_size,
225*2b54f0dbSXin Li .flags = x86_processor.cache.l1d.flags,
226*2b54f0dbSXin Li .processor_start = c * threads_per_l1,
227*2b54f0dbSXin Li .processor_count = threads_per_l1,
228*2b54f0dbSXin Li };
229*2b54f0dbSXin Li }
230*2b54f0dbSXin Li for (uint32_t t = 0; t < mach_topology.threads; t++) {
231*2b54f0dbSXin Li processors[t].cache.l1d = &l1d[t / threads_per_l1];
232*2b54f0dbSXin Li }
233*2b54f0dbSXin Li }
234*2b54f0dbSXin Li
235*2b54f0dbSXin Li if (l2_count != 0) {
236*2b54f0dbSXin Li l2 = calloc(l2_count, sizeof(struct cpuinfo_cache));
237*2b54f0dbSXin Li if (l2 == NULL) {
238*2b54f0dbSXin Li cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" L2 caches",
239*2b54f0dbSXin Li l2_count * sizeof(struct cpuinfo_cache), l2_count);
240*2b54f0dbSXin Li return;
241*2b54f0dbSXin Li }
242*2b54f0dbSXin Li for (uint32_t c = 0; c < l2_count; c++) {
243*2b54f0dbSXin Li l2[c] = (struct cpuinfo_cache) {
244*2b54f0dbSXin Li .size = x86_processor.cache.l2.size,
245*2b54f0dbSXin Li .associativity = x86_processor.cache.l2.associativity,
246*2b54f0dbSXin Li .sets = x86_processor.cache.l2.sets,
247*2b54f0dbSXin Li .partitions = x86_processor.cache.l2.partitions,
248*2b54f0dbSXin Li .line_size = x86_processor.cache.l2.line_size,
249*2b54f0dbSXin Li .flags = x86_processor.cache.l2.flags,
250*2b54f0dbSXin Li .processor_start = c * threads_per_l2,
251*2b54f0dbSXin Li .processor_count = threads_per_l2,
252*2b54f0dbSXin Li };
253*2b54f0dbSXin Li }
254*2b54f0dbSXin Li for (uint32_t t = 0; t < mach_topology.threads; t++) {
255*2b54f0dbSXin Li processors[t].cache.l2 = &l2[t / threads_per_l2];
256*2b54f0dbSXin Li }
257*2b54f0dbSXin Li }
258*2b54f0dbSXin Li
259*2b54f0dbSXin Li if (l3_count != 0) {
260*2b54f0dbSXin Li l3 = calloc(l3_count, sizeof(struct cpuinfo_cache));
261*2b54f0dbSXin Li if (l3 == NULL) {
262*2b54f0dbSXin Li cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" L3 caches",
263*2b54f0dbSXin Li l3_count * sizeof(struct cpuinfo_cache), l3_count);
264*2b54f0dbSXin Li return;
265*2b54f0dbSXin Li }
266*2b54f0dbSXin Li for (uint32_t c = 0; c < l3_count; c++) {
267*2b54f0dbSXin Li l3[c] = (struct cpuinfo_cache) {
268*2b54f0dbSXin Li .size = x86_processor.cache.l3.size,
269*2b54f0dbSXin Li .associativity = x86_processor.cache.l3.associativity,
270*2b54f0dbSXin Li .sets = x86_processor.cache.l3.sets,
271*2b54f0dbSXin Li .partitions = x86_processor.cache.l3.partitions,
272*2b54f0dbSXin Li .line_size = x86_processor.cache.l3.line_size,
273*2b54f0dbSXin Li .flags = x86_processor.cache.l3.flags,
274*2b54f0dbSXin Li .processor_start = c * threads_per_l3,
275*2b54f0dbSXin Li .processor_count = threads_per_l3,
276*2b54f0dbSXin Li };
277*2b54f0dbSXin Li }
278*2b54f0dbSXin Li for (uint32_t t = 0; t < mach_topology.threads; t++) {
279*2b54f0dbSXin Li processors[t].cache.l3 = &l3[t / threads_per_l3];
280*2b54f0dbSXin Li }
281*2b54f0dbSXin Li }
282*2b54f0dbSXin Li
283*2b54f0dbSXin Li if (l4_count != 0) {
284*2b54f0dbSXin Li l4 = calloc(l4_count, sizeof(struct cpuinfo_cache));
285*2b54f0dbSXin Li if (l4 == NULL) {
286*2b54f0dbSXin Li cpuinfo_log_error("failed to allocate %zu bytes for descriptions of %"PRIu32" L4 caches",
287*2b54f0dbSXin Li l4_count * sizeof(struct cpuinfo_cache), l4_count);
288*2b54f0dbSXin Li return;
289*2b54f0dbSXin Li }
290*2b54f0dbSXin Li for (uint32_t c = 0; c < l4_count; c++) {
291*2b54f0dbSXin Li l4[c] = (struct cpuinfo_cache) {
292*2b54f0dbSXin Li .size = x86_processor.cache.l4.size,
293*2b54f0dbSXin Li .associativity = x86_processor.cache.l4.associativity,
294*2b54f0dbSXin Li .sets = x86_processor.cache.l4.sets,
295*2b54f0dbSXin Li .partitions = x86_processor.cache.l4.partitions,
296*2b54f0dbSXin Li .line_size = x86_processor.cache.l4.line_size,
297*2b54f0dbSXin Li .flags = x86_processor.cache.l4.flags,
298*2b54f0dbSXin Li .processor_start = c * threads_per_l4,
299*2b54f0dbSXin Li .processor_count = threads_per_l4,
300*2b54f0dbSXin Li };
301*2b54f0dbSXin Li }
302*2b54f0dbSXin Li for (uint32_t t = 0; t < mach_topology.threads; t++) {
303*2b54f0dbSXin Li processors[t].cache.l4 = &l4[t / threads_per_l4];
304*2b54f0dbSXin Li }
305*2b54f0dbSXin Li }
306*2b54f0dbSXin Li
307*2b54f0dbSXin Li /* Commit changes */
308*2b54f0dbSXin Li cpuinfo_processors = processors;
309*2b54f0dbSXin Li cpuinfo_cores = cores;
310*2b54f0dbSXin Li cpuinfo_clusters = clusters;
311*2b54f0dbSXin Li cpuinfo_packages = packages;
312*2b54f0dbSXin Li cpuinfo_cache[cpuinfo_cache_level_1i] = l1i;
313*2b54f0dbSXin Li cpuinfo_cache[cpuinfo_cache_level_1d] = l1d;
314*2b54f0dbSXin Li cpuinfo_cache[cpuinfo_cache_level_2] = l2;
315*2b54f0dbSXin Li cpuinfo_cache[cpuinfo_cache_level_3] = l3;
316*2b54f0dbSXin Li cpuinfo_cache[cpuinfo_cache_level_4] = l4;
317*2b54f0dbSXin Li
318*2b54f0dbSXin Li cpuinfo_processors_count = mach_topology.threads;
319*2b54f0dbSXin Li cpuinfo_cores_count = mach_topology.cores;
320*2b54f0dbSXin Li cpuinfo_clusters_count = mach_topology.packages;
321*2b54f0dbSXin Li cpuinfo_packages_count = mach_topology.packages;
322*2b54f0dbSXin Li cpuinfo_cache_count[cpuinfo_cache_level_1i] = l1_count;
323*2b54f0dbSXin Li cpuinfo_cache_count[cpuinfo_cache_level_1d] = l1_count;
324*2b54f0dbSXin Li cpuinfo_cache_count[cpuinfo_cache_level_2] = l2_count;
325*2b54f0dbSXin Li cpuinfo_cache_count[cpuinfo_cache_level_3] = l3_count;
326*2b54f0dbSXin Li cpuinfo_cache_count[cpuinfo_cache_level_4] = l4_count;
327*2b54f0dbSXin Li cpuinfo_max_cache_size = cpuinfo_compute_max_cache_size(&processors[0]);
328*2b54f0dbSXin Li
329*2b54f0dbSXin Li cpuinfo_global_uarch = (struct cpuinfo_uarch_info) {
330*2b54f0dbSXin Li .uarch = x86_processor.uarch,
331*2b54f0dbSXin Li .cpuid = x86_processor.cpuid,
332*2b54f0dbSXin Li .processor_count = mach_topology.threads,
333*2b54f0dbSXin Li .core_count = mach_topology.cores,
334*2b54f0dbSXin Li };
335*2b54f0dbSXin Li
336*2b54f0dbSXin Li __sync_synchronize();
337*2b54f0dbSXin Li
338*2b54f0dbSXin Li cpuinfo_is_initialized = true;
339*2b54f0dbSXin Li
340*2b54f0dbSXin Li processors = NULL;
341*2b54f0dbSXin Li cores = NULL;
342*2b54f0dbSXin Li clusters = NULL;
343*2b54f0dbSXin Li packages = NULL;
344*2b54f0dbSXin Li l1i = l1d = l2 = l3 = l4 = NULL;
345*2b54f0dbSXin Li
346*2b54f0dbSXin Li cleanup:
347*2b54f0dbSXin Li free(processors);
348*2b54f0dbSXin Li free(cores);
349*2b54f0dbSXin Li free(clusters);
350*2b54f0dbSXin Li free(packages);
351*2b54f0dbSXin Li free(l1i);
352*2b54f0dbSXin Li free(l1d);
353*2b54f0dbSXin Li free(l2);
354*2b54f0dbSXin Li free(l3);
355*2b54f0dbSXin Li free(l4);
356*2b54f0dbSXin Li }
357