xref: /aosp_15_r20/external/cpu_features/include/cpuinfo_ppc.h (revision eca53ba6d2e951e174b64682eaf56a36b8204c89)
1*eca53ba6SRoland Levillain // Copyright 2018 IBM
2*eca53ba6SRoland Levillain //
3*eca53ba6SRoland Levillain // Licensed under the Apache License, Version 2.0 (the "License");
4*eca53ba6SRoland Levillain // you may not use this file except in compliance with the License.
5*eca53ba6SRoland Levillain // You may obtain a copy of the License at
6*eca53ba6SRoland Levillain //
7*eca53ba6SRoland Levillain //    http://www.apache.org/licenses/LICENSE-2.0
8*eca53ba6SRoland Levillain //
9*eca53ba6SRoland Levillain // Unless required by applicable law or agreed to in writing, software
10*eca53ba6SRoland Levillain // distributed under the License is distributed on an "AS IS" BASIS,
11*eca53ba6SRoland Levillain // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12*eca53ba6SRoland Levillain // See the License for the specific language governing permissions and
13*eca53ba6SRoland Levillain // limitations under the License.
14*eca53ba6SRoland Levillain 
15*eca53ba6SRoland Levillain #ifndef CPU_FEATURES_INCLUDE_CPUINFO_PPC_H_
16*eca53ba6SRoland Levillain #define CPU_FEATURES_INCLUDE_CPUINFO_PPC_H_
17*eca53ba6SRoland Levillain 
18*eca53ba6SRoland Levillain #include "cpu_features_cache_info.h"
19*eca53ba6SRoland Levillain #include "cpu_features_macros.h"
20*eca53ba6SRoland Levillain 
21*eca53ba6SRoland Levillain CPU_FEATURES_START_CPP_NAMESPACE
22*eca53ba6SRoland Levillain 
23*eca53ba6SRoland Levillain typedef struct {
24*eca53ba6SRoland Levillain   int ppc32 : 1;
25*eca53ba6SRoland Levillain   int ppc64 : 1;
26*eca53ba6SRoland Levillain   int ppc601 : 1;
27*eca53ba6SRoland Levillain   int altivec : 1;
28*eca53ba6SRoland Levillain   int fpu : 1;
29*eca53ba6SRoland Levillain   int mmu : 1;
30*eca53ba6SRoland Levillain   int mac_4xx : 1;
31*eca53ba6SRoland Levillain   int unifiedcache : 1;
32*eca53ba6SRoland Levillain   int spe : 1;
33*eca53ba6SRoland Levillain   int efpsingle : 1;
34*eca53ba6SRoland Levillain   int efpdouble : 1;
35*eca53ba6SRoland Levillain   int no_tb : 1;
36*eca53ba6SRoland Levillain   int power4 : 1;
37*eca53ba6SRoland Levillain   int power5 : 1;
38*eca53ba6SRoland Levillain   int power5plus : 1;
39*eca53ba6SRoland Levillain   int cell : 1;
40*eca53ba6SRoland Levillain   int booke : 1;
41*eca53ba6SRoland Levillain   int smt : 1;
42*eca53ba6SRoland Levillain   int icachesnoop : 1;
43*eca53ba6SRoland Levillain   int arch205 : 1;
44*eca53ba6SRoland Levillain   int pa6t : 1;
45*eca53ba6SRoland Levillain   int dfp : 1;
46*eca53ba6SRoland Levillain   int power6ext : 1;
47*eca53ba6SRoland Levillain   int arch206 : 1;
48*eca53ba6SRoland Levillain   int vsx : 1;
49*eca53ba6SRoland Levillain   int pseries_perfmon_compat : 1;
50*eca53ba6SRoland Levillain   int truele : 1;
51*eca53ba6SRoland Levillain   int ppcle : 1;
52*eca53ba6SRoland Levillain   int arch207 : 1;
53*eca53ba6SRoland Levillain   int htm : 1;
54*eca53ba6SRoland Levillain   int dscr : 1;
55*eca53ba6SRoland Levillain   int ebb : 1;
56*eca53ba6SRoland Levillain   int isel : 1;
57*eca53ba6SRoland Levillain   int tar : 1;
58*eca53ba6SRoland Levillain   int vcrypto : 1;
59*eca53ba6SRoland Levillain   int htm_nosc : 1;
60*eca53ba6SRoland Levillain   int arch300 : 1;
61*eca53ba6SRoland Levillain   int ieee128 : 1;
62*eca53ba6SRoland Levillain   int darn : 1;
63*eca53ba6SRoland Levillain   int scv : 1;
64*eca53ba6SRoland Levillain   int htm_no_suspend : 1;
65*eca53ba6SRoland Levillain 
66*eca53ba6SRoland Levillain   // Make sure to update PPCFeaturesEnum below if you add a field here.
67*eca53ba6SRoland Levillain } PPCFeatures;
68*eca53ba6SRoland Levillain 
69*eca53ba6SRoland Levillain typedef struct {
70*eca53ba6SRoland Levillain   PPCFeatures features;
71*eca53ba6SRoland Levillain } PPCInfo;
72*eca53ba6SRoland Levillain 
73*eca53ba6SRoland Levillain PPCInfo GetPPCInfo(void);
74*eca53ba6SRoland Levillain 
75*eca53ba6SRoland Levillain typedef struct {
76*eca53ba6SRoland Levillain   char platform[64];       // 0 terminated string
77*eca53ba6SRoland Levillain   char base_platform[64];  // 0 terminated string
78*eca53ba6SRoland Levillain } PPCPlatformTypeStrings;
79*eca53ba6SRoland Levillain 
80*eca53ba6SRoland Levillain typedef struct {
81*eca53ba6SRoland Levillain   char platform[64];  // 0 terminated string
82*eca53ba6SRoland Levillain   char model[64];     // 0 terminated string
83*eca53ba6SRoland Levillain   char machine[64];   // 0 terminated string
84*eca53ba6SRoland Levillain   char cpu[64];       // 0 terminated string
85*eca53ba6SRoland Levillain   PPCPlatformTypeStrings type;
86*eca53ba6SRoland Levillain } PPCPlatformStrings;
87*eca53ba6SRoland Levillain 
88*eca53ba6SRoland Levillain PPCPlatformStrings GetPPCPlatformStrings(void);
89*eca53ba6SRoland Levillain 
90*eca53ba6SRoland Levillain ////////////////////////////////////////////////////////////////////////////////
91*eca53ba6SRoland Levillain // Introspection functions
92*eca53ba6SRoland Levillain 
93*eca53ba6SRoland Levillain typedef enum {
94*eca53ba6SRoland Levillain   PPC_32,          /* 32 bit mode execution */
95*eca53ba6SRoland Levillain   PPC_64,          /* 64 bit mode execution */
96*eca53ba6SRoland Levillain   PPC_601_INSTR,   /* Old POWER ISA */
97*eca53ba6SRoland Levillain   PPC_HAS_ALTIVEC, /* SIMD Unit*/
98*eca53ba6SRoland Levillain   PPC_HAS_FPU,     /* Floating Point Unit */
99*eca53ba6SRoland Levillain   PPC_HAS_MMU,     /* Memory management unit */
100*eca53ba6SRoland Levillain   PPC_HAS_4xxMAC,
101*eca53ba6SRoland Levillain   PPC_UNIFIED_CACHE,  /* Unified instruction and data cache */
102*eca53ba6SRoland Levillain   PPC_HAS_SPE,        /* Signal processing extention unit */
103*eca53ba6SRoland Levillain   PPC_HAS_EFP_SINGLE, /* SPE single precision fpu */
104*eca53ba6SRoland Levillain   PPC_HAS_EFP_DOUBLE, /* SPE double precision fpu */
105*eca53ba6SRoland Levillain   PPC_NO_TB,          /* No timebase */
106*eca53ba6SRoland Levillain   PPC_POWER4,
107*eca53ba6SRoland Levillain   PPC_POWER5,
108*eca53ba6SRoland Levillain   PPC_POWER5_PLUS,
109*eca53ba6SRoland Levillain   PPC_CELL,  /* Cell broadband engine */
110*eca53ba6SRoland Levillain   PPC_BOOKE, /* Embedded ISA */
111*eca53ba6SRoland Levillain   PPC_SMT,   /* Simultaneous multi-threading */
112*eca53ba6SRoland Levillain   PPC_ICACHE_SNOOP,
113*eca53ba6SRoland Levillain   PPC_ARCH_2_05, /* ISA 2.05 - POWER6 */
114*eca53ba6SRoland Levillain   PPC_PA6T,      /* PA Semi 6T core ISA */
115*eca53ba6SRoland Levillain   PPC_HAS_DFP,   /* Decimal floating point unit */
116*eca53ba6SRoland Levillain   PPC_POWER6_EXT,
117*eca53ba6SRoland Levillain   PPC_ARCH_2_06,              /* ISA 2.06 - POWER7 */
118*eca53ba6SRoland Levillain   PPC_HAS_VSX,                /* Vector-scalar extension */
119*eca53ba6SRoland Levillain   PPC_PSERIES_PERFMON_COMPAT, /* Set of backwards compatibile performance
120*eca53ba6SRoland Levillain                                  monitoring events */
121*eca53ba6SRoland Levillain   PPC_TRUE_LE,
122*eca53ba6SRoland Levillain   PPC_PPC_LE,
123*eca53ba6SRoland Levillain   PPC_ARCH_2_07,      /* ISA 2.07 - POWER8 */
124*eca53ba6SRoland Levillain   PPC_HTM,            /* Hardware Transactional Memory */
125*eca53ba6SRoland Levillain   PPC_DSCR,           /* Data stream control register */
126*eca53ba6SRoland Levillain   PPC_EBB,            /* Event base branching */
127*eca53ba6SRoland Levillain   PPC_ISEL,           /* Integer select instructions */
128*eca53ba6SRoland Levillain   PPC_TAR,            /* Target address register */
129*eca53ba6SRoland Levillain   PPC_VEC_CRYPTO,     /* Vector cryptography instructions */
130*eca53ba6SRoland Levillain   PPC_HTM_NOSC,       /* Transactions aborted when syscall made*/
131*eca53ba6SRoland Levillain   PPC_ARCH_3_00,      /* ISA 3.00 - POWER9 */
132*eca53ba6SRoland Levillain   PPC_HAS_IEEE128,    /* VSX IEEE Binary Float 128-bit */
133*eca53ba6SRoland Levillain   PPC_DARN,           /* Deliver a random number instruction */
134*eca53ba6SRoland Levillain   PPC_SCV,            /* scv syscall */
135*eca53ba6SRoland Levillain   PPC_HTM_NO_SUSPEND, /* TM w/out suspended state */
136*eca53ba6SRoland Levillain   PPC_LAST_,
137*eca53ba6SRoland Levillain } PPCFeaturesEnum;
138*eca53ba6SRoland Levillain 
139*eca53ba6SRoland Levillain int GetPPCFeaturesEnumValue(const PPCFeatures* features, PPCFeaturesEnum value);
140*eca53ba6SRoland Levillain 
141*eca53ba6SRoland Levillain const char* GetPPCFeaturesEnumName(PPCFeaturesEnum);
142*eca53ba6SRoland Levillain 
143*eca53ba6SRoland Levillain CPU_FEATURES_END_CPP_NAMESPACE
144*eca53ba6SRoland Levillain 
145*eca53ba6SRoland Levillain #if !defined(CPU_FEATURES_ARCH_PPC)
146*eca53ba6SRoland Levillain #error "Including cpuinfo_ppc.h from a non-ppc target."
147*eca53ba6SRoland Levillain #endif
148*eca53ba6SRoland Levillain 
149*eca53ba6SRoland Levillain #endif  // CPU_FEATURES_INCLUDE_CPUINFO_PPC_H_
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