1# AMD Family 15h [SOC|Processors] 2 3## Abstract 4 5Family 15h is a line of AMD x86 products first introduced in 2011. The initial 6microarchitecture, codenamed "Bulldozer", introduced the concept of a "Compute 7Unit" (CU) where some parts of the processor are shared between two cores and 8some parts are unique for each core. Family 15h offerings matured into various 9models with increased performance and features targeting Enterprise, Client, 10and Embedded designs. Notice that a particular model can address more than one 11market(see models references below). 12 13## Introduction 14 15The first CU designs were 2 x86 cores with separate integer processors but 16sharing cache, code branch prediction engine and floating point processor. A die 17can have up to 8 CU. The floating point processor is composed of two symmetrical 18128-bit FMAC. Provided each x86 core is doing 128-bit floating point arithmetic, 19they both do floating point simultaneously. If one is doing 256-bit floating 20point, the other x86 core can't do floating point simultaneously. Later models 21changed how resources were shared, and introduced other performance improvements. 22 23Family 15h products range from SOCs to 3-chip solutions. Devices designed to 24contain on-die graphics (including headless) are commonly referred to as APUs, 25not CPUs. 26 27Later SOCs include a Platform Security Processor (PSP), a small ARM processor 28responsible for security related measures: For example, if secure boot is 29enabled, the cores will not exit reset until the BIOS image within the SPI 30flash is authenticated through its OEM signature, thus ensuring that only OEM 31produced BIOS can run the platform. 32 33Support in coreboot for modern AMD products is based on AMD’s reference code: 34AMD Generic Encapsulated Software Architecture (AGESA™). AGESA contains the 35code for enabling DRAM, configuring proprietary core logic, assistance with 36generating ACPI tables, and other features. 37 38While coreboot contains support for most models, some implementations use a 39separate cpu/north/south bridge directory structure. Newer products for models 4060h-6Fh (Merlin Falcon) and 70h-7Fh (Stoney Ridge) rely on modern SOC directory 41structure. 42 43## References 44 451. [Models 00h-0Fh BKDG](https://www.amd.com/system/files/TechDocs/42301_15h_Mod_00h-0Fh_BKDG.pdf) 462. [Models 10h-1Fh BKDG](https://www.amd.com/system/files/TechDocs/42300_15h_Mod_10h-1Fh_BKDG.pdf) 473. [Models 30h-3Fh BKDG](https://www.amd.com/system/files/TechDocs/49125_15h_Models_30h-3Fh_BKDG.pdf) 484. [Models 60h-6Fh BKDG](https://www.amd.com/system/files/TechDocs/50742_15h_Models_60h-6Fh_BKDG.pdf) 495. [Models 70h-7Fh BKDG](https://www.amd.com/system/files/TechDocs/55072_AMD_Family_15h_Models_70h-7Fh_BKDG.pdf) 506. [PSP Integration](psp_integration.md) 51