1*7c3d14c8STreehugger Robot//===-- floatunssidfvfp.S - Implement floatunssidfvfp ---------------------===// 2*7c3d14c8STreehugger Robot// 3*7c3d14c8STreehugger Robot// The LLVM Compiler Infrastructure 4*7c3d14c8STreehugger Robot// 5*7c3d14c8STreehugger Robot// This file is dual licensed under the MIT and the University of Illinois Open 6*7c3d14c8STreehugger Robot// Source Licenses. See LICENSE.TXT for details. 7*7c3d14c8STreehugger Robot// 8*7c3d14c8STreehugger Robot//===----------------------------------------------------------------------===// 9*7c3d14c8STreehugger Robot 10*7c3d14c8STreehugger Robot#include "../assembly.h" 11*7c3d14c8STreehugger Robot 12*7c3d14c8STreehugger Robot// 13*7c3d14c8STreehugger Robot// extern double __floatunssidfvfp(unsigned int a); 14*7c3d14c8STreehugger Robot// 15*7c3d14c8STreehugger Robot// Converts a 32-bit int to a double precision float. 16*7c3d14c8STreehugger Robot// Uses Darwin calling convention where a double precision result is 17*7c3d14c8STreehugger Robot// return in GPR register pair. 18*7c3d14c8STreehugger Robot// 19*7c3d14c8STreehugger Robot .syntax unified 20*7c3d14c8STreehugger Robot .p2align 2 21*7c3d14c8STreehugger RobotDEFINE_COMPILERRT_FUNCTION(__floatunssidfvfp) 22*7c3d14c8STreehugger Robot vmov s15, r0 // move int to float register s15 23*7c3d14c8STreehugger Robot vcvt.f64.u32 d7, s15 // convert 32-bit int in s15 to double in d7 24*7c3d14c8STreehugger Robot vmov r0, r1, d7 // move d7 to result register pair r0/r1 25*7c3d14c8STreehugger Robot bx lr 26*7c3d14c8STreehugger RobotEND_COMPILERRT_FUNCTION(__floatunssidfvfp) 27*7c3d14c8STreehugger Robot 28*7c3d14c8STreehugger RobotNO_EXEC_STACK_DIRECTIVE 29*7c3d14c8STreehugger Robot 30