1*7c3d14c8STreehugger Robot//===-- fixdfsivfp.S - Implement fixdfsivfp -----------------------===// 2*7c3d14c8STreehugger Robot// 3*7c3d14c8STreehugger Robot// The LLVM Compiler Infrastructure 4*7c3d14c8STreehugger Robot// 5*7c3d14c8STreehugger Robot// This file is dual licensed under the MIT and the University of Illinois Open 6*7c3d14c8STreehugger Robot// Source Licenses. See LICENSE.TXT for details. 7*7c3d14c8STreehugger Robot// 8*7c3d14c8STreehugger Robot//===----------------------------------------------------------------------===// 9*7c3d14c8STreehugger Robot 10*7c3d14c8STreehugger Robot#include "../assembly.h" 11*7c3d14c8STreehugger Robot 12*7c3d14c8STreehugger Robot// 13*7c3d14c8STreehugger Robot// extern int __fixdfsivfp(double a); 14*7c3d14c8STreehugger Robot// 15*7c3d14c8STreehugger Robot// Converts double precision float to a 32-bit int rounding towards zero. 16*7c3d14c8STreehugger Robot// Uses Darwin calling convention where a double precision parameter is 17*7c3d14c8STreehugger Robot// passed in GPR register pair. 18*7c3d14c8STreehugger Robot// 19*7c3d14c8STreehugger Robot .syntax unified 20*7c3d14c8STreehugger Robot .p2align 2 21*7c3d14c8STreehugger RobotDEFINE_COMPILERRT_FUNCTION(__fixdfsivfp) 22*7c3d14c8STreehugger Robot vmov d7, r0, r1 // load double register from R0/R1 23*7c3d14c8STreehugger Robot vcvt.s32.f64 s15, d7 // convert double to 32-bit int into s15 24*7c3d14c8STreehugger Robot vmov r0, s15 // move s15 to result register 25*7c3d14c8STreehugger Robot bx lr 26*7c3d14c8STreehugger RobotEND_COMPILERRT_FUNCTION(__fixdfsivfp) 27*7c3d14c8STreehugger Robot 28*7c3d14c8STreehugger RobotNO_EXEC_STACK_DIRECTIVE 29*7c3d14c8STreehugger Robot 30