1*67e74705SXin Li// RUN: %clang_cc1 -fsyntax-only -Wno-objc-root-class -verify %s 2*67e74705SXin Li 3*67e74705SXin Li@protocol P0 4*67e74705SXin Li@property(readonly,assign) id X; 5*67e74705SXin Li@end 6*67e74705SXin Li 7*67e74705SXin Li@protocol P1 8*67e74705SXin Li@property(readonly,retain) id X; 9*67e74705SXin Li@end 10*67e74705SXin Li 11*67e74705SXin Li@protocol P2 12*67e74705SXin Li@property(readonly,copy) id X; 13*67e74705SXin Li@end 14*67e74705SXin Li 15*67e74705SXin Li@protocol P3 16*67e74705SXin Li@property(readonly,readwrite) id X; // expected-error {{property attributes 'readonly' and 'readwrite' are mutually exclusive}} 17*67e74705SXin Li@end 18*67e74705SXin Li 19*67e74705SXin Li@protocol P4 20*67e74705SXin Li@property(assign,copy) id X; // expected-error {{property attributes 'assign' and 'copy' are mutually exclusive}} 21*67e74705SXin Li@end 22*67e74705SXin Li 23*67e74705SXin Li@protocol P5 24*67e74705SXin Li@property(assign,retain) id X; // expected-error {{property attributes 'assign' and 'retain' are mutually exclusive}} 25*67e74705SXin Li@end 26*67e74705SXin Li 27*67e74705SXin Li@protocol P6 28*67e74705SXin Li@property(copy,retain) id X; // expected-error {{property attributes 'copy' and 'retain' are mutually exclusive}} 29*67e74705SXin Li@end 30*67e74705SXin Li 31*67e74705SXin Li 32*67e74705SXin Li// rdar://11656982 33*67e74705SXin Li@interface I0 <P0> @end 34*67e74705SXin Li@implementation I0 35*67e74705SXin Li@synthesize X; 36*67e74705SXin Li@end 37*67e74705SXin Li 38*67e74705SXin Li@interface I1 <P1> @end 39*67e74705SXin Li@implementation I1 40*67e74705SXin Li@synthesize X; 41*67e74705SXin Li@end 42*67e74705SXin Li 43*67e74705SXin Li@interface I2 <P2> @end 44*67e74705SXin Li@implementation I2 45*67e74705SXin Li@synthesize X; 46*67e74705SXin Li@end 47*67e74705SXin Li 48*67e74705SXin Li@interface I3 <P3> @end 49*67e74705SXin Li@implementation I3 50*67e74705SXin Li@synthesize X; 51*67e74705SXin Li@end 52*67e74705SXin Li 53*67e74705SXin Li@interface I4 <P4> @end 54*67e74705SXin Li@implementation I4 55*67e74705SXin Li@synthesize X; 56*67e74705SXin Li@end 57*67e74705SXin Li 58*67e74705SXin Li@interface I5 <P5> @end 59*67e74705SXin Li@implementation I5 60*67e74705SXin Li@synthesize X; 61*67e74705SXin Li@end 62*67e74705SXin Li 63*67e74705SXin Li@interface I6 <P6> @end 64*67e74705SXin Li@implementation I6 65*67e74705SXin Li@synthesize X; 66*67e74705SXin Li@end 67*67e74705SXin Li 68