xref: /aosp_15_r20/external/clang/test/Sema/inline-asm-validate-aarch64.c (revision 67e74705e28f6214e480b399dd47ea732279e315)
1*67e74705SXin Li // RUN: %clang_cc1 -triple arm64-apple-darwin -fsyntax-only -fdiagnostics-parseable-fixits %s 2>&1 | FileCheck %s
2*67e74705SXin Li 
3*67e74705SXin Li typedef unsigned char uint8_t;
4*67e74705SXin Li 
constraint_r(uint8_t * addr)5*67e74705SXin Li uint8_t constraint_r(uint8_t *addr) {
6*67e74705SXin Li   uint8_t byte;
7*67e74705SXin Li 
8*67e74705SXin Li   __asm__ volatile("ldrb %0, [%1]" : "=r" (byte) : "r" (addr) : "memory");
9*67e74705SXin Li // CHECK: warning: value size does not match register size specified by the constraint and modifier
10*67e74705SXin Li // CHECK: note: use constraint modifier "w"
11*67e74705SXin Li // CHECK: fix-it:{{.*}}:{8:26-8:28}:"%w0"
12*67e74705SXin Li 
13*67e74705SXin Li   return byte;
14*67e74705SXin Li }
15*67e74705SXin Li 
constraint_r_symbolic(uint8_t * addr)16*67e74705SXin Li uint8_t constraint_r_symbolic(uint8_t *addr) {
17*67e74705SXin Li   uint8_t byte;
18*67e74705SXin Li 
19*67e74705SXin Li   __asm__ volatile("ldrb %[s0], [%[s1]]" : [s0] "=r" (byte) : [s1] "r" (addr) : "memory");
20*67e74705SXin Li // CHECK: warning: value size does not match register size specified by the constraint and modifier
21*67e74705SXin Li // CHECK: note: use constraint modifier "w"
22*67e74705SXin Li // CHECK: fix-it:{{.*}}:{19:26-19:31}:"%w[s0]"
23*67e74705SXin Li 
24*67e74705SXin Li   return byte;
25*67e74705SXin Li }
26*67e74705SXin Li 
27*67e74705SXin Li #define PERCENT "%"
28*67e74705SXin Li 
constraint_r_symbolic_macro(uint8_t * addr)29*67e74705SXin Li uint8_t constraint_r_symbolic_macro(uint8_t *addr) {
30*67e74705SXin Li   uint8_t byte;
31*67e74705SXin Li 
32*67e74705SXin Li   __asm__ volatile("ldrb "PERCENT"[s0], [%[s1]]" : [s0] "=r" (byte) : [s1] "r" (addr) : "memory");
33*67e74705SXin Li // CHECK: warning: value size does not match register size specified by the constraint and modifier
34*67e74705SXin Li // CHECK: note: use constraint modifier "w"
35*67e74705SXin Li // CHECK-NOT: fix-it
36*67e74705SXin Li 
37*67e74705SXin Li   return byte;
38*67e74705SXin Li }
39*67e74705SXin Li 
40*67e74705SXin Li // CHECK: warning: value size does not match register size specified by the constraint and modifier
41*67e74705SXin Li // CHECK: asm ("%w0 %w1 %2" : "+r" (one) : "r" (wide_two));
42*67e74705SXin Li // CHECK: note: use constraint modifier "w"
43*67e74705SXin Li // CHECK: fix-it:{{.*}}:{47:17-47:19}:"%w2"
44*67e74705SXin Li 
read_write_modifier0(int one,int two)45*67e74705SXin Li void read_write_modifier0(int one, int two) {
46*67e74705SXin Li   long wide_two = two;
47*67e74705SXin Li   asm ("%w0 %w1 %2" : "+r" (one) : "r" (wide_two));
48*67e74705SXin Li }
49*67e74705SXin Li 
50*67e74705SXin Li // CHECK-NOT: warning:
read_write_modifier1(int one,int two)51*67e74705SXin Li void read_write_modifier1(int one, int two) {
52*67e74705SXin Li   long wide_two = two;
53*67e74705SXin Li   asm ("%w0 %1" : "+r" (one), "+r" (wide_two));
54*67e74705SXin Li }
55