xref: /aosp_15_r20/external/clang/test/CodeGen/attr-target-x86-mmx.c (revision 67e74705e28f6214e480b399dd47ea732279e315)
1*67e74705SXin Li // RUN: %clang_cc1 -triple i386-linux-gnu -emit-llvm %s -o - | FileCheck %s
2*67e74705SXin Li // Picking a cpu that doesn't have mmx or sse by default so we can enable it later.
3*67e74705SXin Li 
4*67e74705SXin Li #define __MM_MALLOC_H
5*67e74705SXin Li 
6*67e74705SXin Li #include <x86intrin.h>
7*67e74705SXin Li 
8*67e74705SXin Li // Verify that when we turn on sse that we also turn on mmx.
shift(__m64 a,__m64 b,int c)9*67e74705SXin Li void __attribute__((target("sse"))) shift(__m64 a, __m64 b, int c) {
10*67e74705SXin Li   _mm_slli_pi16(a, c);
11*67e74705SXin Li   _mm_slli_pi32(a, c);
12*67e74705SXin Li   _mm_slli_si64(a, c);
13*67e74705SXin Li 
14*67e74705SXin Li   _mm_srli_pi16(a, c);
15*67e74705SXin Li   _mm_srli_pi32(a, c);
16*67e74705SXin Li   _mm_srli_si64(a, c);
17*67e74705SXin Li 
18*67e74705SXin Li   _mm_srai_pi16(a, c);
19*67e74705SXin Li   _mm_srai_pi32(a, c);
20*67e74705SXin Li }
21*67e74705SXin Li 
22*67e74705SXin Li // CHECK: "target-features"="+mmx,+sse,+x87"
23