xref: /aosp_15_r20/external/clang/test/CodeGen/asm-reg-var-local.c (revision 67e74705e28f6214e480b399dd47ea732279e315)
1*67e74705SXin Li // RUN: %clang_cc1 %s -triple x86_64-apple-darwin -emit-llvm -o - | FileCheck %s
2*67e74705SXin Li // Exercise various use cases for local asm "register variables".
3*67e74705SXin Li 
foo()4*67e74705SXin Li int foo() {
5*67e74705SXin Li // CHECK-LABEL: define i32 @foo()
6*67e74705SXin Li // CHECK: [[A:%[a-zA-Z0-9]+]] = alloca i32
7*67e74705SXin Li 
8*67e74705SXin Li   register int a asm("rsi")=5;
9*67e74705SXin Li // CHECK: store i32 5, i32* [[A]]
10*67e74705SXin Li 
11*67e74705SXin Li   asm volatile("; %0 This asm defines rsi" : "=r"(a));
12*67e74705SXin Li // CHECK: [[Z:%[a-zA-Z0-9]+]] = call i32 asm sideeffect "; $0 This asm defines rsi", "={rsi},~{dirflag},~{fpsr},~{flags}"()
13*67e74705SXin Li // CHECK: store i32 [[Z]], i32* [[A]]
14*67e74705SXin Li 
15*67e74705SXin Li   a = 42;
16*67e74705SXin Li // CHECK:  store i32 42, i32* [[A]]
17*67e74705SXin Li 
18*67e74705SXin Li   asm volatile("; %0 This asm uses rsi" : : "r"(a));
19*67e74705SXin Li // CHECK:  [[TMP:%[a-zA-Z0-9]+]] = load i32, i32* [[A]]
20*67e74705SXin Li // CHECK:  call void asm sideeffect "; $0 This asm uses rsi", "{rsi},~{dirflag},~{fpsr},~{flags}"(i32 [[TMP]])
21*67e74705SXin Li 
22*67e74705SXin Li   return a;
23*67e74705SXin Li // CHECK:  [[TMP1:%[a-zA-Z0-9]+]] = load i32, i32* [[A]]
24*67e74705SXin Li // CHECK:  ret i32 [[TMP1]]
25*67e74705SXin Li }
26*67e74705SXin Li 
earlyclobber()27*67e74705SXin Li int earlyclobber() {
28*67e74705SXin Li // CHECK-LABEL: define i32 @earlyclobber()
29*67e74705SXin Li // CHECK: [[A:%[a-zA-Z0-9]+]] = alloca i32
30*67e74705SXin Li 
31*67e74705SXin Li   register int a asm("rsi")=5;
32*67e74705SXin Li // CHECK: store i32 5, i32* [[A]]
33*67e74705SXin Li 
34*67e74705SXin Li   asm volatile("; %0 This asm defines rsi" : "=&r"(a));
35*67e74705SXin Li // CHECK: [[Z:%[a-zA-Z0-9]+]] = call i32 asm sideeffect "; $0 This asm defines rsi", "=&{rsi},~{dirflag},~{fpsr},~{flags}"()
36*67e74705SXin Li // CHECK: store i32 [[Z]], i32* [[A]]
37*67e74705SXin Li 
38*67e74705SXin Li   a = 42;
39*67e74705SXin Li // CHECK:  store i32 42, i32* [[A]]
40*67e74705SXin Li 
41*67e74705SXin Li   asm volatile("; %0 This asm uses rsi" : : "r"(a));
42*67e74705SXin Li // CHECK:  [[TMP:%[a-zA-Z0-9]+]] = load i32, i32* [[A]]
43*67e74705SXin Li // CHECK:  call void asm sideeffect "; $0 This asm uses rsi", "{rsi},~{dirflag},~{fpsr},~{flags}"(i32 [[TMP]])
44*67e74705SXin Li 
45*67e74705SXin Li   return a;
46*67e74705SXin Li // CHECK:  [[TMP1:%[a-zA-Z0-9]+]] = load i32, i32* [[A]]
47*67e74705SXin Li // CHECK:  ret i32 [[TMP1]]
48*67e74705SXin Li }
49