1*67e74705SXin Li // RUN: %clang_cc1 -triple aarch64-linux-gnu -target-feature +neon -target-abi aapcs -ffreestanding -fallow-half-arguments-and-returns -emit-llvm -w -o - %s | FileCheck %s
2*67e74705SXin Li
3*67e74705SXin Li // AAPCS clause C.8 says: If the argument has an alignment of 16 then the NGRN
4*67e74705SXin Li // is rounded up to the next even number.
5*67e74705SXin Li
6*67e74705SXin Li // CHECK: void @test1(i32 %x0, i128 %x2_x3, i128 %x4_x5, i128 %x6_x7, i128 %sp.coerce)
7*67e74705SXin Li typedef union { __int128 a; } Small;
test1(int x0,__int128 x2_x3,__int128 x4_x5,__int128 x6_x7,Small sp)8*67e74705SXin Li void test1(int x0, __int128 x2_x3, __int128 x4_x5, __int128 x6_x7, Small sp) {
9*67e74705SXin Li }
10*67e74705SXin Li
11*67e74705SXin Li
12*67e74705SXin Li // CHECK: void @test2(i32 %x0, i128 %x2_x3.coerce, i32 %x4, i128 %x6_x7.coerce, i32 %sp, i128 %sp16.coerce)
test2(int x0,Small x2_x3,int x4,Small x6_x7,int sp,Small sp16)13*67e74705SXin Li void test2(int x0, Small x2_x3, int x4, Small x6_x7, int sp, Small sp16) {
14*67e74705SXin Li }
15*67e74705SXin Li
16*67e74705SXin Li // We coerce HFAs into a contiguous [N x double] type if they're going on the
17*67e74705SXin Li // stack in order to avoid holes. Make sure we get all of them, and not just the
18*67e74705SXin Li // first:
19*67e74705SXin Li
20*67e74705SXin Li // CHECK: void @test3([4 x float] %s0_s3.coerce, float %s4, [4 x float] %sp.coerce, [4 x float] %sp16.coerce)
21*67e74705SXin Li typedef struct { float arr[4]; } HFA;
test3(HFA s0_s3,float s4,HFA sp,HFA sp16)22*67e74705SXin Li void test3(HFA s0_s3, float s4, HFA sp, HFA sp16) {
23*67e74705SXin Li }
24*67e74705SXin Li
25*67e74705SXin Li
26*67e74705SXin Li // However, we shouldn't perform the [N x double] coercion on types which have
27*67e74705SXin Li // sufficient alignment to avoid holes on their own. We could coerce to [N x
28*67e74705SXin Li // fp128] or something, but leaving them as-is retains more information for
29*67e74705SXin Li // users to debug.
30*67e74705SXin Li
31*67e74705SXin Li // CHECK: void @test4([3 x <16 x i8>] %v0_v2.coerce, [3 x <16 x i8>] %v3_v5.coerce, [3 x <16 x i8>] %sp.coerce, double %sp48, [3 x <16 x i8>] %sp64.coerce)
32*67e74705SXin Li typedef __attribute__((neon_vector_type(16))) signed char int8x16_t;
33*67e74705SXin Li typedef struct { int8x16_t arr[3]; } BigHFA;
test4(BigHFA v0_v2,BigHFA v3_v5,BigHFA sp,double sp48,BigHFA sp64)34*67e74705SXin Li void test4(BigHFA v0_v2, BigHFA v3_v5, BigHFA sp, double sp48, BigHFA sp64) {
35*67e74705SXin Li }
36*67e74705SXin Li
37*67e74705SXin Li // It's the job of the argument *consumer* to perform the required sign & zero
38*67e74705SXin Li // extensions under AAPCS. There shouldn't be
39*67e74705SXin Li
40*67e74705SXin Li // CHECK: define i8 @test5(i8 %a, i16 %b)
test5(unsigned char a,signed short b)41*67e74705SXin Li unsigned char test5(unsigned char a, signed short b) {
42*67e74705SXin Li }
43*67e74705SXin Li
44*67e74705SXin Li // __fp16 can be used as a function argument or return type (ACLE 2.0)
45*67e74705SXin Li // CHECK: define half @test_half(half %{{.*}})
test_half(__fp16 A)46*67e74705SXin Li __fp16 test_half(__fp16 A) { }
47*67e74705SXin Li
48*67e74705SXin Li // __fp16 is a base type for homogeneous floating-point aggregates for AArch64 (but not 32-bit ARM).
49*67e74705SXin Li // CHECK: define %struct.HFA_half @test_half_hfa([4 x half] %{{.*}})
50*67e74705SXin Li struct HFA_half { __fp16 a[4]; };
test_half_hfa(struct HFA_half A)51*67e74705SXin Li struct HFA_half test_half_hfa(struct HFA_half A) { }
52