1*67e74705SXin Li // RUN: %clang_cc1 -triple armv8-none-linux-gnueabi \
2*67e74705SXin Li // RUN: -emit-llvm -o - %s | opt -S -mem2reg | FileCheck %s
3*67e74705SXin Li
crc32b(int a,char b)4*67e74705SXin Li int crc32b(int a, char b)
5*67e74705SXin Li {
6*67e74705SXin Li return __builtin_arm_crc32b(a,b);
7*67e74705SXin Li // CHECK: [[T0:%[0-9]+]] = zext i8 %b to i32
8*67e74705SXin Li // CHECK: call i32 @llvm.arm.crc32b(i32 %a, i32 [[T0]])
9*67e74705SXin Li }
10*67e74705SXin Li
crc32cb(int a,char b)11*67e74705SXin Li int crc32cb(int a, char b)
12*67e74705SXin Li {
13*67e74705SXin Li return __builtin_arm_crc32cb(a,b);
14*67e74705SXin Li // CHECK: [[T0:%[0-9]+]] = zext i8 %b to i32
15*67e74705SXin Li // CHECK: call i32 @llvm.arm.crc32cb(i32 %a, i32 [[T0]])
16*67e74705SXin Li }
17*67e74705SXin Li
crc32h(int a,short b)18*67e74705SXin Li int crc32h(int a, short b)
19*67e74705SXin Li {
20*67e74705SXin Li return __builtin_arm_crc32h(a,b);
21*67e74705SXin Li // CHECK: [[T0:%[0-9]+]] = zext i16 %b to i32
22*67e74705SXin Li // CHECK: call i32 @llvm.arm.crc32h(i32 %a, i32 [[T0]])
23*67e74705SXin Li }
24*67e74705SXin Li
crc32ch(int a,short b)25*67e74705SXin Li int crc32ch(int a, short b)
26*67e74705SXin Li {
27*67e74705SXin Li return __builtin_arm_crc32ch(a,b);
28*67e74705SXin Li // CHECK: [[T0:%[0-9]+]] = zext i16 %b to i32
29*67e74705SXin Li // CHECK: call i32 @llvm.arm.crc32ch(i32 %a, i32 [[T0]])
30*67e74705SXin Li }
31*67e74705SXin Li
crc32w(int a,int b)32*67e74705SXin Li int crc32w(int a, int b)
33*67e74705SXin Li {
34*67e74705SXin Li return __builtin_arm_crc32w(a,b);
35*67e74705SXin Li // CHECK: call i32 @llvm.arm.crc32w(i32 %a, i32 %b)
36*67e74705SXin Li }
37*67e74705SXin Li
crc32cw(int a,int b)38*67e74705SXin Li int crc32cw(int a, int b)
39*67e74705SXin Li {
40*67e74705SXin Li return __builtin_arm_crc32cw(a,b);
41*67e74705SXin Li // CHECK: call i32 @llvm.arm.crc32cw(i32 %a, i32 %b)
42*67e74705SXin Li }
43*67e74705SXin Li
crc32d(int a,long long b)44*67e74705SXin Li int crc32d(int a, long long b)
45*67e74705SXin Li {
46*67e74705SXin Li return __builtin_arm_crc32d(a,b);
47*67e74705SXin Li // CHECK: [[T0:%[0-9]+]] = trunc i64 %b to i32
48*67e74705SXin Li // CHECK: [[T1:%[0-9]+]] = lshr i64 %b, 32
49*67e74705SXin Li // CHECK: [[T2:%[0-9]+]] = trunc i64 [[T1]] to i32
50*67e74705SXin Li // CHECK: [[T3:%[0-9]+]] = call i32 @llvm.arm.crc32w(i32 %a, i32 [[T0]])
51*67e74705SXin Li // CHECK: call i32 @llvm.arm.crc32w(i32 [[T3]], i32 [[T2]])
52*67e74705SXin Li }
53*67e74705SXin Li
crc32cd(int a,long long b)54*67e74705SXin Li int crc32cd(int a, long long b)
55*67e74705SXin Li {
56*67e74705SXin Li return __builtin_arm_crc32cd(a,b);
57*67e74705SXin Li // CHECK: [[T0:%[0-9]+]] = trunc i64 %b to i32
58*67e74705SXin Li // CHECK: [[T1:%[0-9]+]] = lshr i64 %b, 32
59*67e74705SXin Li // CHECK: [[T2:%[0-9]+]] = trunc i64 [[T1]] to i32
60*67e74705SXin Li // CHECK: [[T3:%[0-9]+]] = call i32 @llvm.arm.crc32cw(i32 %a, i32 [[T0]])
61*67e74705SXin Li // CHECK: call i32 @llvm.arm.crc32cw(i32 [[T3]], i32 [[T2]])
62*67e74705SXin Li }
63