xref: /aosp_15_r20/external/clang/lib/Headers/fma4intrin.h (revision 67e74705e28f6214e480b399dd47ea732279e315)
1*67e74705SXin Li /*===---- fma4intrin.h - FMA4 intrinsics -----------------------------------===
2*67e74705SXin Li  *
3*67e74705SXin Li  * Permission is hereby granted, free of charge, to any person obtaining a copy
4*67e74705SXin Li  * of this software and associated documentation files (the "Software"), to deal
5*67e74705SXin Li  * in the Software without restriction, including without limitation the rights
6*67e74705SXin Li  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7*67e74705SXin Li  * copies of the Software, and to permit persons to whom the Software is
8*67e74705SXin Li  * furnished to do so, subject to the following conditions:
9*67e74705SXin Li  *
10*67e74705SXin Li  * The above copyright notice and this permission notice shall be included in
11*67e74705SXin Li  * all copies or substantial portions of the Software.
12*67e74705SXin Li  *
13*67e74705SXin Li  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14*67e74705SXin Li  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15*67e74705SXin Li  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16*67e74705SXin Li  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17*67e74705SXin Li  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18*67e74705SXin Li  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
19*67e74705SXin Li  * THE SOFTWARE.
20*67e74705SXin Li  *
21*67e74705SXin Li  *===-----------------------------------------------------------------------===
22*67e74705SXin Li  */
23*67e74705SXin Li 
24*67e74705SXin Li #ifndef __X86INTRIN_H
25*67e74705SXin Li #error "Never use <fma4intrin.h> directly; include <x86intrin.h> instead."
26*67e74705SXin Li #endif
27*67e74705SXin Li 
28*67e74705SXin Li #ifndef __FMA4INTRIN_H
29*67e74705SXin Li #define __FMA4INTRIN_H
30*67e74705SXin Li 
31*67e74705SXin Li #include <pmmintrin.h>
32*67e74705SXin Li 
33*67e74705SXin Li /* Define the default attributes for the functions in this file. */
34*67e74705SXin Li #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("fma4")))
35*67e74705SXin Li 
36*67e74705SXin Li static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_macc_ps(__m128 __A,__m128 __B,__m128 __C)37*67e74705SXin Li _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C)
38*67e74705SXin Li {
39*67e74705SXin Li   return (__m128)__builtin_ia32_vfmaddps((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
40*67e74705SXin Li }
41*67e74705SXin Li 
42*67e74705SXin Li static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_macc_pd(__m128d __A,__m128d __B,__m128d __C)43*67e74705SXin Li _mm_macc_pd(__m128d __A, __m128d __B, __m128d __C)
44*67e74705SXin Li {
45*67e74705SXin Li   return (__m128d)__builtin_ia32_vfmaddpd((__v2df)__A, (__v2df)__B, (__v2df)__C);
46*67e74705SXin Li }
47*67e74705SXin Li 
48*67e74705SXin Li static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_macc_ss(__m128 __A,__m128 __B,__m128 __C)49*67e74705SXin Li _mm_macc_ss(__m128 __A, __m128 __B, __m128 __C)
50*67e74705SXin Li {
51*67e74705SXin Li   return (__m128)__builtin_ia32_vfmaddss((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
52*67e74705SXin Li }
53*67e74705SXin Li 
54*67e74705SXin Li static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_macc_sd(__m128d __A,__m128d __B,__m128d __C)55*67e74705SXin Li _mm_macc_sd(__m128d __A, __m128d __B, __m128d __C)
56*67e74705SXin Li {
57*67e74705SXin Li   return (__m128d)__builtin_ia32_vfmaddsd((__v2df)__A, (__v2df)__B, (__v2df)__C);
58*67e74705SXin Li }
59*67e74705SXin Li 
60*67e74705SXin Li static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_msub_ps(__m128 __A,__m128 __B,__m128 __C)61*67e74705SXin Li _mm_msub_ps(__m128 __A, __m128 __B, __m128 __C)
62*67e74705SXin Li {
63*67e74705SXin Li   return (__m128)__builtin_ia32_vfmsubps((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
64*67e74705SXin Li }
65*67e74705SXin Li 
66*67e74705SXin Li static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_msub_pd(__m128d __A,__m128d __B,__m128d __C)67*67e74705SXin Li _mm_msub_pd(__m128d __A, __m128d __B, __m128d __C)
68*67e74705SXin Li {
69*67e74705SXin Li   return (__m128d)__builtin_ia32_vfmsubpd((__v2df)__A, (__v2df)__B, (__v2df)__C);
70*67e74705SXin Li }
71*67e74705SXin Li 
72*67e74705SXin Li static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_msub_ss(__m128 __A,__m128 __B,__m128 __C)73*67e74705SXin Li _mm_msub_ss(__m128 __A, __m128 __B, __m128 __C)
74*67e74705SXin Li {
75*67e74705SXin Li   return (__m128)__builtin_ia32_vfmsubss((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
76*67e74705SXin Li }
77*67e74705SXin Li 
78*67e74705SXin Li static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_msub_sd(__m128d __A,__m128d __B,__m128d __C)79*67e74705SXin Li _mm_msub_sd(__m128d __A, __m128d __B, __m128d __C)
80*67e74705SXin Li {
81*67e74705SXin Li   return (__m128d)__builtin_ia32_vfmsubsd((__v2df)__A, (__v2df)__B, (__v2df)__C);
82*67e74705SXin Li }
83*67e74705SXin Li 
84*67e74705SXin Li static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_nmacc_ps(__m128 __A,__m128 __B,__m128 __C)85*67e74705SXin Li _mm_nmacc_ps(__m128 __A, __m128 __B, __m128 __C)
86*67e74705SXin Li {
87*67e74705SXin Li   return (__m128)__builtin_ia32_vfnmaddps((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
88*67e74705SXin Li }
89*67e74705SXin Li 
90*67e74705SXin Li static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_nmacc_pd(__m128d __A,__m128d __B,__m128d __C)91*67e74705SXin Li _mm_nmacc_pd(__m128d __A, __m128d __B, __m128d __C)
92*67e74705SXin Li {
93*67e74705SXin Li   return (__m128d)__builtin_ia32_vfnmaddpd((__v2df)__A, (__v2df)__B, (__v2df)__C);
94*67e74705SXin Li }
95*67e74705SXin Li 
96*67e74705SXin Li static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_nmacc_ss(__m128 __A,__m128 __B,__m128 __C)97*67e74705SXin Li _mm_nmacc_ss(__m128 __A, __m128 __B, __m128 __C)
98*67e74705SXin Li {
99*67e74705SXin Li   return (__m128)__builtin_ia32_vfnmaddss((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
100*67e74705SXin Li }
101*67e74705SXin Li 
102*67e74705SXin Li static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_nmacc_sd(__m128d __A,__m128d __B,__m128d __C)103*67e74705SXin Li _mm_nmacc_sd(__m128d __A, __m128d __B, __m128d __C)
104*67e74705SXin Li {
105*67e74705SXin Li   return (__m128d)__builtin_ia32_vfnmaddsd((__v2df)__A, (__v2df)__B, (__v2df)__C);
106*67e74705SXin Li }
107*67e74705SXin Li 
108*67e74705SXin Li static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_nmsub_ps(__m128 __A,__m128 __B,__m128 __C)109*67e74705SXin Li _mm_nmsub_ps(__m128 __A, __m128 __B, __m128 __C)
110*67e74705SXin Li {
111*67e74705SXin Li   return (__m128)__builtin_ia32_vfnmsubps((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
112*67e74705SXin Li }
113*67e74705SXin Li 
114*67e74705SXin Li static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_nmsub_pd(__m128d __A,__m128d __B,__m128d __C)115*67e74705SXin Li _mm_nmsub_pd(__m128d __A, __m128d __B, __m128d __C)
116*67e74705SXin Li {
117*67e74705SXin Li   return (__m128d)__builtin_ia32_vfnmsubpd((__v2df)__A, (__v2df)__B, (__v2df)__C);
118*67e74705SXin Li }
119*67e74705SXin Li 
120*67e74705SXin Li static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_nmsub_ss(__m128 __A,__m128 __B,__m128 __C)121*67e74705SXin Li _mm_nmsub_ss(__m128 __A, __m128 __B, __m128 __C)
122*67e74705SXin Li {
123*67e74705SXin Li   return (__m128)__builtin_ia32_vfnmsubss((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
124*67e74705SXin Li }
125*67e74705SXin Li 
126*67e74705SXin Li static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_nmsub_sd(__m128d __A,__m128d __B,__m128d __C)127*67e74705SXin Li _mm_nmsub_sd(__m128d __A, __m128d __B, __m128d __C)
128*67e74705SXin Li {
129*67e74705SXin Li   return (__m128d)__builtin_ia32_vfnmsubsd((__v2df)__A, (__v2df)__B, (__v2df)__C);
130*67e74705SXin Li }
131*67e74705SXin Li 
132*67e74705SXin Li static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_maddsub_ps(__m128 __A,__m128 __B,__m128 __C)133*67e74705SXin Li _mm_maddsub_ps(__m128 __A, __m128 __B, __m128 __C)
134*67e74705SXin Li {
135*67e74705SXin Li   return (__m128)__builtin_ia32_vfmaddsubps((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
136*67e74705SXin Li }
137*67e74705SXin Li 
138*67e74705SXin Li static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_maddsub_pd(__m128d __A,__m128d __B,__m128d __C)139*67e74705SXin Li _mm_maddsub_pd(__m128d __A, __m128d __B, __m128d __C)
140*67e74705SXin Li {
141*67e74705SXin Li   return (__m128d)__builtin_ia32_vfmaddsubpd((__v2df)__A, (__v2df)__B, (__v2df)__C);
142*67e74705SXin Li }
143*67e74705SXin Li 
144*67e74705SXin Li static __inline__ __m128 __DEFAULT_FN_ATTRS
_mm_msubadd_ps(__m128 __A,__m128 __B,__m128 __C)145*67e74705SXin Li _mm_msubadd_ps(__m128 __A, __m128 __B, __m128 __C)
146*67e74705SXin Li {
147*67e74705SXin Li   return (__m128)__builtin_ia32_vfmsubaddps((__v4sf)__A, (__v4sf)__B, (__v4sf)__C);
148*67e74705SXin Li }
149*67e74705SXin Li 
150*67e74705SXin Li static __inline__ __m128d __DEFAULT_FN_ATTRS
_mm_msubadd_pd(__m128d __A,__m128d __B,__m128d __C)151*67e74705SXin Li _mm_msubadd_pd(__m128d __A, __m128d __B, __m128d __C)
152*67e74705SXin Li {
153*67e74705SXin Li   return (__m128d)__builtin_ia32_vfmsubaddpd((__v2df)__A, (__v2df)__B, (__v2df)__C);
154*67e74705SXin Li }
155*67e74705SXin Li 
156*67e74705SXin Li static __inline__ __m256 __DEFAULT_FN_ATTRS
_mm256_macc_ps(__m256 __A,__m256 __B,__m256 __C)157*67e74705SXin Li _mm256_macc_ps(__m256 __A, __m256 __B, __m256 __C)
158*67e74705SXin Li {
159*67e74705SXin Li   return (__m256)__builtin_ia32_vfmaddps256((__v8sf)__A, (__v8sf)__B, (__v8sf)__C);
160*67e74705SXin Li }
161*67e74705SXin Li 
162*67e74705SXin Li static __inline__ __m256d __DEFAULT_FN_ATTRS
_mm256_macc_pd(__m256d __A,__m256d __B,__m256d __C)163*67e74705SXin Li _mm256_macc_pd(__m256d __A, __m256d __B, __m256d __C)
164*67e74705SXin Li {
165*67e74705SXin Li   return (__m256d)__builtin_ia32_vfmaddpd256((__v4df)__A, (__v4df)__B, (__v4df)__C);
166*67e74705SXin Li }
167*67e74705SXin Li 
168*67e74705SXin Li static __inline__ __m256 __DEFAULT_FN_ATTRS
_mm256_msub_ps(__m256 __A,__m256 __B,__m256 __C)169*67e74705SXin Li _mm256_msub_ps(__m256 __A, __m256 __B, __m256 __C)
170*67e74705SXin Li {
171*67e74705SXin Li   return (__m256)__builtin_ia32_vfmsubps256((__v8sf)__A, (__v8sf)__B, (__v8sf)__C);
172*67e74705SXin Li }
173*67e74705SXin Li 
174*67e74705SXin Li static __inline__ __m256d __DEFAULT_FN_ATTRS
_mm256_msub_pd(__m256d __A,__m256d __B,__m256d __C)175*67e74705SXin Li _mm256_msub_pd(__m256d __A, __m256d __B, __m256d __C)
176*67e74705SXin Li {
177*67e74705SXin Li   return (__m256d)__builtin_ia32_vfmsubpd256((__v4df)__A, (__v4df)__B, (__v4df)__C);
178*67e74705SXin Li }
179*67e74705SXin Li 
180*67e74705SXin Li static __inline__ __m256 __DEFAULT_FN_ATTRS
_mm256_nmacc_ps(__m256 __A,__m256 __B,__m256 __C)181*67e74705SXin Li _mm256_nmacc_ps(__m256 __A, __m256 __B, __m256 __C)
182*67e74705SXin Li {
183*67e74705SXin Li   return (__m256)__builtin_ia32_vfnmaddps256((__v8sf)__A, (__v8sf)__B, (__v8sf)__C);
184*67e74705SXin Li }
185*67e74705SXin Li 
186*67e74705SXin Li static __inline__ __m256d __DEFAULT_FN_ATTRS
_mm256_nmacc_pd(__m256d __A,__m256d __B,__m256d __C)187*67e74705SXin Li _mm256_nmacc_pd(__m256d __A, __m256d __B, __m256d __C)
188*67e74705SXin Li {
189*67e74705SXin Li   return (__m256d)__builtin_ia32_vfnmaddpd256((__v4df)__A, (__v4df)__B, (__v4df)__C);
190*67e74705SXin Li }
191*67e74705SXin Li 
192*67e74705SXin Li static __inline__ __m256 __DEFAULT_FN_ATTRS
_mm256_nmsub_ps(__m256 __A,__m256 __B,__m256 __C)193*67e74705SXin Li _mm256_nmsub_ps(__m256 __A, __m256 __B, __m256 __C)
194*67e74705SXin Li {
195*67e74705SXin Li   return (__m256)__builtin_ia32_vfnmsubps256((__v8sf)__A, (__v8sf)__B, (__v8sf)__C);
196*67e74705SXin Li }
197*67e74705SXin Li 
198*67e74705SXin Li static __inline__ __m256d __DEFAULT_FN_ATTRS
_mm256_nmsub_pd(__m256d __A,__m256d __B,__m256d __C)199*67e74705SXin Li _mm256_nmsub_pd(__m256d __A, __m256d __B, __m256d __C)
200*67e74705SXin Li {
201*67e74705SXin Li   return (__m256d)__builtin_ia32_vfnmsubpd256((__v4df)__A, (__v4df)__B, (__v4df)__C);
202*67e74705SXin Li }
203*67e74705SXin Li 
204*67e74705SXin Li static __inline__ __m256 __DEFAULT_FN_ATTRS
_mm256_maddsub_ps(__m256 __A,__m256 __B,__m256 __C)205*67e74705SXin Li _mm256_maddsub_ps(__m256 __A, __m256 __B, __m256 __C)
206*67e74705SXin Li {
207*67e74705SXin Li   return (__m256)__builtin_ia32_vfmaddsubps256((__v8sf)__A, (__v8sf)__B, (__v8sf)__C);
208*67e74705SXin Li }
209*67e74705SXin Li 
210*67e74705SXin Li static __inline__ __m256d __DEFAULT_FN_ATTRS
_mm256_maddsub_pd(__m256d __A,__m256d __B,__m256d __C)211*67e74705SXin Li _mm256_maddsub_pd(__m256d __A, __m256d __B, __m256d __C)
212*67e74705SXin Li {
213*67e74705SXin Li   return (__m256d)__builtin_ia32_vfmaddsubpd256((__v4df)__A, (__v4df)__B, (__v4df)__C);
214*67e74705SXin Li }
215*67e74705SXin Li 
216*67e74705SXin Li static __inline__ __m256 __DEFAULT_FN_ATTRS
_mm256_msubadd_ps(__m256 __A,__m256 __B,__m256 __C)217*67e74705SXin Li _mm256_msubadd_ps(__m256 __A, __m256 __B, __m256 __C)
218*67e74705SXin Li {
219*67e74705SXin Li   return (__m256)__builtin_ia32_vfmsubaddps256((__v8sf)__A, (__v8sf)__B, (__v8sf)__C);
220*67e74705SXin Li }
221*67e74705SXin Li 
222*67e74705SXin Li static __inline__ __m256d __DEFAULT_FN_ATTRS
_mm256_msubadd_pd(__m256d __A,__m256d __B,__m256d __C)223*67e74705SXin Li _mm256_msubadd_pd(__m256d __A, __m256d __B, __m256d __C)
224*67e74705SXin Li {
225*67e74705SXin Li   return (__m256d)__builtin_ia32_vfmsubaddpd256((__v4df)__A, (__v4df)__B, (__v4df)__C);
226*67e74705SXin Li }
227*67e74705SXin Li 
228*67e74705SXin Li #undef __DEFAULT_FN_ATTRS
229*67e74705SXin Li 
230*67e74705SXin Li #endif /* __FMA4INTRIN_H */
231