xref: /aosp_15_r20/external/capstone/cstool/cstool_arm64.c (revision 9a0e4156d50a75a99ec4f1653a0e9602a5d45c18)
1*9a0e4156SSadaf Ebrahimi /* Capstone Disassembler Engine */
2*9a0e4156SSadaf Ebrahimi /* By Nguyen Anh Quynh <[email protected]>, 2013> */
3*9a0e4156SSadaf Ebrahimi 
4*9a0e4156SSadaf Ebrahimi #include <stdio.h>
5*9a0e4156SSadaf Ebrahimi #include <stdlib.h>
6*9a0e4156SSadaf Ebrahimi 
7*9a0e4156SSadaf Ebrahimi #include <capstone/capstone.h>
8*9a0e4156SSadaf Ebrahimi 
9*9a0e4156SSadaf Ebrahimi void print_string_hex(char *comment, unsigned char *str, size_t len);
10*9a0e4156SSadaf Ebrahimi 
print_insn_detail_arm64(csh handle,cs_insn * ins)11*9a0e4156SSadaf Ebrahimi void print_insn_detail_arm64(csh handle, cs_insn *ins)
12*9a0e4156SSadaf Ebrahimi {
13*9a0e4156SSadaf Ebrahimi 	cs_arm64 *arm64;
14*9a0e4156SSadaf Ebrahimi 	int i;
15*9a0e4156SSadaf Ebrahimi 	cs_regs regs_read, regs_write;
16*9a0e4156SSadaf Ebrahimi 	uint8_t regs_read_count, regs_write_count;
17*9a0e4156SSadaf Ebrahimi 	uint8_t access;
18*9a0e4156SSadaf Ebrahimi 
19*9a0e4156SSadaf Ebrahimi 	// detail can be NULL if SKIPDATA option is turned ON
20*9a0e4156SSadaf Ebrahimi 	if (ins->detail == NULL)
21*9a0e4156SSadaf Ebrahimi 		return;
22*9a0e4156SSadaf Ebrahimi 
23*9a0e4156SSadaf Ebrahimi 	arm64 = &(ins->detail->arm64);
24*9a0e4156SSadaf Ebrahimi 	if (arm64->op_count)
25*9a0e4156SSadaf Ebrahimi 		printf("\top_count: %u\n", arm64->op_count);
26*9a0e4156SSadaf Ebrahimi 
27*9a0e4156SSadaf Ebrahimi 	for (i = 0; i < arm64->op_count; i++) {
28*9a0e4156SSadaf Ebrahimi 		cs_arm64_op *op = &(arm64->operands[i]);
29*9a0e4156SSadaf Ebrahimi 		switch(op->type) {
30*9a0e4156SSadaf Ebrahimi 			default:
31*9a0e4156SSadaf Ebrahimi 				break;
32*9a0e4156SSadaf Ebrahimi 			case ARM64_OP_REG:
33*9a0e4156SSadaf Ebrahimi 				printf("\t\toperands[%u].type: REG = %s\n", i, cs_reg_name(handle, op->reg));
34*9a0e4156SSadaf Ebrahimi 				break;
35*9a0e4156SSadaf Ebrahimi 			case ARM64_OP_IMM:
36*9a0e4156SSadaf Ebrahimi 				printf("\t\toperands[%u].type: IMM = 0x%" PRIx64 "\n", i, op->imm);
37*9a0e4156SSadaf Ebrahimi 				break;
38*9a0e4156SSadaf Ebrahimi 			case ARM64_OP_FP:
39*9a0e4156SSadaf Ebrahimi #if defined(_KERNEL_MODE)
40*9a0e4156SSadaf Ebrahimi 				// Issue #681: Windows kernel does not support formatting float point
41*9a0e4156SSadaf Ebrahimi 				printf("\t\toperands[%u].type: FP = <float_point_unsupported>\n", i);
42*9a0e4156SSadaf Ebrahimi #else
43*9a0e4156SSadaf Ebrahimi 				printf("\t\toperands[%u].type: FP = %f\n", i, op->fp);
44*9a0e4156SSadaf Ebrahimi #endif
45*9a0e4156SSadaf Ebrahimi 				break;
46*9a0e4156SSadaf Ebrahimi 			case ARM64_OP_MEM:
47*9a0e4156SSadaf Ebrahimi 				printf("\t\toperands[%u].type: MEM\n", i);
48*9a0e4156SSadaf Ebrahimi 				if (op->mem.base != ARM64_REG_INVALID)
49*9a0e4156SSadaf Ebrahimi 					printf("\t\t\toperands[%u].mem.base: REG = %s\n", i, cs_reg_name(handle, op->mem.base));
50*9a0e4156SSadaf Ebrahimi 				if (op->mem.index != ARM64_REG_INVALID)
51*9a0e4156SSadaf Ebrahimi 					printf("\t\t\toperands[%u].mem.index: REG = %s\n", i, cs_reg_name(handle, op->mem.index));
52*9a0e4156SSadaf Ebrahimi 				if (op->mem.disp != 0)
53*9a0e4156SSadaf Ebrahimi 					printf("\t\t\toperands[%u].mem.disp: 0x%x\n", i, op->mem.disp);
54*9a0e4156SSadaf Ebrahimi 
55*9a0e4156SSadaf Ebrahimi 				break;
56*9a0e4156SSadaf Ebrahimi 			case ARM64_OP_CIMM:
57*9a0e4156SSadaf Ebrahimi 				printf("\t\toperands[%u].type: C-IMM = %u\n", i, (int)op->imm);
58*9a0e4156SSadaf Ebrahimi 				break;
59*9a0e4156SSadaf Ebrahimi 			case ARM64_OP_REG_MRS:
60*9a0e4156SSadaf Ebrahimi 				printf("\t\toperands[%u].type: REG_MRS = 0x%x\n", i, op->reg);
61*9a0e4156SSadaf Ebrahimi 				break;
62*9a0e4156SSadaf Ebrahimi 			case ARM64_OP_REG_MSR:
63*9a0e4156SSadaf Ebrahimi 				printf("\t\toperands[%u].type: REG_MSR = 0x%x\n", i, op->reg);
64*9a0e4156SSadaf Ebrahimi 				break;
65*9a0e4156SSadaf Ebrahimi 			case ARM64_OP_PSTATE:
66*9a0e4156SSadaf Ebrahimi 				printf("\t\toperands[%u].type: PSTATE = 0x%x\n", i, op->pstate);
67*9a0e4156SSadaf Ebrahimi 				break;
68*9a0e4156SSadaf Ebrahimi 			case ARM64_OP_SYS:
69*9a0e4156SSadaf Ebrahimi 				printf("\t\toperands[%u].type: SYS = 0x%x\n", i, op->sys);
70*9a0e4156SSadaf Ebrahimi 				break;
71*9a0e4156SSadaf Ebrahimi 			case ARM64_OP_PREFETCH:
72*9a0e4156SSadaf Ebrahimi 				printf("\t\toperands[%u].type: PREFETCH = 0x%x\n", i, op->prefetch);
73*9a0e4156SSadaf Ebrahimi 				break;
74*9a0e4156SSadaf Ebrahimi 			case ARM64_OP_BARRIER:
75*9a0e4156SSadaf Ebrahimi 				printf("\t\toperands[%u].type: BARRIER = 0x%x\n", i, op->barrier);
76*9a0e4156SSadaf Ebrahimi 				break;
77*9a0e4156SSadaf Ebrahimi 		}
78*9a0e4156SSadaf Ebrahimi 
79*9a0e4156SSadaf Ebrahimi 		access = op->access;
80*9a0e4156SSadaf Ebrahimi 		switch(access) {
81*9a0e4156SSadaf Ebrahimi 			default:
82*9a0e4156SSadaf Ebrahimi 				break;
83*9a0e4156SSadaf Ebrahimi 			case CS_AC_READ:
84*9a0e4156SSadaf Ebrahimi 				printf("\t\toperands[%u].access: READ\n", i);
85*9a0e4156SSadaf Ebrahimi 				break;
86*9a0e4156SSadaf Ebrahimi 			case CS_AC_WRITE:
87*9a0e4156SSadaf Ebrahimi 				printf("\t\toperands[%u].access: WRITE\n", i);
88*9a0e4156SSadaf Ebrahimi 				break;
89*9a0e4156SSadaf Ebrahimi 			case CS_AC_READ | CS_AC_WRITE:
90*9a0e4156SSadaf Ebrahimi 				printf("\t\toperands[%u].access: READ | WRITE\n", i);
91*9a0e4156SSadaf Ebrahimi 				break;
92*9a0e4156SSadaf Ebrahimi 		}
93*9a0e4156SSadaf Ebrahimi 
94*9a0e4156SSadaf Ebrahimi 		if (op->shift.type != ARM64_SFT_INVALID &&
95*9a0e4156SSadaf Ebrahimi 			op->shift.value)
96*9a0e4156SSadaf Ebrahimi 			printf("\t\t\tShift: type = %u, value = %u\n",
97*9a0e4156SSadaf Ebrahimi 				   op->shift.type, op->shift.value);
98*9a0e4156SSadaf Ebrahimi 
99*9a0e4156SSadaf Ebrahimi 		if (op->ext != ARM64_EXT_INVALID)
100*9a0e4156SSadaf Ebrahimi 			printf("\t\t\tExt: %u\n", op->ext);
101*9a0e4156SSadaf Ebrahimi 
102*9a0e4156SSadaf Ebrahimi 		if (op->vas != ARM64_VAS_INVALID)
103*9a0e4156SSadaf Ebrahimi 			printf("\t\t\tVector Arrangement Specifier: 0x%x\n", op->vas);
104*9a0e4156SSadaf Ebrahimi 
105*9a0e4156SSadaf Ebrahimi 		if (op->vess != ARM64_VESS_INVALID)
106*9a0e4156SSadaf Ebrahimi 			printf("\t\t\tVector Element Size Specifier: %u\n", op->vess);
107*9a0e4156SSadaf Ebrahimi 
108*9a0e4156SSadaf Ebrahimi 		if (op->vector_index != -1)
109*9a0e4156SSadaf Ebrahimi 			printf("\t\t\tVector Index: %u\n", op->vector_index);
110*9a0e4156SSadaf Ebrahimi 	}
111*9a0e4156SSadaf Ebrahimi 
112*9a0e4156SSadaf Ebrahimi 	if (arm64->update_flags)
113*9a0e4156SSadaf Ebrahimi 		printf("\tUpdate-flags: True\n");
114*9a0e4156SSadaf Ebrahimi 
115*9a0e4156SSadaf Ebrahimi 	if (arm64->writeback)
116*9a0e4156SSadaf Ebrahimi 		printf("\tWrite-back: True\n");
117*9a0e4156SSadaf Ebrahimi 
118*9a0e4156SSadaf Ebrahimi 	if (arm64->cc)
119*9a0e4156SSadaf Ebrahimi 		printf("\tCode-condition: %u\n", arm64->cc);
120*9a0e4156SSadaf Ebrahimi 
121*9a0e4156SSadaf Ebrahimi 	// Print out all registers accessed by this instruction (either implicit or explicit)
122*9a0e4156SSadaf Ebrahimi 	if (!cs_regs_access(handle, ins,
123*9a0e4156SSadaf Ebrahimi 						regs_read, &regs_read_count,
124*9a0e4156SSadaf Ebrahimi 						regs_write, &regs_write_count)) {
125*9a0e4156SSadaf Ebrahimi 		if (regs_read_count) {
126*9a0e4156SSadaf Ebrahimi 			printf("\tRegisters read:");
127*9a0e4156SSadaf Ebrahimi 			for(i = 0; i < regs_read_count; i++) {
128*9a0e4156SSadaf Ebrahimi 				printf(" %s", cs_reg_name(handle, regs_read[i]));
129*9a0e4156SSadaf Ebrahimi 			}
130*9a0e4156SSadaf Ebrahimi 			printf("\n");
131*9a0e4156SSadaf Ebrahimi 		}
132*9a0e4156SSadaf Ebrahimi 
133*9a0e4156SSadaf Ebrahimi 		if (regs_write_count) {
134*9a0e4156SSadaf Ebrahimi 			printf("\tRegisters modified:");
135*9a0e4156SSadaf Ebrahimi 			for(i = 0; i < regs_write_count; i++) {
136*9a0e4156SSadaf Ebrahimi 				printf(" %s", cs_reg_name(handle, regs_write[i]));
137*9a0e4156SSadaf Ebrahimi 			}
138*9a0e4156SSadaf Ebrahimi 			printf("\n");
139*9a0e4156SSadaf Ebrahimi 		}
140*9a0e4156SSadaf Ebrahimi 	}
141*9a0e4156SSadaf Ebrahimi }
142