1*9a0e4156SSadaf Ebrahimi(* Capstone Disassembly Engine 2*9a0e4156SSadaf Ebrahimi * By Nguyen Anh Quynh <[email protected]>, 2013-2014 *) 3*9a0e4156SSadaf Ebrahimi 4*9a0e4156SSadaf Ebrahimiopen Mips_const 5*9a0e4156SSadaf Ebrahimi 6*9a0e4156SSadaf Ebrahimi(* architecture specific info of instruction *) 7*9a0e4156SSadaf Ebrahimitype mips_op_mem = { 8*9a0e4156SSadaf Ebrahimi base: int; 9*9a0e4156SSadaf Ebrahimi disp: int 10*9a0e4156SSadaf Ebrahimi} 11*9a0e4156SSadaf Ebrahimi 12*9a0e4156SSadaf Ebrahimitype mips_op_value = 13*9a0e4156SSadaf Ebrahimi | MIPS_OP_INVALID of int 14*9a0e4156SSadaf Ebrahimi | MIPS_OP_REG of int 15*9a0e4156SSadaf Ebrahimi | MIPS_OP_IMM of int 16*9a0e4156SSadaf Ebrahimi | MIPS_OP_MEM of mips_op_mem 17*9a0e4156SSadaf Ebrahimi 18*9a0e4156SSadaf Ebrahimitype mips_op = { 19*9a0e4156SSadaf Ebrahimi value: mips_op_value; 20*9a0e4156SSadaf Ebrahimi} 21*9a0e4156SSadaf Ebrahimi 22*9a0e4156SSadaf Ebrahimitype cs_mips = { 23*9a0e4156SSadaf Ebrahimi operands: mips_op array; 24*9a0e4156SSadaf Ebrahimi} 25