1*9a0e4156SSadaf Ebrahimi/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 2*9a0e4156SSadaf Ebrahimi|* *| 3*9a0e4156SSadaf Ebrahimi|*Assembly Writer Source Fragment *| 4*9a0e4156SSadaf Ebrahimi|* *| 5*9a0e4156SSadaf Ebrahimi|* Automatically generated file, do not edit! *| 6*9a0e4156SSadaf Ebrahimi|* *| 7*9a0e4156SSadaf Ebrahimi\*===----------------------------------------------------------------------===*/ 8*9a0e4156SSadaf Ebrahimi 9*9a0e4156SSadaf Ebrahimi/* Capstone Disassembly Engine, http://www.capstone-engine.org */ 10*9a0e4156SSadaf Ebrahimi/* By Nguyen Anh Quynh <[email protected]>, 2013-2015 */ 11*9a0e4156SSadaf Ebrahimi 12*9a0e4156SSadaf Ebrahimi/// printInstruction - This method is automatically generated by tablegen 13*9a0e4156SSadaf Ebrahimi/// from the instruction set description. 14*9a0e4156SSadaf Ebrahimistatic void printInstruction(MCInst *MI, SStream *O, MCRegisterInfo *MRI) 15*9a0e4156SSadaf Ebrahimi{ 16*9a0e4156SSadaf Ebrahimi static const uint32_t OpInfo[] = { 17*9a0e4156SSadaf Ebrahimi 0U, // PHI 18*9a0e4156SSadaf Ebrahimi 0U, // INLINEASM 19*9a0e4156SSadaf Ebrahimi 0U, // CFI_INSTRUCTION 20*9a0e4156SSadaf Ebrahimi 0U, // EH_LABEL 21*9a0e4156SSadaf Ebrahimi 0U, // GC_LABEL 22*9a0e4156SSadaf Ebrahimi 0U, // KILL 23*9a0e4156SSadaf Ebrahimi 0U, // EXTRACT_SUBREG 24*9a0e4156SSadaf Ebrahimi 0U, // INSERT_SUBREG 25*9a0e4156SSadaf Ebrahimi 0U, // IMPLICIT_DEF 26*9a0e4156SSadaf Ebrahimi 0U, // SUBREG_TO_REG 27*9a0e4156SSadaf Ebrahimi 0U, // COPY_TO_REGCLASS 28*9a0e4156SSadaf Ebrahimi 2694U, // DBG_VALUE 29*9a0e4156SSadaf Ebrahimi 0U, // REG_SEQUENCE 30*9a0e4156SSadaf Ebrahimi 0U, // COPY 31*9a0e4156SSadaf Ebrahimi 2687U, // BUNDLE 32*9a0e4156SSadaf Ebrahimi 2704U, // LIFETIME_START 33*9a0e4156SSadaf Ebrahimi 2674U, // LIFETIME_END 34*9a0e4156SSadaf Ebrahimi 0U, // STACKMAP 35*9a0e4156SSadaf Ebrahimi 0U, // PATCHPOINT 36*9a0e4156SSadaf Ebrahimi 0U, // LOAD_STACK_GUARD 37*9a0e4156SSadaf Ebrahimi 0U, // STATEPOINT 38*9a0e4156SSadaf Ebrahimi 0U, // FRAME_ALLOC 39*9a0e4156SSadaf Ebrahimi 6182U, // ABSv16i8 40*9a0e4156SSadaf Ebrahimi 553920550U, // ABSv1i64 41*9a0e4156SSadaf Ebrahimi 1074272294U, // ABSv2i32 42*9a0e4156SSadaf Ebrahimi 1611405350U, // ABSv2i64 43*9a0e4156SSadaf Ebrahimi 2148538406U, // ABSv4i16 44*9a0e4156SSadaf Ebrahimi 2685671462U, // ABSv4i32 45*9a0e4156SSadaf Ebrahimi 3222804518U, // ABSv8i16 46*9a0e4156SSadaf Ebrahimi 3759937574U, // ABSv8i8 47*9a0e4156SSadaf Ebrahimi 17049662U, // ADCSWr 48*9a0e4156SSadaf Ebrahimi 17049662U, // ADCSXr 49*9a0e4156SSadaf Ebrahimi 17048298U, // ADCWr 50*9a0e4156SSadaf Ebrahimi 17048298U, // ADCXr 51*9a0e4156SSadaf Ebrahimi 537400863U, // ADDHNv2i64_v2i32 52*9a0e4156SSadaf Ebrahimi 571748634U, // ADDHNv2i64_v4i32 53*9a0e4156SSadaf Ebrahimi 1074796063U, // ADDHNv4i32_v4i16 54*9a0e4156SSadaf Ebrahimi 1108881690U, // ADDHNv4i32_v8i16 55*9a0e4156SSadaf Ebrahimi 1644179738U, // ADDHNv8i16_v16i8 56*9a0e4156SSadaf Ebrahimi 1612453407U, // ADDHNv8i16_v8i8 57*9a0e4156SSadaf Ebrahimi 2147489464U, // ADDPv16i8 58*9a0e4156SSadaf Ebrahimi 2684884664U, // ADDPv2i32 59*9a0e4156SSadaf Ebrahimi 537663160U, // ADDPv2i64 60*9a0e4156SSadaf Ebrahimi 1610884792U, // ADDPv2i64p 61*9a0e4156SSadaf Ebrahimi 3222279864U, // ADDPv4i16 62*9a0e4156SSadaf Ebrahimi 1075058360U, // ADDPv4i32 63*9a0e4156SSadaf Ebrahimi 1612191416U, // ADDPv8i16 64*9a0e4156SSadaf Ebrahimi 3759937208U, // ADDPv8i8 65*9a0e4156SSadaf Ebrahimi 17049674U, // ADDSWri 66*9a0e4156SSadaf Ebrahimi 0U, // ADDSWrr 67*9a0e4156SSadaf Ebrahimi 17049674U, // ADDSWrs 68*9a0e4156SSadaf Ebrahimi 17049674U, // ADDSWrx 69*9a0e4156SSadaf Ebrahimi 17049674U, // ADDSXri 70*9a0e4156SSadaf Ebrahimi 0U, // ADDSXrr 71*9a0e4156SSadaf Ebrahimi 17049674U, // ADDSXrs 72*9a0e4156SSadaf Ebrahimi 17049674U, // ADDSXrx 73*9a0e4156SSadaf Ebrahimi 17049674U, // ADDSXrx64 74*9a0e4156SSadaf Ebrahimi 272671U, // ADDVv16i8v 75*9a0e4156SSadaf Ebrahimi 2147756319U, // ADDVv4i16v 76*9a0e4156SSadaf Ebrahimi 2684627231U, // ADDVv4i32v 77*9a0e4156SSadaf Ebrahimi 3221498143U, // ADDVv8i16v 78*9a0e4156SSadaf Ebrahimi 3758369055U, // ADDVv8i8v 79*9a0e4156SSadaf Ebrahimi 17048359U, // ADDWri 80*9a0e4156SSadaf Ebrahimi 0U, // ADDWrr 81*9a0e4156SSadaf Ebrahimi 17048359U, // ADDWrs 82*9a0e4156SSadaf Ebrahimi 17048359U, // ADDWrx 83*9a0e4156SSadaf Ebrahimi 17048359U, // ADDXri 84*9a0e4156SSadaf Ebrahimi 0U, // ADDXrr 85*9a0e4156SSadaf Ebrahimi 17048359U, // ADDXrs 86*9a0e4156SSadaf Ebrahimi 17048359U, // ADDXrx 87*9a0e4156SSadaf Ebrahimi 17048359U, // ADDXrx64 88*9a0e4156SSadaf Ebrahimi 2147488551U, // ADDv16i8 89*9a0e4156SSadaf Ebrahimi 17048359U, // ADDv1i64 90*9a0e4156SSadaf Ebrahimi 2684883751U, // ADDv2i32 91*9a0e4156SSadaf Ebrahimi 537662247U, // ADDv2i64 92*9a0e4156SSadaf Ebrahimi 3222278951U, // ADDv4i16 93*9a0e4156SSadaf Ebrahimi 1075057447U, // ADDv4i32 94*9a0e4156SSadaf Ebrahimi 1612190503U, // ADDv8i16 95*9a0e4156SSadaf Ebrahimi 3759936295U, // ADDv8i8 96*9a0e4156SSadaf Ebrahimi 0U, // ADJCALLSTACKDOWN 97*9a0e4156SSadaf Ebrahimi 0U, // ADJCALLSTACKUP 98*9a0e4156SSadaf Ebrahimi 553920403U, // ADR 99*9a0e4156SSadaf Ebrahimi 50603811U, // ADRP 100*9a0e4156SSadaf Ebrahimi 33567598U, // AESDrr 101*9a0e4156SSadaf Ebrahimi 33567656U, // AESErr 102*9a0e4156SSadaf Ebrahimi 4852U, // AESIMCrr 103*9a0e4156SSadaf Ebrahimi 4860U, // AESMCrr 104*9a0e4156SSadaf Ebrahimi 17049680U, // ANDSWri 105*9a0e4156SSadaf Ebrahimi 0U, // ANDSWrr 106*9a0e4156SSadaf Ebrahimi 17049680U, // ANDSWrs 107*9a0e4156SSadaf Ebrahimi 17049680U, // ANDSXri 108*9a0e4156SSadaf Ebrahimi 0U, // ANDSXrr 109*9a0e4156SSadaf Ebrahimi 17049680U, // ANDSXrs 110*9a0e4156SSadaf Ebrahimi 17048425U, // ANDWri 111*9a0e4156SSadaf Ebrahimi 0U, // ANDWrr 112*9a0e4156SSadaf Ebrahimi 17048425U, // ANDWrs 113*9a0e4156SSadaf Ebrahimi 17048425U, // ANDXri 114*9a0e4156SSadaf Ebrahimi 0U, // ANDXrr 115*9a0e4156SSadaf Ebrahimi 17048425U, // ANDXrs 116*9a0e4156SSadaf Ebrahimi 2147488617U, // ANDv16i8 117*9a0e4156SSadaf Ebrahimi 3759936361U, // ANDv8i8 118*9a0e4156SSadaf Ebrahimi 17049553U, // ASRVWr 119*9a0e4156SSadaf Ebrahimi 17049553U, // ASRVXr 120*9a0e4156SSadaf Ebrahimi 16935U, // B 121*9a0e4156SSadaf Ebrahimi 67380710U, // BFMWri 122*9a0e4156SSadaf Ebrahimi 67380710U, // BFMXri 123*9a0e4156SSadaf Ebrahimi 0U, // BICSWrr 124*9a0e4156SSadaf Ebrahimi 17049668U, // BICSWrs 125*9a0e4156SSadaf Ebrahimi 0U, // BICSXrr 126*9a0e4156SSadaf Ebrahimi 17049668U, // BICSXrs 127*9a0e4156SSadaf Ebrahimi 0U, // BICWrr 128*9a0e4156SSadaf Ebrahimi 17048303U, // BICWrs 129*9a0e4156SSadaf Ebrahimi 0U, // BICXrr 130*9a0e4156SSadaf Ebrahimi 17048303U, // BICXrs 131*9a0e4156SSadaf Ebrahimi 2147488495U, // BICv16i8 132*9a0e4156SSadaf Ebrahimi 84423407U, // BICv2i32 133*9a0e4156SSadaf Ebrahimi 84947695U, // BICv4i16 134*9a0e4156SSadaf Ebrahimi 85209839U, // BICv4i32 135*9a0e4156SSadaf Ebrahimi 85471983U, // BICv8i16 136*9a0e4156SSadaf Ebrahimi 3759936239U, // BICv8i8 137*9a0e4156SSadaf Ebrahimi 2147488704U, // BIFv16i8 138*9a0e4156SSadaf Ebrahimi 3759936448U, // BIFv8i8 139*9a0e4156SSadaf Ebrahimi 2181052603U, // BITv16i8 140*9a0e4156SSadaf Ebrahimi 3793500347U, // BITv8i8 141*9a0e4156SSadaf Ebrahimi 17641U, // BL 142*9a0e4156SSadaf Ebrahimi 2107319U, // BLR 143*9a0e4156SSadaf Ebrahimi 2107279U, // BR 144*9a0e4156SSadaf Ebrahimi 21688U, // BRK 145*9a0e4156SSadaf Ebrahimi 2181051810U, // BSLv16i8 146*9a0e4156SSadaf Ebrahimi 3793499554U, // BSLv8i8 147*9a0e4156SSadaf Ebrahimi 27247U, // Bcc 148*9a0e4156SSadaf Ebrahimi 100936257U, // CBNZW 149*9a0e4156SSadaf Ebrahimi 100936257U, // CBNZX 150*9a0e4156SSadaf Ebrahimi 100936242U, // CBZW 151*9a0e4156SSadaf Ebrahimi 100936242U, // CBZX 152*9a0e4156SSadaf Ebrahimi 17049144U, // CCMNWi 153*9a0e4156SSadaf Ebrahimi 17049144U, // CCMNWr 154*9a0e4156SSadaf Ebrahimi 17049144U, // CCMNXi 155*9a0e4156SSadaf Ebrahimi 17049144U, // CCMNXr 156*9a0e4156SSadaf Ebrahimi 17049316U, // CCMPWi 157*9a0e4156SSadaf Ebrahimi 17049316U, // CCMPWr 158*9a0e4156SSadaf Ebrahimi 17049316U, // CCMPXi 159*9a0e4156SSadaf Ebrahimi 17049316U, // CCMPXr 160*9a0e4156SSadaf Ebrahimi 2107924U, // CLREX 161*9a0e4156SSadaf Ebrahimi 553920604U, // CLSWr 162*9a0e4156SSadaf Ebrahimi 553920604U, // CLSXr 163*9a0e4156SSadaf Ebrahimi 6236U, // CLSv16i8 164*9a0e4156SSadaf Ebrahimi 1074272348U, // CLSv2i32 165*9a0e4156SSadaf Ebrahimi 2148538460U, // CLSv4i16 166*9a0e4156SSadaf Ebrahimi 2685671516U, // CLSv4i32 167*9a0e4156SSadaf Ebrahimi 3222804572U, // CLSv8i16 168*9a0e4156SSadaf Ebrahimi 3759937628U, // CLSv8i8 169*9a0e4156SSadaf Ebrahimi 553921084U, // CLZWr 170*9a0e4156SSadaf Ebrahimi 553921084U, // CLZXr 171*9a0e4156SSadaf Ebrahimi 6716U, // CLZv16i8 172*9a0e4156SSadaf Ebrahimi 1074272828U, // CLZv2i32 173*9a0e4156SSadaf Ebrahimi 2148538940U, // CLZv4i16 174*9a0e4156SSadaf Ebrahimi 2685671996U, // CLZv4i32 175*9a0e4156SSadaf Ebrahimi 3222805052U, // CLZv8i16 176*9a0e4156SSadaf Ebrahimi 3759938108U, // CLZv8i8 177*9a0e4156SSadaf Ebrahimi 2147489643U, // CMEQv16i8 178*9a0e4156SSadaf Ebrahimi 5995U, // CMEQv16i8rz 179*9a0e4156SSadaf Ebrahimi 17049451U, // CMEQv1i64 180*9a0e4156SSadaf Ebrahimi 553920363U, // CMEQv1i64rz 181*9a0e4156SSadaf Ebrahimi 2684884843U, // CMEQv2i32 182*9a0e4156SSadaf Ebrahimi 1074272107U, // CMEQv2i32rz 183*9a0e4156SSadaf Ebrahimi 537663339U, // CMEQv2i64 184*9a0e4156SSadaf Ebrahimi 1611405163U, // CMEQv2i64rz 185*9a0e4156SSadaf Ebrahimi 3222280043U, // CMEQv4i16 186*9a0e4156SSadaf Ebrahimi 2148538219U, // CMEQv4i16rz 187*9a0e4156SSadaf Ebrahimi 1075058539U, // CMEQv4i32 188*9a0e4156SSadaf Ebrahimi 2685671275U, // CMEQv4i32rz 189*9a0e4156SSadaf Ebrahimi 1612191595U, // CMEQv8i16 190*9a0e4156SSadaf Ebrahimi 3222804331U, // CMEQv8i16rz 191*9a0e4156SSadaf Ebrahimi 3759937387U, // CMEQv8i8 192*9a0e4156SSadaf Ebrahimi 3759937387U, // CMEQv8i8rz 193*9a0e4156SSadaf Ebrahimi 2147488636U, // CMGEv16i8 194*9a0e4156SSadaf Ebrahimi 4988U, // CMGEv16i8rz 195*9a0e4156SSadaf Ebrahimi 17048444U, // CMGEv1i64 196*9a0e4156SSadaf Ebrahimi 553919356U, // CMGEv1i64rz 197*9a0e4156SSadaf Ebrahimi 2684883836U, // CMGEv2i32 198*9a0e4156SSadaf Ebrahimi 1074271100U, // CMGEv2i32rz 199*9a0e4156SSadaf Ebrahimi 537662332U, // CMGEv2i64 200*9a0e4156SSadaf Ebrahimi 1611404156U, // CMGEv2i64rz 201*9a0e4156SSadaf Ebrahimi 3222279036U, // CMGEv4i16 202*9a0e4156SSadaf Ebrahimi 2148537212U, // CMGEv4i16rz 203*9a0e4156SSadaf Ebrahimi 1075057532U, // CMGEv4i32 204*9a0e4156SSadaf Ebrahimi 2685670268U, // CMGEv4i32rz 205*9a0e4156SSadaf Ebrahimi 1612190588U, // CMGEv8i16 206*9a0e4156SSadaf Ebrahimi 3222803324U, // CMGEv8i16rz 207*9a0e4156SSadaf Ebrahimi 3759936380U, // CMGEv8i8 208*9a0e4156SSadaf Ebrahimi 3759936380U, // CMGEv8i8rz 209*9a0e4156SSadaf Ebrahimi 2147489972U, // CMGTv16i8 210*9a0e4156SSadaf Ebrahimi 6324U, // CMGTv16i8rz 211*9a0e4156SSadaf Ebrahimi 17049780U, // CMGTv1i64 212*9a0e4156SSadaf Ebrahimi 553920692U, // CMGTv1i64rz 213*9a0e4156SSadaf Ebrahimi 2684885172U, // CMGTv2i32 214*9a0e4156SSadaf Ebrahimi 1074272436U, // CMGTv2i32rz 215*9a0e4156SSadaf Ebrahimi 537663668U, // CMGTv2i64 216*9a0e4156SSadaf Ebrahimi 1611405492U, // CMGTv2i64rz 217*9a0e4156SSadaf Ebrahimi 3222280372U, // CMGTv4i16 218*9a0e4156SSadaf Ebrahimi 2148538548U, // CMGTv4i16rz 219*9a0e4156SSadaf Ebrahimi 1075058868U, // CMGTv4i32 220*9a0e4156SSadaf Ebrahimi 2685671604U, // CMGTv4i32rz 221*9a0e4156SSadaf Ebrahimi 1612191924U, // CMGTv8i16 222*9a0e4156SSadaf Ebrahimi 3222804660U, // CMGTv8i16rz 223*9a0e4156SSadaf Ebrahimi 3759937716U, // CMGTv8i8 224*9a0e4156SSadaf Ebrahimi 3759937716U, // CMGTv8i8rz 225*9a0e4156SSadaf Ebrahimi 2147488916U, // CMHIv16i8 226*9a0e4156SSadaf Ebrahimi 17048724U, // CMHIv1i64 227*9a0e4156SSadaf Ebrahimi 2684884116U, // CMHIv2i32 228*9a0e4156SSadaf Ebrahimi 537662612U, // CMHIv2i64 229*9a0e4156SSadaf Ebrahimi 3222279316U, // CMHIv4i16 230*9a0e4156SSadaf Ebrahimi 1075057812U, // CMHIv4i32 231*9a0e4156SSadaf Ebrahimi 1612190868U, // CMHIv8i16 232*9a0e4156SSadaf Ebrahimi 3759936660U, // CMHIv8i8 233*9a0e4156SSadaf Ebrahimi 2147489878U, // CMHSv16i8 234*9a0e4156SSadaf Ebrahimi 17049686U, // CMHSv1i64 235*9a0e4156SSadaf Ebrahimi 2684885078U, // CMHSv2i32 236*9a0e4156SSadaf Ebrahimi 537663574U, // CMHSv2i64 237*9a0e4156SSadaf Ebrahimi 3222280278U, // CMHSv4i16 238*9a0e4156SSadaf Ebrahimi 1075058774U, // CMHSv4i32 239*9a0e4156SSadaf Ebrahimi 1612191830U, // CMHSv8i16 240*9a0e4156SSadaf Ebrahimi 3759937622U, // CMHSv8i8 241*9a0e4156SSadaf Ebrahimi 4995U, // CMLEv16i8rz 242*9a0e4156SSadaf Ebrahimi 553919363U, // CMLEv1i64rz 243*9a0e4156SSadaf Ebrahimi 1074271107U, // CMLEv2i32rz 244*9a0e4156SSadaf Ebrahimi 1611404163U, // CMLEv2i64rz 245*9a0e4156SSadaf Ebrahimi 2148537219U, // CMLEv4i16rz 246*9a0e4156SSadaf Ebrahimi 2685670275U, // CMLEv4i32rz 247*9a0e4156SSadaf Ebrahimi 3222803331U, // CMLEv8i16rz 248*9a0e4156SSadaf Ebrahimi 3759936387U, // CMLEv8i8rz 249*9a0e4156SSadaf Ebrahimi 6342U, // CMLTv16i8rz 250*9a0e4156SSadaf Ebrahimi 553920710U, // CMLTv1i64rz 251*9a0e4156SSadaf Ebrahimi 1074272454U, // CMLTv2i32rz 252*9a0e4156SSadaf Ebrahimi 1611405510U, // CMLTv2i64rz 253*9a0e4156SSadaf Ebrahimi 2148538566U, // CMLTv4i16rz 254*9a0e4156SSadaf Ebrahimi 2685671622U, // CMLTv4i32rz 255*9a0e4156SSadaf Ebrahimi 3222804678U, // CMLTv8i16rz 256*9a0e4156SSadaf Ebrahimi 3759937734U, // CMLTv8i8rz 257*9a0e4156SSadaf Ebrahimi 2147490013U, // CMTSTv16i8 258*9a0e4156SSadaf Ebrahimi 17049821U, // CMTSTv1i64 259*9a0e4156SSadaf Ebrahimi 2684885213U, // CMTSTv2i32 260*9a0e4156SSadaf Ebrahimi 537663709U, // CMTSTv2i64 261*9a0e4156SSadaf Ebrahimi 3222280413U, // CMTSTv4i16 262*9a0e4156SSadaf Ebrahimi 1075058909U, // CMTSTv4i32 263*9a0e4156SSadaf Ebrahimi 1612191965U, // CMTSTv8i16 264*9a0e4156SSadaf Ebrahimi 3759937757U, // CMTSTv8i8 265*9a0e4156SSadaf Ebrahimi 6348U, // CNTv16i8 266*9a0e4156SSadaf Ebrahimi 3759937740U, // CNTv8i8 267*9a0e4156SSadaf Ebrahimi 272763U, // CPYi16 268*9a0e4156SSadaf Ebrahimi 537143675U, // CPYi32 269*9a0e4156SSadaf Ebrahimi 1074014587U, // CPYi64 270*9a0e4156SSadaf Ebrahimi 1610885499U, // CPYi8 271*9a0e4156SSadaf Ebrahimi 17048098U, // CRC32Brr 272*9a0e4156SSadaf Ebrahimi 17048106U, // CRC32CBrr 273*9a0e4156SSadaf Ebrahimi 17048575U, // CRC32CHrr 274*9a0e4156SSadaf Ebrahimi 17050039U, // CRC32CWrr 275*9a0e4156SSadaf Ebrahimi 17050123U, // CRC32CXrr 276*9a0e4156SSadaf Ebrahimi 17048558U, // CRC32Hrr 277*9a0e4156SSadaf Ebrahimi 17050017U, // CRC32Wrr 278*9a0e4156SSadaf Ebrahimi 17050092U, // CRC32Xrr 279*9a0e4156SSadaf Ebrahimi 17048888U, // CSELWr 280*9a0e4156SSadaf Ebrahimi 17048888U, // CSELXr 281*9a0e4156SSadaf Ebrahimi 17048323U, // CSINCWr 282*9a0e4156SSadaf Ebrahimi 17048323U, // CSINCXr 283*9a0e4156SSadaf Ebrahimi 17049971U, // CSINVWr 284*9a0e4156SSadaf Ebrahimi 17049971U, // CSINVXr 285*9a0e4156SSadaf Ebrahimi 17048544U, // CSNEGWr 286*9a0e4156SSadaf Ebrahimi 17048544U, // CSNEGXr 287*9a0e4156SSadaf Ebrahimi 20524U, // DCPS1 288*9a0e4156SSadaf Ebrahimi 20889U, // DCPS2 289*9a0e4156SSadaf Ebrahimi 20938U, // DCPS3 290*9a0e4156SSadaf Ebrahimi 29235U, // DMB 291*9a0e4156SSadaf Ebrahimi 2719U, // DRPS 292*9a0e4156SSadaf Ebrahimi 29324U, // DSB 293*9a0e4156SSadaf Ebrahimi 553654070U, // DUPv16i8gpr 294*9a0e4156SSadaf Ebrahimi 1610618678U, // DUPv16i8lane 295*9a0e4156SSadaf Ebrahimi 554178358U, // DUPv2i32gpr 296*9a0e4156SSadaf Ebrahimi 537401142U, // DUPv2i32lane 297*9a0e4156SSadaf Ebrahimi 554440502U, // DUPv2i64gpr 298*9a0e4156SSadaf Ebrahimi 1074534198U, // DUPv2i64lane 299*9a0e4156SSadaf Ebrahimi 554702646U, // DUPv4i16gpr 300*9a0e4156SSadaf Ebrahimi 1054518U, // DUPv4i16lane 301*9a0e4156SSadaf Ebrahimi 554964790U, // DUPv4i32gpr 302*9a0e4156SSadaf Ebrahimi 538187574U, // DUPv4i32lane 303*9a0e4156SSadaf Ebrahimi 555226934U, // DUPv8i16gpr 304*9a0e4156SSadaf Ebrahimi 1578806U, // DUPv8i16lane 305*9a0e4156SSadaf Ebrahimi 555489078U, // DUPv8i8gpr 306*9a0e4156SSadaf Ebrahimi 1612453686U, // DUPv8i8lane 307*9a0e4156SSadaf Ebrahimi 0U, // EONWrr 308*9a0e4156SSadaf Ebrahimi 17049150U, // EONWrs 309*9a0e4156SSadaf Ebrahimi 0U, // EONXrr 310*9a0e4156SSadaf Ebrahimi 17049150U, // EONXrs 311*9a0e4156SSadaf Ebrahimi 17049538U, // EORWri 312*9a0e4156SSadaf Ebrahimi 0U, // EORWrr 313*9a0e4156SSadaf Ebrahimi 17049538U, // EORWrs 314*9a0e4156SSadaf Ebrahimi 17049538U, // EORXri 315*9a0e4156SSadaf Ebrahimi 0U, // EORXrr 316*9a0e4156SSadaf Ebrahimi 17049538U, // EORXrs 317*9a0e4156SSadaf Ebrahimi 2147489730U, // EORv16i8 318*9a0e4156SSadaf Ebrahimi 3759937474U, // EORv8i8 319*9a0e4156SSadaf Ebrahimi 2724U, // ERET 320*9a0e4156SSadaf Ebrahimi 17049585U, // EXTRWrri 321*9a0e4156SSadaf Ebrahimi 17049585U, // EXTRXrri 322*9a0e4156SSadaf Ebrahimi 2147490026U, // EXTv16i8 323*9a0e4156SSadaf Ebrahimi 3759937770U, // EXTv8i8 324*9a0e4156SSadaf Ebrahimi 0U, // F128CSEL 325*9a0e4156SSadaf Ebrahimi 17048340U, // FABD32 326*9a0e4156SSadaf Ebrahimi 17048340U, // FABD64 327*9a0e4156SSadaf Ebrahimi 2684883732U, // FABDv2f32 328*9a0e4156SSadaf Ebrahimi 537662228U, // FABDv2f64 329*9a0e4156SSadaf Ebrahimi 1075057428U, // FABDv4f32 330*9a0e4156SSadaf Ebrahimi 553920549U, // FABSDr 331*9a0e4156SSadaf Ebrahimi 553920549U, // FABSSr 332*9a0e4156SSadaf Ebrahimi 1074272293U, // FABSv2f32 333*9a0e4156SSadaf Ebrahimi 1611405349U, // FABSv2f64 334*9a0e4156SSadaf Ebrahimi 2685671461U, // FABSv4f32 335*9a0e4156SSadaf Ebrahimi 17048436U, // FACGE32 336*9a0e4156SSadaf Ebrahimi 17048436U, // FACGE64 337*9a0e4156SSadaf Ebrahimi 2684883828U, // FACGEv2f32 338*9a0e4156SSadaf Ebrahimi 537662324U, // FACGEv2f64 339*9a0e4156SSadaf Ebrahimi 1075057524U, // FACGEv4f32 340*9a0e4156SSadaf Ebrahimi 17049772U, // FACGT32 341*9a0e4156SSadaf Ebrahimi 17049772U, // FACGT64 342*9a0e4156SSadaf Ebrahimi 2684885164U, // FACGTv2f32 343*9a0e4156SSadaf Ebrahimi 537663660U, // FACGTv2f64 344*9a0e4156SSadaf Ebrahimi 1075058860U, // FACGTv4f32 345*9a0e4156SSadaf Ebrahimi 17048358U, // FADDDrr 346*9a0e4156SSadaf Ebrahimi 2684884663U, // FADDPv2f32 347*9a0e4156SSadaf Ebrahimi 537663159U, // FADDPv2f64 348*9a0e4156SSadaf Ebrahimi 1074013879U, // FADDPv2i32p 349*9a0e4156SSadaf Ebrahimi 1610884791U, // FADDPv2i64p 350*9a0e4156SSadaf Ebrahimi 1075058359U, // FADDPv4f32 351*9a0e4156SSadaf Ebrahimi 17048358U, // FADDSrr 352*9a0e4156SSadaf Ebrahimi 2684883750U, // FADDv2f32 353*9a0e4156SSadaf Ebrahimi 537662246U, // FADDv2f64 354*9a0e4156SSadaf Ebrahimi 1075057446U, // FADDv4f32 355*9a0e4156SSadaf Ebrahimi 17049315U, // FCCMPDrr 356*9a0e4156SSadaf Ebrahimi 17048473U, // FCCMPEDrr 357*9a0e4156SSadaf Ebrahimi 17048473U, // FCCMPESrr 358*9a0e4156SSadaf Ebrahimi 17049315U, // FCCMPSrr 359*9a0e4156SSadaf Ebrahimi 17049450U, // FCMEQ32 360*9a0e4156SSadaf Ebrahimi 17049450U, // FCMEQ64 361*9a0e4156SSadaf Ebrahimi 2164533098U, // FCMEQv1i32rz 362*9a0e4156SSadaf Ebrahimi 2164533098U, // FCMEQv1i64rz 363*9a0e4156SSadaf Ebrahimi 2684884842U, // FCMEQv2f32 364*9a0e4156SSadaf Ebrahimi 537663338U, // FCMEQv2f64 365*9a0e4156SSadaf Ebrahimi 2684884842U, // FCMEQv2i32rz 366*9a0e4156SSadaf Ebrahimi 3222017898U, // FCMEQv2i64rz 367*9a0e4156SSadaf Ebrahimi 1075058538U, // FCMEQv4f32 368*9a0e4156SSadaf Ebrahimi 3759413098U, // FCMEQv4i32rz 369*9a0e4156SSadaf Ebrahimi 17048443U, // FCMGE32 370*9a0e4156SSadaf Ebrahimi 17048443U, // FCMGE64 371*9a0e4156SSadaf Ebrahimi 2164532091U, // FCMGEv1i32rz 372*9a0e4156SSadaf Ebrahimi 2164532091U, // FCMGEv1i64rz 373*9a0e4156SSadaf Ebrahimi 2684883835U, // FCMGEv2f32 374*9a0e4156SSadaf Ebrahimi 537662331U, // FCMGEv2f64 375*9a0e4156SSadaf Ebrahimi 2684883835U, // FCMGEv2i32rz 376*9a0e4156SSadaf Ebrahimi 3222016891U, // FCMGEv2i64rz 377*9a0e4156SSadaf Ebrahimi 1075057531U, // FCMGEv4f32 378*9a0e4156SSadaf Ebrahimi 3759412091U, // FCMGEv4i32rz 379*9a0e4156SSadaf Ebrahimi 17049779U, // FCMGT32 380*9a0e4156SSadaf Ebrahimi 17049779U, // FCMGT64 381*9a0e4156SSadaf Ebrahimi 2164533427U, // FCMGTv1i32rz 382*9a0e4156SSadaf Ebrahimi 2164533427U, // FCMGTv1i64rz 383*9a0e4156SSadaf Ebrahimi 2684885171U, // FCMGTv2f32 384*9a0e4156SSadaf Ebrahimi 537663667U, // FCMGTv2f64 385*9a0e4156SSadaf Ebrahimi 2684885171U, // FCMGTv2i32rz 386*9a0e4156SSadaf Ebrahimi 3222018227U, // FCMGTv2i64rz 387*9a0e4156SSadaf Ebrahimi 1075058867U, // FCMGTv4f32 388*9a0e4156SSadaf Ebrahimi 3759413427U, // FCMGTv4i32rz 389*9a0e4156SSadaf Ebrahimi 2164532098U, // FCMLEv1i32rz 390*9a0e4156SSadaf Ebrahimi 2164532098U, // FCMLEv1i64rz 391*9a0e4156SSadaf Ebrahimi 2684883842U, // FCMLEv2i32rz 392*9a0e4156SSadaf Ebrahimi 3222016898U, // FCMLEv2i64rz 393*9a0e4156SSadaf Ebrahimi 3759412098U, // FCMLEv4i32rz 394*9a0e4156SSadaf Ebrahimi 2164533445U, // FCMLTv1i32rz 395*9a0e4156SSadaf Ebrahimi 2164533445U, // FCMLTv1i64rz 396*9a0e4156SSadaf Ebrahimi 2684885189U, // FCMLTv2i32rz 397*9a0e4156SSadaf Ebrahimi 3222018245U, // FCMLTv2i64rz 398*9a0e4156SSadaf Ebrahimi 3759413445U, // FCMLTv4i32rz 399*9a0e4156SSadaf Ebrahimi 2369258U, // FCMPDri 400*9a0e4156SSadaf Ebrahimi 553920234U, // FCMPDrr 401*9a0e4156SSadaf Ebrahimi 2368417U, // FCMPEDri 402*9a0e4156SSadaf Ebrahimi 553919393U, // FCMPEDrr 403*9a0e4156SSadaf Ebrahimi 2368417U, // FCMPESri 404*9a0e4156SSadaf Ebrahimi 553919393U, // FCMPESrr 405*9a0e4156SSadaf Ebrahimi 2369258U, // FCMPSri 406*9a0e4156SSadaf Ebrahimi 553920234U, // FCMPSrr 407*9a0e4156SSadaf Ebrahimi 17048887U, // FCSELDrrr 408*9a0e4156SSadaf Ebrahimi 17048887U, // FCSELSrrr 409*9a0e4156SSadaf Ebrahimi 553920541U, // FCVTASUWDr 410*9a0e4156SSadaf Ebrahimi 553920541U, // FCVTASUWSr 411*9a0e4156SSadaf Ebrahimi 553920541U, // FCVTASUXDr 412*9a0e4156SSadaf Ebrahimi 553920541U, // FCVTASUXSr 413*9a0e4156SSadaf Ebrahimi 553920541U, // FCVTASv1i32 414*9a0e4156SSadaf Ebrahimi 553920541U, // FCVTASv1i64 415*9a0e4156SSadaf Ebrahimi 1074272285U, // FCVTASv2f32 416*9a0e4156SSadaf Ebrahimi 1611405341U, // FCVTASv2f64 417*9a0e4156SSadaf Ebrahimi 2685671453U, // FCVTASv4f32 418*9a0e4156SSadaf Ebrahimi 553920751U, // FCVTAUUWDr 419*9a0e4156SSadaf Ebrahimi 553920751U, // FCVTAUUWSr 420*9a0e4156SSadaf Ebrahimi 553920751U, // FCVTAUUXDr 421*9a0e4156SSadaf Ebrahimi 553920751U, // FCVTAUUXSr 422*9a0e4156SSadaf Ebrahimi 553920751U, // FCVTAUv1i32 423*9a0e4156SSadaf Ebrahimi 553920751U, // FCVTAUv1i64 424*9a0e4156SSadaf Ebrahimi 1074272495U, // FCVTAUv2f32 425*9a0e4156SSadaf Ebrahimi 1611405551U, // FCVTAUv2f64 426*9a0e4156SSadaf Ebrahimi 2685671663U, // FCVTAUv4f32 427*9a0e4156SSadaf Ebrahimi 553920740U, // FCVTDHr 428*9a0e4156SSadaf Ebrahimi 553920740U, // FCVTDSr 429*9a0e4156SSadaf Ebrahimi 553920740U, // FCVTHDr 430*9a0e4156SSadaf Ebrahimi 553920740U, // FCVTHSr 431*9a0e4156SSadaf Ebrahimi 1074533828U, // FCVTLv2i32 432*9a0e4156SSadaf Ebrahimi 2148799940U, // FCVTLv4i16 433*9a0e4156SSadaf Ebrahimi 2685145352U, // FCVTLv4i32 434*9a0e4156SSadaf Ebrahimi 3222540552U, // FCVTLv8i16 435*9a0e4156SSadaf Ebrahimi 553920615U, // FCVTMSUWDr 436*9a0e4156SSadaf Ebrahimi 553920615U, // FCVTMSUWSr 437*9a0e4156SSadaf Ebrahimi 553920615U, // FCVTMSUXDr 438*9a0e4156SSadaf Ebrahimi 553920615U, // FCVTMSUXSr 439*9a0e4156SSadaf Ebrahimi 553920615U, // FCVTMSv1i32 440*9a0e4156SSadaf Ebrahimi 553920615U, // FCVTMSv1i64 441*9a0e4156SSadaf Ebrahimi 1074272359U, // FCVTMSv2f32 442*9a0e4156SSadaf Ebrahimi 1611405415U, // FCVTMSv2f64 443*9a0e4156SSadaf Ebrahimi 2685671527U, // FCVTMSv4f32 444*9a0e4156SSadaf Ebrahimi 553920767U, // FCVTMUUWDr 445*9a0e4156SSadaf Ebrahimi 553920767U, // FCVTMUUWSr 446*9a0e4156SSadaf Ebrahimi 553920767U, // FCVTMUUXDr 447*9a0e4156SSadaf Ebrahimi 553920767U, // FCVTMUUXSr 448*9a0e4156SSadaf Ebrahimi 553920767U, // FCVTMUv1i32 449*9a0e4156SSadaf Ebrahimi 553920767U, // FCVTMUv1i64 450*9a0e4156SSadaf Ebrahimi 1074272511U, // FCVTMUv2f32 451*9a0e4156SSadaf Ebrahimi 1611405567U, // FCVTMUv2f64 452*9a0e4156SSadaf Ebrahimi 2685671679U, // FCVTMUv4f32 453*9a0e4156SSadaf Ebrahimi 553920628U, // FCVTNSUWDr 454*9a0e4156SSadaf Ebrahimi 553920628U, // FCVTNSUWSr 455*9a0e4156SSadaf Ebrahimi 553920628U, // FCVTNSUXDr 456*9a0e4156SSadaf Ebrahimi 553920628U, // FCVTNSUXSr 457*9a0e4156SSadaf Ebrahimi 553920628U, // FCVTNSv1i32 458*9a0e4156SSadaf Ebrahimi 553920628U, // FCVTNSv1i64 459*9a0e4156SSadaf Ebrahimi 1074272372U, // FCVTNSv2f32 460*9a0e4156SSadaf Ebrahimi 1611405428U, // FCVTNSv2f64 461*9a0e4156SSadaf Ebrahimi 2685671540U, // FCVTNSv4f32 462*9a0e4156SSadaf Ebrahimi 553920775U, // FCVTNUUWDr 463*9a0e4156SSadaf Ebrahimi 553920775U, // FCVTNUUWSr 464*9a0e4156SSadaf Ebrahimi 553920775U, // FCVTNUUXDr 465*9a0e4156SSadaf Ebrahimi 553920775U, // FCVTNUUXSr 466*9a0e4156SSadaf Ebrahimi 553920775U, // FCVTNUv1i32 467*9a0e4156SSadaf Ebrahimi 553920775U, // FCVTNUv1i64 468*9a0e4156SSadaf Ebrahimi 1074272519U, // FCVTNUv2f32 469*9a0e4156SSadaf Ebrahimi 1611405575U, // FCVTNUv2f64 470*9a0e4156SSadaf Ebrahimi 2685671687U, // FCVTNUv4f32 471*9a0e4156SSadaf Ebrahimi 1611142770U, // FCVTNv2i32 472*9a0e4156SSadaf Ebrahimi 2685408882U, // FCVTNv4i16 473*9a0e4156SSadaf Ebrahimi 1645490510U, // FCVTNv4i32 474*9a0e4156SSadaf Ebrahimi 2719494478U, // FCVTNv8i16 475*9a0e4156SSadaf Ebrahimi 553920644U, // FCVTPSUWDr 476*9a0e4156SSadaf Ebrahimi 553920644U, // FCVTPSUWSr 477*9a0e4156SSadaf Ebrahimi 553920644U, // FCVTPSUXDr 478*9a0e4156SSadaf Ebrahimi 553920644U, // FCVTPSUXSr 479*9a0e4156SSadaf Ebrahimi 553920644U, // FCVTPSv1i32 480*9a0e4156SSadaf Ebrahimi 553920644U, // FCVTPSv1i64 481*9a0e4156SSadaf Ebrahimi 1074272388U, // FCVTPSv2f32 482*9a0e4156SSadaf Ebrahimi 1611405444U, // FCVTPSv2f64 483*9a0e4156SSadaf Ebrahimi 2685671556U, // FCVTPSv4f32 484*9a0e4156SSadaf Ebrahimi 553920783U, // FCVTPUUWDr 485*9a0e4156SSadaf Ebrahimi 553920783U, // FCVTPUUWSr 486*9a0e4156SSadaf Ebrahimi 553920783U, // FCVTPUUXDr 487*9a0e4156SSadaf Ebrahimi 553920783U, // FCVTPUUXSr 488*9a0e4156SSadaf Ebrahimi 553920783U, // FCVTPUv1i32 489*9a0e4156SSadaf Ebrahimi 553920783U, // FCVTPUv1i64 490*9a0e4156SSadaf Ebrahimi 1074272527U, // FCVTPUv2f32 491*9a0e4156SSadaf Ebrahimi 1611405583U, // FCVTPUv2f64 492*9a0e4156SSadaf Ebrahimi 2685671695U, // FCVTPUv4f32 493*9a0e4156SSadaf Ebrahimi 553920740U, // FCVTSDr 494*9a0e4156SSadaf Ebrahimi 553920740U, // FCVTSHr 495*9a0e4156SSadaf Ebrahimi 553920168U, // FCVTXNv1i64 496*9a0e4156SSadaf Ebrahimi 1611142824U, // FCVTXNv2f32 497*9a0e4156SSadaf Ebrahimi 1645490564U, // FCVTXNv4f32 498*9a0e4156SSadaf Ebrahimi 17049759U, // FCVTZSSWDri 499*9a0e4156SSadaf Ebrahimi 17049759U, // FCVTZSSWSri 500*9a0e4156SSadaf Ebrahimi 17049759U, // FCVTZSSXDri 501*9a0e4156SSadaf Ebrahimi 17049759U, // FCVTZSSXSri 502*9a0e4156SSadaf Ebrahimi 553920671U, // FCVTZSUWDr 503*9a0e4156SSadaf Ebrahimi 553920671U, // FCVTZSUWSr 504*9a0e4156SSadaf Ebrahimi 553920671U, // FCVTZSUXDr 505*9a0e4156SSadaf Ebrahimi 553920671U, // FCVTZSUXSr 506*9a0e4156SSadaf Ebrahimi 17049759U, // FCVTZS_IntSWDri 507*9a0e4156SSadaf Ebrahimi 17049759U, // FCVTZS_IntSWSri 508*9a0e4156SSadaf Ebrahimi 17049759U, // FCVTZS_IntSXDri 509*9a0e4156SSadaf Ebrahimi 17049759U, // FCVTZS_IntSXSri 510*9a0e4156SSadaf Ebrahimi 553920671U, // FCVTZS_IntUWDr 511*9a0e4156SSadaf Ebrahimi 553920671U, // FCVTZS_IntUWSr 512*9a0e4156SSadaf Ebrahimi 553920671U, // FCVTZS_IntUXDr 513*9a0e4156SSadaf Ebrahimi 553920671U, // FCVTZS_IntUXSr 514*9a0e4156SSadaf Ebrahimi 1074272415U, // FCVTZS_Intv2f32 515*9a0e4156SSadaf Ebrahimi 1611405471U, // FCVTZS_Intv2f64 516*9a0e4156SSadaf Ebrahimi 2685671583U, // FCVTZS_Intv4f32 517*9a0e4156SSadaf Ebrahimi 17049759U, // FCVTZSd 518*9a0e4156SSadaf Ebrahimi 17049759U, // FCVTZSs 519*9a0e4156SSadaf Ebrahimi 553920671U, // FCVTZSv1i32 520*9a0e4156SSadaf Ebrahimi 553920671U, // FCVTZSv1i64 521*9a0e4156SSadaf Ebrahimi 1074272415U, // FCVTZSv2f32 522*9a0e4156SSadaf Ebrahimi 1611405471U, // FCVTZSv2f64 523*9a0e4156SSadaf Ebrahimi 2684885151U, // FCVTZSv2i32_shift 524*9a0e4156SSadaf Ebrahimi 537663647U, // FCVTZSv2i64_shift 525*9a0e4156SSadaf Ebrahimi 2685671583U, // FCVTZSv4f32 526*9a0e4156SSadaf Ebrahimi 1075058847U, // FCVTZSv4i32_shift 527*9a0e4156SSadaf Ebrahimi 17049879U, // FCVTZUSWDri 528*9a0e4156SSadaf Ebrahimi 17049879U, // FCVTZUSWSri 529*9a0e4156SSadaf Ebrahimi 17049879U, // FCVTZUSXDri 530*9a0e4156SSadaf Ebrahimi 17049879U, // FCVTZUSXSri 531*9a0e4156SSadaf Ebrahimi 553920791U, // FCVTZUUWDr 532*9a0e4156SSadaf Ebrahimi 553920791U, // FCVTZUUWSr 533*9a0e4156SSadaf Ebrahimi 553920791U, // FCVTZUUXDr 534*9a0e4156SSadaf Ebrahimi 553920791U, // FCVTZUUXSr 535*9a0e4156SSadaf Ebrahimi 17049879U, // FCVTZU_IntSWDri 536*9a0e4156SSadaf Ebrahimi 17049879U, // FCVTZU_IntSWSri 537*9a0e4156SSadaf Ebrahimi 17049879U, // FCVTZU_IntSXDri 538*9a0e4156SSadaf Ebrahimi 17049879U, // FCVTZU_IntSXSri 539*9a0e4156SSadaf Ebrahimi 553920791U, // FCVTZU_IntUWDr 540*9a0e4156SSadaf Ebrahimi 553920791U, // FCVTZU_IntUWSr 541*9a0e4156SSadaf Ebrahimi 553920791U, // FCVTZU_IntUXDr 542*9a0e4156SSadaf Ebrahimi 553920791U, // FCVTZU_IntUXSr 543*9a0e4156SSadaf Ebrahimi 1074272535U, // FCVTZU_Intv2f32 544*9a0e4156SSadaf Ebrahimi 1611405591U, // FCVTZU_Intv2f64 545*9a0e4156SSadaf Ebrahimi 2685671703U, // FCVTZU_Intv4f32 546*9a0e4156SSadaf Ebrahimi 17049879U, // FCVTZUd 547*9a0e4156SSadaf Ebrahimi 17049879U, // FCVTZUs 548*9a0e4156SSadaf Ebrahimi 553920791U, // FCVTZUv1i32 549*9a0e4156SSadaf Ebrahimi 553920791U, // FCVTZUv1i64 550*9a0e4156SSadaf Ebrahimi 1074272535U, // FCVTZUv2f32 551*9a0e4156SSadaf Ebrahimi 1611405591U, // FCVTZUv2f64 552*9a0e4156SSadaf Ebrahimi 2684885271U, // FCVTZUv2i32_shift 553*9a0e4156SSadaf Ebrahimi 537663767U, // FCVTZUv2i64_shift 554*9a0e4156SSadaf Ebrahimi 2685671703U, // FCVTZUv4f32 555*9a0e4156SSadaf Ebrahimi 1075058967U, // FCVTZUv4i32_shift 556*9a0e4156SSadaf Ebrahimi 17049898U, // FDIVDrr 557*9a0e4156SSadaf Ebrahimi 17049898U, // FDIVSrr 558*9a0e4156SSadaf Ebrahimi 2684885290U, // FDIVv2f32 559*9a0e4156SSadaf Ebrahimi 537663786U, // FDIVv2f64 560*9a0e4156SSadaf Ebrahimi 1075058986U, // FDIVv4f32 561*9a0e4156SSadaf Ebrahimi 17048394U, // FMADDDrrr 562*9a0e4156SSadaf Ebrahimi 17048394U, // FMADDSrrr 563*9a0e4156SSadaf Ebrahimi 17050100U, // FMAXDrr 564*9a0e4156SSadaf Ebrahimi 17049087U, // FMAXNMDrr 565*9a0e4156SSadaf Ebrahimi 2684884729U, // FMAXNMPv2f32 566*9a0e4156SSadaf Ebrahimi 537663225U, // FMAXNMPv2f64 567*9a0e4156SSadaf Ebrahimi 1074013945U, // FMAXNMPv2i32p 568*9a0e4156SSadaf Ebrahimi 1610884857U, // FMAXNMPv2i64p 569*9a0e4156SSadaf Ebrahimi 1075058425U, // FMAXNMPv4f32 570*9a0e4156SSadaf Ebrahimi 17049087U, // FMAXNMSrr 571*9a0e4156SSadaf Ebrahimi 2684627285U, // FMAXNMVv4i32v 572*9a0e4156SSadaf Ebrahimi 2684884479U, // FMAXNMv2f32 573*9a0e4156SSadaf Ebrahimi 537662975U, // FMAXNMv2f64 574*9a0e4156SSadaf Ebrahimi 1075058175U, // FMAXNMv4f32 575*9a0e4156SSadaf Ebrahimi 2684884802U, // FMAXPv2f32 576*9a0e4156SSadaf Ebrahimi 537663298U, // FMAXPv2f64 577*9a0e4156SSadaf Ebrahimi 1074014018U, // FMAXPv2i32p 578*9a0e4156SSadaf Ebrahimi 1610884930U, // FMAXPv2i64p 579*9a0e4156SSadaf Ebrahimi 1075058498U, // FMAXPv4f32 580*9a0e4156SSadaf Ebrahimi 17050100U, // FMAXSrr 581*9a0e4156SSadaf Ebrahimi 2684627340U, // FMAXVv4i32v 582*9a0e4156SSadaf Ebrahimi 2684885492U, // FMAXv2f32 583*9a0e4156SSadaf Ebrahimi 537663988U, // FMAXv2f64 584*9a0e4156SSadaf Ebrahimi 1075059188U, // FMAXv4f32 585*9a0e4156SSadaf Ebrahimi 17049126U, // FMINDrr 586*9a0e4156SSadaf Ebrahimi 17049079U, // FMINNMDrr 587*9a0e4156SSadaf Ebrahimi 2684884720U, // FMINNMPv2f32 588*9a0e4156SSadaf Ebrahimi 537663216U, // FMINNMPv2f64 589*9a0e4156SSadaf Ebrahimi 1074013936U, // FMINNMPv2i32p 590*9a0e4156SSadaf Ebrahimi 1610884848U, // FMINNMPv2i64p 591*9a0e4156SSadaf Ebrahimi 1075058416U, // FMINNMPv4f32 592*9a0e4156SSadaf Ebrahimi 17049079U, // FMINNMSrr 593*9a0e4156SSadaf Ebrahimi 2684627276U, // FMINNMVv4i32v 594*9a0e4156SSadaf Ebrahimi 2684884471U, // FMINNMv2f32 595*9a0e4156SSadaf Ebrahimi 537662967U, // FMINNMv2f64 596*9a0e4156SSadaf Ebrahimi 1075058167U, // FMINNMv4f32 597*9a0e4156SSadaf Ebrahimi 2684884744U, // FMINPv2f32 598*9a0e4156SSadaf Ebrahimi 537663240U, // FMINPv2f64 599*9a0e4156SSadaf Ebrahimi 1074013960U, // FMINPv2i32p 600*9a0e4156SSadaf Ebrahimi 1610884872U, // FMINPv2i64p 601*9a0e4156SSadaf Ebrahimi 1075058440U, // FMINPv4f32 602*9a0e4156SSadaf Ebrahimi 17049126U, // FMINSrr 603*9a0e4156SSadaf Ebrahimi 2684627294U, // FMINVv4i32v 604*9a0e4156SSadaf Ebrahimi 2684884518U, // FMINv2f32 605*9a0e4156SSadaf Ebrahimi 537663014U, // FMINv2f64 606*9a0e4156SSadaf Ebrahimi 1075058214U, // FMINv4f32 607*9a0e4156SSadaf Ebrahimi 67404282U, // FMLAv1i32_indexed 608*9a0e4156SSadaf Ebrahimi 67404282U, // FMLAv1i64_indexed 609*9a0e4156SSadaf Ebrahimi 2718446074U, // FMLAv2f32 610*9a0e4156SSadaf Ebrahimi 571224570U, // FMLAv2f64 611*9a0e4156SSadaf Ebrahimi 2718446074U, // FMLAv2i32_indexed 612*9a0e4156SSadaf Ebrahimi 571224570U, // FMLAv2i64_indexed 613*9a0e4156SSadaf Ebrahimi 1108619770U, // FMLAv4f32 614*9a0e4156SSadaf Ebrahimi 1108619770U, // FMLAv4i32_indexed 615*9a0e4156SSadaf Ebrahimi 67405921U, // FMLSv1i32_indexed 616*9a0e4156SSadaf Ebrahimi 67405921U, // FMLSv1i64_indexed 617*9a0e4156SSadaf Ebrahimi 2718447713U, // FMLSv2f32 618*9a0e4156SSadaf Ebrahimi 571226209U, // FMLSv2f64 619*9a0e4156SSadaf Ebrahimi 2718447713U, // FMLSv2i32_indexed 620*9a0e4156SSadaf Ebrahimi 571226209U, // FMLSv2i64_indexed 621*9a0e4156SSadaf Ebrahimi 1108621409U, // FMLSv4f32 622*9a0e4156SSadaf Ebrahimi 1108621409U, // FMLSv4i32_indexed 623*9a0e4156SSadaf Ebrahimi 1074014586U, // FMOVDXHighr 624*9a0e4156SSadaf Ebrahimi 553920890U, // FMOVDXr 625*9a0e4156SSadaf Ebrahimi 117713274U, // FMOVDi 626*9a0e4156SSadaf Ebrahimi 553920890U, // FMOVDr 627*9a0e4156SSadaf Ebrahimi 553920890U, // FMOVSWr 628*9a0e4156SSadaf Ebrahimi 117713274U, // FMOVSi 629*9a0e4156SSadaf Ebrahimi 553920890U, // FMOVSr 630*9a0e4156SSadaf Ebrahimi 553920890U, // FMOVWSr 631*9a0e4156SSadaf Ebrahimi 556276090U, // FMOVXDHighr 632*9a0e4156SSadaf Ebrahimi 553920890U, // FMOVXDr 633*9a0e4156SSadaf Ebrahimi 117971322U, // FMOVv2f32_ns 634*9a0e4156SSadaf Ebrahimi 118233466U, // FMOVv2f64_ns 635*9a0e4156SSadaf Ebrahimi 118757754U, // FMOVv4f32_ns 636*9a0e4156SSadaf Ebrahimi 17048257U, // FMSUBDrrr 637*9a0e4156SSadaf Ebrahimi 17048257U, // FMSUBSrrr 638*9a0e4156SSadaf Ebrahimi 17049035U, // FMULDrr 639*9a0e4156SSadaf Ebrahimi 17049035U, // FMULSrr 640*9a0e4156SSadaf Ebrahimi 17050139U, // FMULX32 641*9a0e4156SSadaf Ebrahimi 17050139U, // FMULX64 642*9a0e4156SSadaf Ebrahimi 17050139U, // FMULXv1i32_indexed 643*9a0e4156SSadaf Ebrahimi 17050139U, // FMULXv1i64_indexed 644*9a0e4156SSadaf Ebrahimi 2684885531U, // FMULXv2f32 645*9a0e4156SSadaf Ebrahimi 537664027U, // FMULXv2f64 646*9a0e4156SSadaf Ebrahimi 2684885531U, // FMULXv2i32_indexed 647*9a0e4156SSadaf Ebrahimi 537664027U, // FMULXv2i64_indexed 648*9a0e4156SSadaf Ebrahimi 1075059227U, // FMULXv4f32 649*9a0e4156SSadaf Ebrahimi 1075059227U, // FMULXv4i32_indexed 650*9a0e4156SSadaf Ebrahimi 17049035U, // FMULv1i32_indexed 651*9a0e4156SSadaf Ebrahimi 17049035U, // FMULv1i64_indexed 652*9a0e4156SSadaf Ebrahimi 2684884427U, // FMULv2f32 653*9a0e4156SSadaf Ebrahimi 537662923U, // FMULv2f64 654*9a0e4156SSadaf Ebrahimi 2684884427U, // FMULv2i32_indexed 655*9a0e4156SSadaf Ebrahimi 537662923U, // FMULv2i64_indexed 656*9a0e4156SSadaf Ebrahimi 1075058123U, // FMULv4f32 657*9a0e4156SSadaf Ebrahimi 1075058123U, // FMULv4i32_indexed 658*9a0e4156SSadaf Ebrahimi 553919443U, // FNEGDr 659*9a0e4156SSadaf Ebrahimi 553919443U, // FNEGSr 660*9a0e4156SSadaf Ebrahimi 1074271187U, // FNEGv2f32 661*9a0e4156SSadaf Ebrahimi 1611404243U, // FNEGv2f64 662*9a0e4156SSadaf Ebrahimi 2685670355U, // FNEGv4f32 663*9a0e4156SSadaf Ebrahimi 17048401U, // FNMADDDrrr 664*9a0e4156SSadaf Ebrahimi 17048401U, // FNMADDSrrr 665*9a0e4156SSadaf Ebrahimi 17048264U, // FNMSUBDrrr 666*9a0e4156SSadaf Ebrahimi 17048264U, // FNMSUBSrrr 667*9a0e4156SSadaf Ebrahimi 17049041U, // FNMULDrr 668*9a0e4156SSadaf Ebrahimi 17049041U, // FNMULSrr 669*9a0e4156SSadaf Ebrahimi 553919369U, // FRECPEv1i32 670*9a0e4156SSadaf Ebrahimi 553919369U, // FRECPEv1i64 671*9a0e4156SSadaf Ebrahimi 1074271113U, // FRECPEv2f32 672*9a0e4156SSadaf Ebrahimi 1611404169U, // FRECPEv2f64 673*9a0e4156SSadaf Ebrahimi 2685670281U, // FRECPEv4f32 674*9a0e4156SSadaf Ebrahimi 17049724U, // FRECPS32 675*9a0e4156SSadaf Ebrahimi 17049724U, // FRECPS64 676*9a0e4156SSadaf Ebrahimi 2684885116U, // FRECPSv2f32 677*9a0e4156SSadaf Ebrahimi 537663612U, // FRECPSv2f64 678*9a0e4156SSadaf Ebrahimi 1075058812U, // FRECPSv4f32 679*9a0e4156SSadaf Ebrahimi 553921058U, // FRECPXv1i32 680*9a0e4156SSadaf Ebrahimi 553921058U, // FRECPXv1i64 681*9a0e4156SSadaf Ebrahimi 553919002U, // FRINTADr 682*9a0e4156SSadaf Ebrahimi 553919002U, // FRINTASr 683*9a0e4156SSadaf Ebrahimi 1074270746U, // FRINTAv2f32 684*9a0e4156SSadaf Ebrahimi 1611403802U, // FRINTAv2f64 685*9a0e4156SSadaf Ebrahimi 2685669914U, // FRINTAv4f32 686*9a0e4156SSadaf Ebrahimi 553919658U, // FRINTIDr 687*9a0e4156SSadaf Ebrahimi 553919658U, // FRINTISr 688*9a0e4156SSadaf Ebrahimi 1074271402U, // FRINTIv2f32 689*9a0e4156SSadaf Ebrahimi 1611404458U, // FRINTIv2f64 690*9a0e4156SSadaf Ebrahimi 2685670570U, // FRINTIv4f32 691*9a0e4156SSadaf Ebrahimi 553920007U, // FRINTMDr 692*9a0e4156SSadaf Ebrahimi 553920007U, // FRINTMSr 693*9a0e4156SSadaf Ebrahimi 1074271751U, // FRINTMv2f32 694*9a0e4156SSadaf Ebrahimi 1611404807U, // FRINTMv2f64 695*9a0e4156SSadaf Ebrahimi 2685670919U, // FRINTMv4f32 696*9a0e4156SSadaf Ebrahimi 553920106U, // FRINTNDr 697*9a0e4156SSadaf Ebrahimi 553920106U, // FRINTNSr 698*9a0e4156SSadaf Ebrahimi 1074271850U, // FRINTNv2f32 699*9a0e4156SSadaf Ebrahimi 1611404906U, // FRINTNv2f64 700*9a0e4156SSadaf Ebrahimi 2685671018U, // FRINTNv4f32 701*9a0e4156SSadaf Ebrahimi 553920297U, // FRINTPDr 702*9a0e4156SSadaf Ebrahimi 553920297U, // FRINTPSr 703*9a0e4156SSadaf Ebrahimi 1074272041U, // FRINTPv2f32 704*9a0e4156SSadaf Ebrahimi 1611405097U, // FRINTPv2f64 705*9a0e4156SSadaf Ebrahimi 2685671209U, // FRINTPv4f32 706*9a0e4156SSadaf Ebrahimi 553921066U, // FRINTXDr 707*9a0e4156SSadaf Ebrahimi 553921066U, // FRINTXSr 708*9a0e4156SSadaf Ebrahimi 1074272810U, // FRINTXv2f32 709*9a0e4156SSadaf Ebrahimi 1611405866U, // FRINTXv2f64 710*9a0e4156SSadaf Ebrahimi 2685671978U, // FRINTXv4f32 711*9a0e4156SSadaf Ebrahimi 553921101U, // FRINTZDr 712*9a0e4156SSadaf Ebrahimi 553921101U, // FRINTZSr 713*9a0e4156SSadaf Ebrahimi 1074272845U, // FRINTZv2f32 714*9a0e4156SSadaf Ebrahimi 1611405901U, // FRINTZv2f64 715*9a0e4156SSadaf Ebrahimi 2685672013U, // FRINTZv4f32 716*9a0e4156SSadaf Ebrahimi 553919406U, // FRSQRTEv1i32 717*9a0e4156SSadaf Ebrahimi 553919406U, // FRSQRTEv1i64 718*9a0e4156SSadaf Ebrahimi 1074271150U, // FRSQRTEv2f32 719*9a0e4156SSadaf Ebrahimi 1611404206U, // FRSQRTEv2f64 720*9a0e4156SSadaf Ebrahimi 2685670318U, // FRSQRTEv4f32 721*9a0e4156SSadaf Ebrahimi 17049745U, // FRSQRTS32 722*9a0e4156SSadaf Ebrahimi 17049745U, // FRSQRTS64 723*9a0e4156SSadaf Ebrahimi 2684885137U, // FRSQRTSv2f32 724*9a0e4156SSadaf Ebrahimi 537663633U, // FRSQRTSv2f64 725*9a0e4156SSadaf Ebrahimi 1075058833U, // FRSQRTSv4f32 726*9a0e4156SSadaf Ebrahimi 553920726U, // FSQRTDr 727*9a0e4156SSadaf Ebrahimi 553920726U, // FSQRTSr 728*9a0e4156SSadaf Ebrahimi 1074272470U, // FSQRTv2f32 729*9a0e4156SSadaf Ebrahimi 1611405526U, // FSQRTv2f64 730*9a0e4156SSadaf Ebrahimi 2685671638U, // FSQRTv4f32 731*9a0e4156SSadaf Ebrahimi 17048237U, // FSUBDrr 732*9a0e4156SSadaf Ebrahimi 17048237U, // FSUBSrr 733*9a0e4156SSadaf Ebrahimi 2684883629U, // FSUBv2f32 734*9a0e4156SSadaf Ebrahimi 537662125U, // FSUBv2f64 735*9a0e4156SSadaf Ebrahimi 1075057325U, // FSUBv4f32 736*9a0e4156SSadaf Ebrahimi 23145U, // HINT 737*9a0e4156SSadaf Ebrahimi 22720U, // HLT 738*9a0e4156SSadaf Ebrahimi 21258U, // HVC 739*9a0e4156SSadaf Ebrahimi 137115759U, // INSvi16gpr 740*9a0e4156SSadaf Ebrahimi 153892975U, // INSvi16lane 741*9a0e4156SSadaf Ebrahimi 137377903U, // INSvi32gpr 742*9a0e4156SSadaf Ebrahimi 691026031U, // INSvi32lane 743*9a0e4156SSadaf Ebrahimi 136853615U, // INSvi64gpr 744*9a0e4156SSadaf Ebrahimi 1227372655U, // INSvi64lane 745*9a0e4156SSadaf Ebrahimi 137640047U, // INSvi8gpr 746*9a0e4156SSadaf Ebrahimi 1765029999U, // INSvi8lane 747*9a0e4156SSadaf Ebrahimi 29329U, // ISB 748*9a0e4156SSadaf Ebrahimi 36885U, // LD1Fourv16b 749*9a0e4156SSadaf Ebrahimi 3710997U, // LD1Fourv16b_POST 750*9a0e4156SSadaf Ebrahimi 45077U, // LD1Fourv1d 751*9a0e4156SSadaf Ebrahimi 3981333U, // LD1Fourv1d_POST 752*9a0e4156SSadaf Ebrahimi 53269U, // LD1Fourv2d 753*9a0e4156SSadaf Ebrahimi 3727381U, // LD1Fourv2d_POST 754*9a0e4156SSadaf Ebrahimi 61461U, // LD1Fourv2s 755*9a0e4156SSadaf Ebrahimi 3997717U, // LD1Fourv2s_POST 756*9a0e4156SSadaf Ebrahimi 69653U, // LD1Fourv4h 757*9a0e4156SSadaf Ebrahimi 4005909U, // LD1Fourv4h_POST 758*9a0e4156SSadaf Ebrahimi 77845U, // LD1Fourv4s 759*9a0e4156SSadaf Ebrahimi 3751957U, // LD1Fourv4s_POST 760*9a0e4156SSadaf Ebrahimi 86037U, // LD1Fourv8b 761*9a0e4156SSadaf Ebrahimi 4022293U, // LD1Fourv8b_POST 762*9a0e4156SSadaf Ebrahimi 94229U, // LD1Fourv8h 763*9a0e4156SSadaf Ebrahimi 3768341U, // LD1Fourv8h_POST 764*9a0e4156SSadaf Ebrahimi 36885U, // LD1Onev16b 765*9a0e4156SSadaf Ebrahimi 4235285U, // LD1Onev16b_POST 766*9a0e4156SSadaf Ebrahimi 45077U, // LD1Onev1d 767*9a0e4156SSadaf Ebrahimi 4505621U, // LD1Onev1d_POST 768*9a0e4156SSadaf Ebrahimi 53269U, // LD1Onev2d 769*9a0e4156SSadaf Ebrahimi 4251669U, // LD1Onev2d_POST 770*9a0e4156SSadaf Ebrahimi 61461U, // LD1Onev2s 771*9a0e4156SSadaf Ebrahimi 4522005U, // LD1Onev2s_POST 772*9a0e4156SSadaf Ebrahimi 69653U, // LD1Onev4h 773*9a0e4156SSadaf Ebrahimi 4530197U, // LD1Onev4h_POST 774*9a0e4156SSadaf Ebrahimi 77845U, // LD1Onev4s 775*9a0e4156SSadaf Ebrahimi 4276245U, // LD1Onev4s_POST 776*9a0e4156SSadaf Ebrahimi 86037U, // LD1Onev8b 777*9a0e4156SSadaf Ebrahimi 4546581U, // LD1Onev8b_POST 778*9a0e4156SSadaf Ebrahimi 94229U, // LD1Onev8h 779*9a0e4156SSadaf Ebrahimi 4292629U, // LD1Onev8h_POST 780*9a0e4156SSadaf Ebrahimi 38769U, // LD1Rv16b 781*9a0e4156SSadaf Ebrahimi 4761457U, // LD1Rv16b_POST 782*9a0e4156SSadaf Ebrahimi 46961U, // LD1Rv1d 783*9a0e4156SSadaf Ebrahimi 4507505U, // LD1Rv1d_POST 784*9a0e4156SSadaf Ebrahimi 55153U, // LD1Rv2d 785*9a0e4156SSadaf Ebrahimi 4515697U, // LD1Rv2d_POST 786*9a0e4156SSadaf Ebrahimi 63345U, // LD1Rv2s 787*9a0e4156SSadaf Ebrahimi 5048177U, // LD1Rv2s_POST 788*9a0e4156SSadaf Ebrahimi 71537U, // LD1Rv4h 789*9a0e4156SSadaf Ebrahimi 5318513U, // LD1Rv4h_POST 790*9a0e4156SSadaf Ebrahimi 79729U, // LD1Rv4s 791*9a0e4156SSadaf Ebrahimi 5064561U, // LD1Rv4s_POST 792*9a0e4156SSadaf Ebrahimi 87921U, // LD1Rv8b 793*9a0e4156SSadaf Ebrahimi 4810609U, // LD1Rv8b_POST 794*9a0e4156SSadaf Ebrahimi 96113U, // LD1Rv8h 795*9a0e4156SSadaf Ebrahimi 5343089U, // LD1Rv8h_POST 796*9a0e4156SSadaf Ebrahimi 36885U, // LD1Threev16b 797*9a0e4156SSadaf Ebrahimi 5546005U, // LD1Threev16b_POST 798*9a0e4156SSadaf Ebrahimi 45077U, // LD1Threev1d 799*9a0e4156SSadaf Ebrahimi 5816341U, // LD1Threev1d_POST 800*9a0e4156SSadaf Ebrahimi 53269U, // LD1Threev2d 801*9a0e4156SSadaf Ebrahimi 5562389U, // LD1Threev2d_POST 802*9a0e4156SSadaf Ebrahimi 61461U, // LD1Threev2s 803*9a0e4156SSadaf Ebrahimi 5832725U, // LD1Threev2s_POST 804*9a0e4156SSadaf Ebrahimi 69653U, // LD1Threev4h 805*9a0e4156SSadaf Ebrahimi 5840917U, // LD1Threev4h_POST 806*9a0e4156SSadaf Ebrahimi 77845U, // LD1Threev4s 807*9a0e4156SSadaf Ebrahimi 5586965U, // LD1Threev4s_POST 808*9a0e4156SSadaf Ebrahimi 86037U, // LD1Threev8b 809*9a0e4156SSadaf Ebrahimi 5857301U, // LD1Threev8b_POST 810*9a0e4156SSadaf Ebrahimi 94229U, // LD1Threev8h 811*9a0e4156SSadaf Ebrahimi 5603349U, // LD1Threev8h_POST 812*9a0e4156SSadaf Ebrahimi 36885U, // LD1Twov16b 813*9a0e4156SSadaf Ebrahimi 3973141U, // LD1Twov16b_POST 814*9a0e4156SSadaf Ebrahimi 45077U, // LD1Twov1d 815*9a0e4156SSadaf Ebrahimi 4243477U, // LD1Twov1d_POST 816*9a0e4156SSadaf Ebrahimi 53269U, // LD1Twov2d 817*9a0e4156SSadaf Ebrahimi 3989525U, // LD1Twov2d_POST 818*9a0e4156SSadaf Ebrahimi 61461U, // LD1Twov2s 819*9a0e4156SSadaf Ebrahimi 4259861U, // LD1Twov2s_POST 820*9a0e4156SSadaf Ebrahimi 69653U, // LD1Twov4h 821*9a0e4156SSadaf Ebrahimi 4268053U, // LD1Twov4h_POST 822*9a0e4156SSadaf Ebrahimi 77845U, // LD1Twov4s 823*9a0e4156SSadaf Ebrahimi 4014101U, // LD1Twov4s_POST 824*9a0e4156SSadaf Ebrahimi 86037U, // LD1Twov8b 825*9a0e4156SSadaf Ebrahimi 4284437U, // LD1Twov8b_POST 826*9a0e4156SSadaf Ebrahimi 94229U, // LD1Twov8h 827*9a0e4156SSadaf Ebrahimi 4030485U, // LD1Twov8h_POST 828*9a0e4156SSadaf Ebrahimi 6131733U, // LD1i16 829*9a0e4156SSadaf Ebrahimi 6397973U, // LD1i16_POST 830*9a0e4156SSadaf Ebrahimi 6139925U, // LD1i32 831*9a0e4156SSadaf Ebrahimi 6668309U, // LD1i32_POST 832*9a0e4156SSadaf Ebrahimi 6148117U, // LD1i64 833*9a0e4156SSadaf Ebrahimi 6938645U, // LD1i64_POST 834*9a0e4156SSadaf Ebrahimi 6156309U, // LD1i8 835*9a0e4156SSadaf Ebrahimi 7208981U, // LD1i8_POST 836*9a0e4156SSadaf Ebrahimi 38775U, // LD2Rv16b 837*9a0e4156SSadaf Ebrahimi 5285751U, // LD2Rv16b_POST 838*9a0e4156SSadaf Ebrahimi 46967U, // LD2Rv1d 839*9a0e4156SSadaf Ebrahimi 4245367U, // LD2Rv1d_POST 840*9a0e4156SSadaf Ebrahimi 55159U, // LD2Rv2d 841*9a0e4156SSadaf Ebrahimi 4253559U, // LD2Rv2d_POST 842*9a0e4156SSadaf Ebrahimi 63351U, // LD2Rv2s 843*9a0e4156SSadaf Ebrahimi 4523895U, // LD2Rv2s_POST 844*9a0e4156SSadaf Ebrahimi 71543U, // LD2Rv4h 845*9a0e4156SSadaf Ebrahimi 5056375U, // LD2Rv4h_POST 846*9a0e4156SSadaf Ebrahimi 79735U, // LD2Rv4s 847*9a0e4156SSadaf Ebrahimi 4540279U, // LD2Rv4s_POST 848*9a0e4156SSadaf Ebrahimi 87927U, // LD2Rv8b 849*9a0e4156SSadaf Ebrahimi 5334903U, // LD2Rv8b_POST 850*9a0e4156SSadaf Ebrahimi 96119U, // LD2Rv8h 851*9a0e4156SSadaf Ebrahimi 5080951U, // LD2Rv8h_POST 852*9a0e4156SSadaf Ebrahimi 36947U, // LD2Twov16b 853*9a0e4156SSadaf Ebrahimi 3973203U, // LD2Twov16b_POST 854*9a0e4156SSadaf Ebrahimi 53331U, // LD2Twov2d 855*9a0e4156SSadaf Ebrahimi 3989587U, // LD2Twov2d_POST 856*9a0e4156SSadaf Ebrahimi 61523U, // LD2Twov2s 857*9a0e4156SSadaf Ebrahimi 4259923U, // LD2Twov2s_POST 858*9a0e4156SSadaf Ebrahimi 69715U, // LD2Twov4h 859*9a0e4156SSadaf Ebrahimi 4268115U, // LD2Twov4h_POST 860*9a0e4156SSadaf Ebrahimi 77907U, // LD2Twov4s 861*9a0e4156SSadaf Ebrahimi 4014163U, // LD2Twov4s_POST 862*9a0e4156SSadaf Ebrahimi 86099U, // LD2Twov8b 863*9a0e4156SSadaf Ebrahimi 4284499U, // LD2Twov8b_POST 864*9a0e4156SSadaf Ebrahimi 94291U, // LD2Twov8h 865*9a0e4156SSadaf Ebrahimi 4030547U, // LD2Twov8h_POST 866*9a0e4156SSadaf Ebrahimi 6131795U, // LD2i16 867*9a0e4156SSadaf Ebrahimi 6660179U, // LD2i16_POST 868*9a0e4156SSadaf Ebrahimi 6139987U, // LD2i32 869*9a0e4156SSadaf Ebrahimi 6930515U, // LD2i32_POST 870*9a0e4156SSadaf Ebrahimi 6148179U, // LD2i64 871*9a0e4156SSadaf Ebrahimi 7462995U, // LD2i64_POST 872*9a0e4156SSadaf Ebrahimi 6156371U, // LD2i8 873*9a0e4156SSadaf Ebrahimi 6422611U, // LD2i8_POST 874*9a0e4156SSadaf Ebrahimi 38781U, // LD3Rv16b 875*9a0e4156SSadaf Ebrahimi 7645053U, // LD3Rv16b_POST 876*9a0e4156SSadaf Ebrahimi 46973U, // LD3Rv1d 877*9a0e4156SSadaf Ebrahimi 5818237U, // LD3Rv1d_POST 878*9a0e4156SSadaf Ebrahimi 55165U, // LD3Rv2d 879*9a0e4156SSadaf Ebrahimi 5826429U, // LD3Rv2d_POST 880*9a0e4156SSadaf Ebrahimi 63357U, // LD3Rv2s 881*9a0e4156SSadaf Ebrahimi 7931773U, // LD3Rv2s_POST 882*9a0e4156SSadaf Ebrahimi 71549U, // LD3Rv4h 883*9a0e4156SSadaf Ebrahimi 8202109U, // LD3Rv4h_POST 884*9a0e4156SSadaf Ebrahimi 79741U, // LD3Rv4s 885*9a0e4156SSadaf Ebrahimi 7948157U, // LD3Rv4s_POST 886*9a0e4156SSadaf Ebrahimi 87933U, // LD3Rv8b 887*9a0e4156SSadaf Ebrahimi 7694205U, // LD3Rv8b_POST 888*9a0e4156SSadaf Ebrahimi 96125U, // LD3Rv8h 889*9a0e4156SSadaf Ebrahimi 8226685U, // LD3Rv8h_POST 890*9a0e4156SSadaf Ebrahimi 37317U, // LD3Threev16b 891*9a0e4156SSadaf Ebrahimi 5546437U, // LD3Threev16b_POST 892*9a0e4156SSadaf Ebrahimi 53701U, // LD3Threev2d 893*9a0e4156SSadaf Ebrahimi 5562821U, // LD3Threev2d_POST 894*9a0e4156SSadaf Ebrahimi 61893U, // LD3Threev2s 895*9a0e4156SSadaf Ebrahimi 5833157U, // LD3Threev2s_POST 896*9a0e4156SSadaf Ebrahimi 70085U, // LD3Threev4h 897*9a0e4156SSadaf Ebrahimi 5841349U, // LD3Threev4h_POST 898*9a0e4156SSadaf Ebrahimi 78277U, // LD3Threev4s 899*9a0e4156SSadaf Ebrahimi 5587397U, // LD3Threev4s_POST 900*9a0e4156SSadaf Ebrahimi 86469U, // LD3Threev8b 901*9a0e4156SSadaf Ebrahimi 5857733U, // LD3Threev8b_POST 902*9a0e4156SSadaf Ebrahimi 94661U, // LD3Threev8h 903*9a0e4156SSadaf Ebrahimi 5603781U, // LD3Threev8h_POST 904*9a0e4156SSadaf Ebrahimi 6132165U, // LD3i16 905*9a0e4156SSadaf Ebrahimi 8495557U, // LD3i16_POST 906*9a0e4156SSadaf Ebrahimi 6140357U, // LD3i32 907*9a0e4156SSadaf Ebrahimi 8765893U, // LD3i32_POST 908*9a0e4156SSadaf Ebrahimi 6148549U, // LD3i64 909*9a0e4156SSadaf Ebrahimi 9036229U, // LD3i64_POST 910*9a0e4156SSadaf Ebrahimi 6156741U, // LD3i8 911*9a0e4156SSadaf Ebrahimi 9306565U, // LD3i8_POST 912*9a0e4156SSadaf Ebrahimi 37341U, // LD4Fourv16b 913*9a0e4156SSadaf Ebrahimi 3711453U, // LD4Fourv16b_POST 914*9a0e4156SSadaf Ebrahimi 53725U, // LD4Fourv2d 915*9a0e4156SSadaf Ebrahimi 3727837U, // LD4Fourv2d_POST 916*9a0e4156SSadaf Ebrahimi 61917U, // LD4Fourv2s 917*9a0e4156SSadaf Ebrahimi 3998173U, // LD4Fourv2s_POST 918*9a0e4156SSadaf Ebrahimi 70109U, // LD4Fourv4h 919*9a0e4156SSadaf Ebrahimi 4006365U, // LD4Fourv4h_POST 920*9a0e4156SSadaf Ebrahimi 78301U, // LD4Fourv4s 921*9a0e4156SSadaf Ebrahimi 3752413U, // LD4Fourv4s_POST 922*9a0e4156SSadaf Ebrahimi 86493U, // LD4Fourv8b 923*9a0e4156SSadaf Ebrahimi 4022749U, // LD4Fourv8b_POST 924*9a0e4156SSadaf Ebrahimi 94685U, // LD4Fourv8h 925*9a0e4156SSadaf Ebrahimi 3768797U, // LD4Fourv8h_POST 926*9a0e4156SSadaf Ebrahimi 38787U, // LD4Rv16b 927*9a0e4156SSadaf Ebrahimi 5023619U, // LD4Rv16b_POST 928*9a0e4156SSadaf Ebrahimi 46979U, // LD4Rv1d 929*9a0e4156SSadaf Ebrahimi 3983235U, // LD4Rv1d_POST 930*9a0e4156SSadaf Ebrahimi 55171U, // LD4Rv2d 931*9a0e4156SSadaf Ebrahimi 3991427U, // LD4Rv2d_POST 932*9a0e4156SSadaf Ebrahimi 63363U, // LD4Rv2s 933*9a0e4156SSadaf Ebrahimi 4261763U, // LD4Rv2s_POST 934*9a0e4156SSadaf Ebrahimi 71555U, // LD4Rv4h 935*9a0e4156SSadaf Ebrahimi 4532099U, // LD4Rv4h_POST 936*9a0e4156SSadaf Ebrahimi 79747U, // LD4Rv4s 937*9a0e4156SSadaf Ebrahimi 4278147U, // LD4Rv4s_POST 938*9a0e4156SSadaf Ebrahimi 87939U, // LD4Rv8b 939*9a0e4156SSadaf Ebrahimi 5072771U, // LD4Rv8b_POST 940*9a0e4156SSadaf Ebrahimi 96131U, // LD4Rv8h 941*9a0e4156SSadaf Ebrahimi 4556675U, // LD4Rv8h_POST 942*9a0e4156SSadaf Ebrahimi 6132189U, // LD4i16 943*9a0e4156SSadaf Ebrahimi 6922717U, // LD4i16_POST 944*9a0e4156SSadaf Ebrahimi 6140381U, // LD4i32 945*9a0e4156SSadaf Ebrahimi 7455197U, // LD4i32_POST 946*9a0e4156SSadaf Ebrahimi 6148573U, // LD4i64 947*9a0e4156SSadaf Ebrahimi 9560541U, // LD4i64_POST 948*9a0e4156SSadaf Ebrahimi 6156765U, // LD4i8 949*9a0e4156SSadaf Ebrahimi 6685149U, // LD4i8_POST 950*9a0e4156SSadaf Ebrahimi 26485304U, // LDARB 951*9a0e4156SSadaf Ebrahimi 26485801U, // LDARH 952*9a0e4156SSadaf Ebrahimi 26486665U, // LDARW 953*9a0e4156SSadaf Ebrahimi 26486665U, // LDARX 954*9a0e4156SSadaf Ebrahimi 553920315U, // LDAXPW 955*9a0e4156SSadaf Ebrahimi 553920315U, // LDAXPX 956*9a0e4156SSadaf Ebrahimi 26485358U, // LDAXRB 957*9a0e4156SSadaf Ebrahimi 26485855U, // LDAXRH 958*9a0e4156SSadaf Ebrahimi 26486787U, // LDAXRW 959*9a0e4156SSadaf Ebrahimi 26486787U, // LDAXRX 960*9a0e4156SSadaf Ebrahimi 553920258U, // LDNPDi 961*9a0e4156SSadaf Ebrahimi 553920258U, // LDNPQi 962*9a0e4156SSadaf Ebrahimi 553920258U, // LDNPSi 963*9a0e4156SSadaf Ebrahimi 553920258U, // LDNPWi 964*9a0e4156SSadaf Ebrahimi 553920258U, // LDNPXi 965*9a0e4156SSadaf Ebrahimi 553920190U, // LDPDi 966*9a0e4156SSadaf Ebrahimi 604276414U, // LDPDpost 967*9a0e4156SSadaf Ebrahimi 604276414U, // LDPDpre 968*9a0e4156SSadaf Ebrahimi 553920190U, // LDPQi 969*9a0e4156SSadaf Ebrahimi 604276414U, // LDPQpost 970*9a0e4156SSadaf Ebrahimi 604276414U, // LDPQpre 971*9a0e4156SSadaf Ebrahimi 553920974U, // LDPSWi 972*9a0e4156SSadaf Ebrahimi 604277198U, // LDPSWpost 973*9a0e4156SSadaf Ebrahimi 604277198U, // LDPSWpre 974*9a0e4156SSadaf Ebrahimi 553920190U, // LDPSi 975*9a0e4156SSadaf Ebrahimi 604276414U, // LDPSpost 976*9a0e4156SSadaf Ebrahimi 604276414U, // LDPSpre 977*9a0e4156SSadaf Ebrahimi 553920190U, // LDPWi 978*9a0e4156SSadaf Ebrahimi 604276414U, // LDPWpost 979*9a0e4156SSadaf Ebrahimi 604276414U, // LDPWpre 980*9a0e4156SSadaf Ebrahimi 553920190U, // LDPXi 981*9a0e4156SSadaf Ebrahimi 604276414U, // LDPXpost 982*9a0e4156SSadaf Ebrahimi 604276414U, // LDPXpre 983*9a0e4156SSadaf Ebrahimi 1150583359U, // LDRBBpost 984*9a0e4156SSadaf Ebrahimi 76841535U, // LDRBBpre 985*9a0e4156SSadaf Ebrahimi 26485311U, // LDRBBroW 986*9a0e4156SSadaf Ebrahimi 26485311U, // LDRBBroX 987*9a0e4156SSadaf Ebrahimi 26485311U, // LDRBBui 988*9a0e4156SSadaf Ebrahimi 1150584728U, // LDRBpost 989*9a0e4156SSadaf Ebrahimi 76842904U, // LDRBpre 990*9a0e4156SSadaf Ebrahimi 26486680U, // LDRBroW 991*9a0e4156SSadaf Ebrahimi 26486680U, // LDRBroX 992*9a0e4156SSadaf Ebrahimi 26486680U, // LDRBui 993*9a0e4156SSadaf Ebrahimi 100935576U, // LDRDl 994*9a0e4156SSadaf Ebrahimi 1150584728U, // LDRDpost 995*9a0e4156SSadaf Ebrahimi 76842904U, // LDRDpre 996*9a0e4156SSadaf Ebrahimi 26486680U, // LDRDroW 997*9a0e4156SSadaf Ebrahimi 26486680U, // LDRDroX 998*9a0e4156SSadaf Ebrahimi 26486680U, // LDRDui 999*9a0e4156SSadaf Ebrahimi 1150583856U, // LDRHHpost 1000*9a0e4156SSadaf Ebrahimi 76842032U, // LDRHHpre 1001*9a0e4156SSadaf Ebrahimi 26485808U, // LDRHHroW 1002*9a0e4156SSadaf Ebrahimi 26485808U, // LDRHHroX 1003*9a0e4156SSadaf Ebrahimi 26485808U, // LDRHHui 1004*9a0e4156SSadaf Ebrahimi 1150584728U, // LDRHpost 1005*9a0e4156SSadaf Ebrahimi 76842904U, // LDRHpre 1006*9a0e4156SSadaf Ebrahimi 26486680U, // LDRHroW 1007*9a0e4156SSadaf Ebrahimi 26486680U, // LDRHroX 1008*9a0e4156SSadaf Ebrahimi 26486680U, // LDRHui 1009*9a0e4156SSadaf Ebrahimi 100935576U, // LDRQl 1010*9a0e4156SSadaf Ebrahimi 1150584728U, // LDRQpost 1011*9a0e4156SSadaf Ebrahimi 76842904U, // LDRQpre 1012*9a0e4156SSadaf Ebrahimi 26486680U, // LDRQroW 1013*9a0e4156SSadaf Ebrahimi 26486680U, // LDRQroX 1014*9a0e4156SSadaf Ebrahimi 26486680U, // LDRQui 1015*9a0e4156SSadaf Ebrahimi 1150583446U, // LDRSBWpost 1016*9a0e4156SSadaf Ebrahimi 76841622U, // LDRSBWpre 1017*9a0e4156SSadaf Ebrahimi 26485398U, // LDRSBWroW 1018*9a0e4156SSadaf Ebrahimi 26485398U, // LDRSBWroX 1019*9a0e4156SSadaf Ebrahimi 26485398U, // LDRSBWui 1020*9a0e4156SSadaf Ebrahimi 1150583446U, // LDRSBXpost 1021*9a0e4156SSadaf Ebrahimi 76841622U, // LDRSBXpre 1022*9a0e4156SSadaf Ebrahimi 26485398U, // LDRSBXroW 1023*9a0e4156SSadaf Ebrahimi 26485398U, // LDRSBXroX 1024*9a0e4156SSadaf Ebrahimi 26485398U, // LDRSBXui 1025*9a0e4156SSadaf Ebrahimi 1150583933U, // LDRSHWpost 1026*9a0e4156SSadaf Ebrahimi 76842109U, // LDRSHWpre 1027*9a0e4156SSadaf Ebrahimi 26485885U, // LDRSHWroW 1028*9a0e4156SSadaf Ebrahimi 26485885U, // LDRSHWroX 1029*9a0e4156SSadaf Ebrahimi 26485885U, // LDRSHWui 1030*9a0e4156SSadaf Ebrahimi 1150583933U, // LDRSHXpost 1031*9a0e4156SSadaf Ebrahimi 76842109U, // LDRSHXpre 1032*9a0e4156SSadaf Ebrahimi 26485885U, // LDRSHXroW 1033*9a0e4156SSadaf Ebrahimi 26485885U, // LDRSHXroX 1034*9a0e4156SSadaf Ebrahimi 26485885U, // LDRSHXui 1035*9a0e4156SSadaf Ebrahimi 100936149U, // LDRSWl 1036*9a0e4156SSadaf Ebrahimi 1150585301U, // LDRSWpost 1037*9a0e4156SSadaf Ebrahimi 76843477U, // LDRSWpre 1038*9a0e4156SSadaf Ebrahimi 26487253U, // LDRSWroW 1039*9a0e4156SSadaf Ebrahimi 26487253U, // LDRSWroX 1040*9a0e4156SSadaf Ebrahimi 26487253U, // LDRSWui 1041*9a0e4156SSadaf Ebrahimi 100935576U, // LDRSl 1042*9a0e4156SSadaf Ebrahimi 1150584728U, // LDRSpost 1043*9a0e4156SSadaf Ebrahimi 76842904U, // LDRSpre 1044*9a0e4156SSadaf Ebrahimi 26486680U, // LDRSroW 1045*9a0e4156SSadaf Ebrahimi 26486680U, // LDRSroX 1046*9a0e4156SSadaf Ebrahimi 26486680U, // LDRSui 1047*9a0e4156SSadaf Ebrahimi 100935576U, // LDRWl 1048*9a0e4156SSadaf Ebrahimi 1150584728U, // LDRWpost 1049*9a0e4156SSadaf Ebrahimi 76842904U, // LDRWpre 1050*9a0e4156SSadaf Ebrahimi 26486680U, // LDRWroW 1051*9a0e4156SSadaf Ebrahimi 26486680U, // LDRWroX 1052*9a0e4156SSadaf Ebrahimi 26486680U, // LDRWui 1053*9a0e4156SSadaf Ebrahimi 100935576U, // LDRXl 1054*9a0e4156SSadaf Ebrahimi 1150584728U, // LDRXpost 1055*9a0e4156SSadaf Ebrahimi 76842904U, // LDRXpre 1056*9a0e4156SSadaf Ebrahimi 26486680U, // LDRXroW 1057*9a0e4156SSadaf Ebrahimi 26486680U, // LDRXroX 1058*9a0e4156SSadaf Ebrahimi 26486680U, // LDRXui 1059*9a0e4156SSadaf Ebrahimi 26485324U, // LDTRBi 1060*9a0e4156SSadaf Ebrahimi 26485821U, // LDTRHi 1061*9a0e4156SSadaf Ebrahimi 26485405U, // LDTRSBWi 1062*9a0e4156SSadaf Ebrahimi 26485405U, // LDTRSBXi 1063*9a0e4156SSadaf Ebrahimi 26485892U, // LDTRSHWi 1064*9a0e4156SSadaf Ebrahimi 26485892U, // LDTRSHXi 1065*9a0e4156SSadaf Ebrahimi 26487260U, // LDTRSWi 1066*9a0e4156SSadaf Ebrahimi 26486752U, // LDTRWi 1067*9a0e4156SSadaf Ebrahimi 26486752U, // LDTRXi 1068*9a0e4156SSadaf Ebrahimi 26485344U, // LDURBBi 1069*9a0e4156SSadaf Ebrahimi 26486775U, // LDURBi 1070*9a0e4156SSadaf Ebrahimi 26486775U, // LDURDi 1071*9a0e4156SSadaf Ebrahimi 26485841U, // LDURHHi 1072*9a0e4156SSadaf Ebrahimi 26486775U, // LDURHi 1073*9a0e4156SSadaf Ebrahimi 26486775U, // LDURQi 1074*9a0e4156SSadaf Ebrahimi 26485413U, // LDURSBWi 1075*9a0e4156SSadaf Ebrahimi 26485413U, // LDURSBXi 1076*9a0e4156SSadaf Ebrahimi 26485900U, // LDURSHWi 1077*9a0e4156SSadaf Ebrahimi 26485900U, // LDURSHXi 1078*9a0e4156SSadaf Ebrahimi 26487268U, // LDURSWi 1079*9a0e4156SSadaf Ebrahimi 26486775U, // LDURSi 1080*9a0e4156SSadaf Ebrahimi 26486775U, // LDURWi 1081*9a0e4156SSadaf Ebrahimi 26486775U, // LDURXi 1082*9a0e4156SSadaf Ebrahimi 553920343U, // LDXPW 1083*9a0e4156SSadaf Ebrahimi 553920343U, // LDXPX 1084*9a0e4156SSadaf Ebrahimi 26485366U, // LDXRB 1085*9a0e4156SSadaf Ebrahimi 26485863U, // LDXRH 1086*9a0e4156SSadaf Ebrahimi 26486794U, // LDXRW 1087*9a0e4156SSadaf Ebrahimi 26486794U, // LDXRX 1088*9a0e4156SSadaf Ebrahimi 0U, // LOADgot 1089*9a0e4156SSadaf Ebrahimi 17049003U, // LSLVWr 1090*9a0e4156SSadaf Ebrahimi 17049003U, // LSLVXr 1091*9a0e4156SSadaf Ebrahimi 17049558U, // LSRVWr 1092*9a0e4156SSadaf Ebrahimi 17049558U, // LSRVXr 1093*9a0e4156SSadaf Ebrahimi 17048395U, // MADDWrrr 1094*9a0e4156SSadaf Ebrahimi 17048395U, // MADDXrrr 1095*9a0e4156SSadaf Ebrahimi 2181050875U, // MLAv16i8 1096*9a0e4156SSadaf Ebrahimi 2718446075U, // MLAv2i32 1097*9a0e4156SSadaf Ebrahimi 2718446075U, // MLAv2i32_indexed 1098*9a0e4156SSadaf Ebrahimi 3255841275U, // MLAv4i16 1099*9a0e4156SSadaf Ebrahimi 3255841275U, // MLAv4i16_indexed 1100*9a0e4156SSadaf Ebrahimi 1108619771U, // MLAv4i32 1101*9a0e4156SSadaf Ebrahimi 1108619771U, // MLAv4i32_indexed 1102*9a0e4156SSadaf Ebrahimi 1645752827U, // MLAv8i16 1103*9a0e4156SSadaf Ebrahimi 1645752827U, // MLAv8i16_indexed 1104*9a0e4156SSadaf Ebrahimi 3793498619U, // MLAv8i8 1105*9a0e4156SSadaf Ebrahimi 2181052514U, // MLSv16i8 1106*9a0e4156SSadaf Ebrahimi 2718447714U, // MLSv2i32 1107*9a0e4156SSadaf Ebrahimi 2718447714U, // MLSv2i32_indexed 1108*9a0e4156SSadaf Ebrahimi 3255842914U, // MLSv4i16 1109*9a0e4156SSadaf Ebrahimi 3255842914U, // MLSv4i16_indexed 1110*9a0e4156SSadaf Ebrahimi 1108621410U, // MLSv4i32 1111*9a0e4156SSadaf Ebrahimi 1108621410U, // MLSv4i32_indexed 1112*9a0e4156SSadaf Ebrahimi 1645754466U, // MLSv8i16 1113*9a0e4156SSadaf Ebrahimi 1645754466U, // MLSv8i16_indexed 1114*9a0e4156SSadaf Ebrahimi 3793500258U, // MLSv8i8 1115*9a0e4156SSadaf Ebrahimi 168043698U, // MOVID 1116*9a0e4156SSadaf Ebrahimi 721425586U, // MOVIv16b_ns 1117*9a0e4156SSadaf Ebrahimi 168563890U, // MOVIv2d_ns 1118*9a0e4156SSadaf Ebrahimi 1795691698U, // MOVIv2i32 1119*9a0e4156SSadaf Ebrahimi 1795691698U, // MOVIv2s_msl 1120*9a0e4156SSadaf Ebrahimi 1796215986U, // MOVIv4i16 1121*9a0e4156SSadaf Ebrahimi 1796478130U, // MOVIv4i32 1122*9a0e4156SSadaf Ebrahimi 1796478130U, // MOVIv4s_msl 1123*9a0e4156SSadaf Ebrahimi 723260594U, // MOVIv8b_ns 1124*9a0e4156SSadaf Ebrahimi 1796740274U, // MOVIv8i16 1125*9a0e4156SSadaf Ebrahimi 84157629U, // MOVKWi 1126*9a0e4156SSadaf Ebrahimi 84157629U, // MOVKXi 1127*9a0e4156SSadaf Ebrahimi 1795434146U, // MOVNWi 1128*9a0e4156SSadaf Ebrahimi 1795434146U, // MOVNXi 1129*9a0e4156SSadaf Ebrahimi 1795435093U, // MOVZWi 1130*9a0e4156SSadaf Ebrahimi 1795435093U, // MOVZXi 1131*9a0e4156SSadaf Ebrahimi 0U, // MOVaddr 1132*9a0e4156SSadaf Ebrahimi 0U, // MOVaddrBA 1133*9a0e4156SSadaf Ebrahimi 0U, // MOVaddrCP 1134*9a0e4156SSadaf Ebrahimi 0U, // MOVaddrEXT 1135*9a0e4156SSadaf Ebrahimi 0U, // MOVaddrJT 1136*9a0e4156SSadaf Ebrahimi 0U, // MOVaddrTLS 1137*9a0e4156SSadaf Ebrahimi 0U, // MOVi32imm 1138*9a0e4156SSadaf Ebrahimi 0U, // MOVi64imm 1139*9a0e4156SSadaf Ebrahimi 201599116U, // MRS 1140*9a0e4156SSadaf Ebrahimi 137179U, // MSR 1141*9a0e4156SSadaf Ebrahimi 141275U, // MSRpstate 1142*9a0e4156SSadaf Ebrahimi 17048258U, // MSUBWrrr 1143*9a0e4156SSadaf Ebrahimi 17048258U, // MSUBXrrr 1144*9a0e4156SSadaf Ebrahimi 2147489228U, // MULv16i8 1145*9a0e4156SSadaf Ebrahimi 2684884428U, // MULv2i32 1146*9a0e4156SSadaf Ebrahimi 2684884428U, // MULv2i32_indexed 1147*9a0e4156SSadaf Ebrahimi 3222279628U, // MULv4i16 1148*9a0e4156SSadaf Ebrahimi 3222279628U, // MULv4i16_indexed 1149*9a0e4156SSadaf Ebrahimi 1075058124U, // MULv4i32 1150*9a0e4156SSadaf Ebrahimi 1075058124U, // MULv4i32_indexed 1151*9a0e4156SSadaf Ebrahimi 1612191180U, // MULv8i16 1152*9a0e4156SSadaf Ebrahimi 1612191180U, // MULv8i16_indexed 1153*9a0e4156SSadaf Ebrahimi 3759936972U, // MULv8i8 1154*9a0e4156SSadaf Ebrahimi 1795691679U, // MVNIv2i32 1155*9a0e4156SSadaf Ebrahimi 1795691679U, // MVNIv2s_msl 1156*9a0e4156SSadaf Ebrahimi 1796215967U, // MVNIv4i16 1157*9a0e4156SSadaf Ebrahimi 1796478111U, // MVNIv4i32 1158*9a0e4156SSadaf Ebrahimi 1796478111U, // MVNIv4s_msl 1159*9a0e4156SSadaf Ebrahimi 1796740255U, // MVNIv8i16 1160*9a0e4156SSadaf Ebrahimi 5076U, // NEGv16i8 1161*9a0e4156SSadaf Ebrahimi 553919444U, // NEGv1i64 1162*9a0e4156SSadaf Ebrahimi 1074271188U, // NEGv2i32 1163*9a0e4156SSadaf Ebrahimi 1611404244U, // NEGv2i64 1164*9a0e4156SSadaf Ebrahimi 2148537300U, // NEGv4i16 1165*9a0e4156SSadaf Ebrahimi 2685670356U, // NEGv4i32 1166*9a0e4156SSadaf Ebrahimi 3222803412U, // NEGv8i16 1167*9a0e4156SSadaf Ebrahimi 3759936468U, // NEGv8i8 1168*9a0e4156SSadaf Ebrahimi 6353U, // NOTv16i8 1169*9a0e4156SSadaf Ebrahimi 3759937745U, // NOTv8i8 1170*9a0e4156SSadaf Ebrahimi 0U, // ORNWrr 1171*9a0e4156SSadaf Ebrahimi 17049189U, // ORNWrs 1172*9a0e4156SSadaf Ebrahimi 0U, // ORNXrr 1173*9a0e4156SSadaf Ebrahimi 17049189U, // ORNXrs 1174*9a0e4156SSadaf Ebrahimi 2147489381U, // ORNv16i8 1175*9a0e4156SSadaf Ebrahimi 3759937125U, // ORNv8i8 1176*9a0e4156SSadaf Ebrahimi 17049548U, // ORRWri 1177*9a0e4156SSadaf Ebrahimi 0U, // ORRWrr 1178*9a0e4156SSadaf Ebrahimi 17049548U, // ORRWrs 1179*9a0e4156SSadaf Ebrahimi 17049548U, // ORRXri 1180*9a0e4156SSadaf Ebrahimi 0U, // ORRXrr 1181*9a0e4156SSadaf Ebrahimi 17049548U, // ORRXrs 1182*9a0e4156SSadaf Ebrahimi 2147489740U, // ORRv16i8 1183*9a0e4156SSadaf Ebrahimi 84424652U, // ORRv2i32 1184*9a0e4156SSadaf Ebrahimi 84948940U, // ORRv4i16 1185*9a0e4156SSadaf Ebrahimi 85211084U, // ORRv4i32 1186*9a0e4156SSadaf Ebrahimi 85473228U, // ORRv8i16 1187*9a0e4156SSadaf Ebrahimi 3759937484U, // ORRv8i8 1188*9a0e4156SSadaf Ebrahimi 2149060822U, // PMULLv16i8 1189*9a0e4156SSadaf Ebrahimi 228070797U, // PMULLv1i64 1190*9a0e4156SSadaf Ebrahimi 244846806U, // PMULLv2i64 1191*9a0e4156SSadaf Ebrahimi 3759674765U, // PMULLv8i8 1192*9a0e4156SSadaf Ebrahimi 2147489240U, // PMULv16i8 1193*9a0e4156SSadaf Ebrahimi 3759936984U, // PMULv8i8 1194*9a0e4156SSadaf Ebrahimi 101070321U, // PRFMl 1195*9a0e4156SSadaf Ebrahimi 26621425U, // PRFMroW 1196*9a0e4156SSadaf Ebrahimi 26621425U, // PRFMroX 1197*9a0e4156SSadaf Ebrahimi 26621425U, // PRFMui 1198*9a0e4156SSadaf Ebrahimi 26621455U, // PRFUMi 1199*9a0e4156SSadaf Ebrahimi 537400862U, // RADDHNv2i64_v2i32 1200*9a0e4156SSadaf Ebrahimi 571748633U, // RADDHNv2i64_v4i32 1201*9a0e4156SSadaf Ebrahimi 1074796062U, // RADDHNv4i32_v4i16 1202*9a0e4156SSadaf Ebrahimi 1108881689U, // RADDHNv4i32_v8i16 1203*9a0e4156SSadaf Ebrahimi 1644179737U, // RADDHNv8i16_v16i8 1204*9a0e4156SSadaf Ebrahimi 1612453406U, // RADDHNv8i16_v8i8 1205*9a0e4156SSadaf Ebrahimi 553920698U, // RBITWr 1206*9a0e4156SSadaf Ebrahimi 553920698U, // RBITXr 1207*9a0e4156SSadaf Ebrahimi 6330U, // RBITv16i8 1208*9a0e4156SSadaf Ebrahimi 3759937722U, // RBITv8i8 1209*9a0e4156SSadaf Ebrahimi 2107559U, // RET 1210*9a0e4156SSadaf Ebrahimi 0U, // RET_ReallyLR 1211*9a0e4156SSadaf Ebrahimi 553918951U, // REV16Wr 1212*9a0e4156SSadaf Ebrahimi 553918951U, // REV16Xr 1213*9a0e4156SSadaf Ebrahimi 4583U, // REV16v16i8 1214*9a0e4156SSadaf Ebrahimi 3759935975U, // REV16v8i8 1215*9a0e4156SSadaf Ebrahimi 553918540U, // REV32Xr 1216*9a0e4156SSadaf Ebrahimi 4172U, // REV32v16i8 1217*9a0e4156SSadaf Ebrahimi 2148536396U, // REV32v4i16 1218*9a0e4156SSadaf Ebrahimi 3222802508U, // REV32v8i16 1219*9a0e4156SSadaf Ebrahimi 3759935564U, // REV32v8i8 1220*9a0e4156SSadaf Ebrahimi 4566U, // REV64v16i8 1221*9a0e4156SSadaf Ebrahimi 1074270678U, // REV64v2i32 1222*9a0e4156SSadaf Ebrahimi 2148536790U, // REV64v4i16 1223*9a0e4156SSadaf Ebrahimi 2685669846U, // REV64v4i32 1224*9a0e4156SSadaf Ebrahimi 3222802902U, // REV64v8i16 1225*9a0e4156SSadaf Ebrahimi 3759935958U, // REV64v8i8 1226*9a0e4156SSadaf Ebrahimi 553920805U, // REVWr 1227*9a0e4156SSadaf Ebrahimi 553920805U, // REVXr 1228*9a0e4156SSadaf Ebrahimi 17049543U, // RORVWr 1229*9a0e4156SSadaf Ebrahimi 17049543U, // RORVXr 1230*9a0e4156SSadaf Ebrahimi 1644179766U, // RSHRNv16i8_shift 1231*9a0e4156SSadaf Ebrahimi 537400917U, // RSHRNv2i32_shift 1232*9a0e4156SSadaf Ebrahimi 1074796117U, // RSHRNv4i16_shift 1233*9a0e4156SSadaf Ebrahimi 571748662U, // RSHRNv4i32_shift 1234*9a0e4156SSadaf Ebrahimi 1108881718U, // RSHRNv8i16_shift 1235*9a0e4156SSadaf Ebrahimi 1612453461U, // RSHRNv8i8_shift 1236*9a0e4156SSadaf Ebrahimi 537400854U, // RSUBHNv2i64_v2i32 1237*9a0e4156SSadaf Ebrahimi 571748624U, // RSUBHNv2i64_v4i32 1238*9a0e4156SSadaf Ebrahimi 1074796054U, // RSUBHNv4i32_v4i16 1239*9a0e4156SSadaf Ebrahimi 1108881680U, // RSUBHNv4i32_v8i16 1240*9a0e4156SSadaf Ebrahimi 1644179728U, // RSUBHNv8i16_v16i8 1241*9a0e4156SSadaf Ebrahimi 1612453398U, // RSUBHNv8i16_v8i8 1242*9a0e4156SSadaf Ebrahimi 2182623330U, // SABALv16i8_v8i16 1243*9a0e4156SSadaf Ebrahimi 2718708931U, // SABALv2i32_v2i64 1244*9a0e4156SSadaf Ebrahimi 3256104131U, // SABALv4i16_v4i32 1245*9a0e4156SSadaf Ebrahimi 1108095074U, // SABALv4i32_v2i64 1246*9a0e4156SSadaf Ebrahimi 1645490274U, // SABALv8i16_v4i32 1247*9a0e4156SSadaf Ebrahimi 3793237187U, // SABALv8i8_v8i16 1248*9a0e4156SSadaf Ebrahimi 2181050862U, // SABAv16i8 1249*9a0e4156SSadaf Ebrahimi 2718446062U, // SABAv2i32 1250*9a0e4156SSadaf Ebrahimi 3255841262U, // SABAv4i16 1251*9a0e4156SSadaf Ebrahimi 1108619758U, // SABAv4i32 1252*9a0e4156SSadaf Ebrahimi 1645752814U, // SABAv8i16 1253*9a0e4156SSadaf Ebrahimi 3793498606U, // SABAv8i8 1254*9a0e4156SSadaf Ebrahimi 2149060764U, // SABDLv16i8_v8i16 1255*9a0e4156SSadaf Ebrahimi 2685146379U, // SABDLv2i32_v2i64 1256*9a0e4156SSadaf Ebrahimi 3222541579U, // SABDLv4i16_v4i32 1257*9a0e4156SSadaf Ebrahimi 1074532508U, // SABDLv4i32_v2i64 1258*9a0e4156SSadaf Ebrahimi 1611927708U, // SABDLv8i16_v4i32 1259*9a0e4156SSadaf Ebrahimi 3759674635U, // SABDLv8i8_v8i16 1260*9a0e4156SSadaf Ebrahimi 2147488538U, // SABDv16i8 1261*9a0e4156SSadaf Ebrahimi 2684883738U, // SABDv2i32 1262*9a0e4156SSadaf Ebrahimi 3222278938U, // SABDv4i16 1263*9a0e4156SSadaf Ebrahimi 1075057434U, // SABDv4i32 1264*9a0e4156SSadaf Ebrahimi 1612190490U, // SABDv8i16 1265*9a0e4156SSadaf Ebrahimi 3759936282U, // SABDv8i8 1266*9a0e4156SSadaf Ebrahimi 35141315U, // SADALPv16i8_v8i16 1267*9a0e4156SSadaf Ebrahimi 1117533891U, // SADALPv2i32_v1i64 1268*9a0e4156SSadaf Ebrahimi 2181576387U, // SADALPv4i16_v2i32 1269*9a0e4156SSadaf Ebrahimi 2718709443U, // SADALPv4i32_v2i64 1270*9a0e4156SSadaf Ebrahimi 3256104643U, // SADALPv8i16_v4i32 1271*9a0e4156SSadaf Ebrahimi 3792713411U, // SADALPv8i8_v4i16 1272*9a0e4156SSadaf Ebrahimi 1578707U, // SADDLPv16i8_v8i16 1273*9a0e4156SSadaf Ebrahimi 1083971283U, // SADDLPv2i32_v1i64 1274*9a0e4156SSadaf Ebrahimi 2148013779U, // SADDLPv4i16_v2i32 1275*9a0e4156SSadaf Ebrahimi 2685146835U, // SADDLPv4i32_v2i64 1276*9a0e4156SSadaf Ebrahimi 3222542035U, // SADDLPv8i16_v4i32 1277*9a0e4156SSadaf Ebrahimi 3759150803U, // SADDLPv8i8_v4i16 1278*9a0e4156SSadaf Ebrahimi 272700U, // SADDLVv16i8v 1279*9a0e4156SSadaf Ebrahimi 2147756348U, // SADDLVv4i16v 1280*9a0e4156SSadaf Ebrahimi 2684627260U, // SADDLVv4i32v 1281*9a0e4156SSadaf Ebrahimi 3221498172U, // SADDLVv8i16v 1282*9a0e4156SSadaf Ebrahimi 3758369084U, // SADDLVv8i8v 1283*9a0e4156SSadaf Ebrahimi 2149060780U, // SADDLv16i8_v8i16 1284*9a0e4156SSadaf Ebrahimi 2685146409U, // SADDLv2i32_v2i64 1285*9a0e4156SSadaf Ebrahimi 3222541609U, // SADDLv4i16_v4i32 1286*9a0e4156SSadaf Ebrahimi 1074532524U, // SADDLv4i32_v2i64 1287*9a0e4156SSadaf Ebrahimi 1611927724U, // SADDLv8i16_v4i32 1288*9a0e4156SSadaf Ebrahimi 3759674665U, // SADDLv8i8_v8i16 1289*9a0e4156SSadaf Ebrahimi 1612190133U, // SADDWv16i8_v8i16 1290*9a0e4156SSadaf Ebrahimi 537663936U, // SADDWv2i32_v2i64 1291*9a0e4156SSadaf Ebrahimi 1075059136U, // SADDWv4i16_v4i32 1292*9a0e4156SSadaf Ebrahimi 537661877U, // SADDWv4i32_v2i64 1293*9a0e4156SSadaf Ebrahimi 1075057077U, // SADDWv8i16_v4i32 1294*9a0e4156SSadaf Ebrahimi 1612192192U, // SADDWv8i8_v8i16 1295*9a0e4156SSadaf Ebrahimi 17049656U, // SBCSWr 1296*9a0e4156SSadaf Ebrahimi 17049656U, // SBCSXr 1297*9a0e4156SSadaf Ebrahimi 17048293U, // SBCWr 1298*9a0e4156SSadaf Ebrahimi 17048293U, // SBCXr 1299*9a0e4156SSadaf Ebrahimi 17049061U, // SBFMWri 1300*9a0e4156SSadaf Ebrahimi 17049061U, // SBFMXri 1301*9a0e4156SSadaf Ebrahimi 17048517U, // SCVTFSWDri 1302*9a0e4156SSadaf Ebrahimi 17048517U, // SCVTFSWSri 1303*9a0e4156SSadaf Ebrahimi 17048517U, // SCVTFSXDri 1304*9a0e4156SSadaf Ebrahimi 17048517U, // SCVTFSXSri 1305*9a0e4156SSadaf Ebrahimi 553919429U, // SCVTFUWDri 1306*9a0e4156SSadaf Ebrahimi 553919429U, // SCVTFUWSri 1307*9a0e4156SSadaf Ebrahimi 553919429U, // SCVTFUXDri 1308*9a0e4156SSadaf Ebrahimi 553919429U, // SCVTFUXSri 1309*9a0e4156SSadaf Ebrahimi 17048517U, // SCVTFd 1310*9a0e4156SSadaf Ebrahimi 17048517U, // SCVTFs 1311*9a0e4156SSadaf Ebrahimi 553919429U, // SCVTFv1i32 1312*9a0e4156SSadaf Ebrahimi 553919429U, // SCVTFv1i64 1313*9a0e4156SSadaf Ebrahimi 1074271173U, // SCVTFv2f32 1314*9a0e4156SSadaf Ebrahimi 1611404229U, // SCVTFv2f64 1315*9a0e4156SSadaf Ebrahimi 2684883909U, // SCVTFv2i32_shift 1316*9a0e4156SSadaf Ebrahimi 537662405U, // SCVTFv2i64_shift 1317*9a0e4156SSadaf Ebrahimi 2685670341U, // SCVTFv4f32 1318*9a0e4156SSadaf Ebrahimi 1075057605U, // SCVTFv4i32_shift 1319*9a0e4156SSadaf Ebrahimi 17049904U, // SDIVWr 1320*9a0e4156SSadaf Ebrahimi 17049904U, // SDIVXr 1321*9a0e4156SSadaf Ebrahimi 17049904U, // SDIV_IntWr 1322*9a0e4156SSadaf Ebrahimi 17049904U, // SDIV_IntXr 1323*9a0e4156SSadaf Ebrahimi 67404510U, // SHA1Crrr 1324*9a0e4156SSadaf Ebrahimi 553919463U, // SHA1Hrr 1325*9a0e4156SSadaf Ebrahimi 67405278U, // SHA1Mrrr 1326*9a0e4156SSadaf Ebrahimi 67405488U, // SHA1Prrr 1327*9a0e4156SSadaf Ebrahimi 1108619265U, // SHA1SU0rrr 1328*9a0e4156SSadaf Ebrahimi 2719232056U, // SHA1SU1rr 1329*9a0e4156SSadaf Ebrahimi 67403864U, // SHA256H2rrr 1330*9a0e4156SSadaf Ebrahimi 67404790U, // SHA256Hrrr 1331*9a0e4156SSadaf Ebrahimi 2719232010U, // SHA256SU0rr 1332*9a0e4156SSadaf Ebrahimi 1108619329U, // SHA256SU1rrr 1333*9a0e4156SSadaf Ebrahimi 2147488572U, // SHADDv16i8 1334*9a0e4156SSadaf Ebrahimi 2684883772U, // SHADDv2i32 1335*9a0e4156SSadaf Ebrahimi 3222278972U, // SHADDv4i16 1336*9a0e4156SSadaf Ebrahimi 1075057468U, // SHADDv4i32 1337*9a0e4156SSadaf Ebrahimi 1612190524U, // SHADDv8i16 1338*9a0e4156SSadaf Ebrahimi 3759936316U, // SHADDv8i8 1339*9a0e4156SSadaf Ebrahimi 2149060797U, // SHLLv16i8 1340*9a0e4156SSadaf Ebrahimi 2685146487U, // SHLLv2i32 1341*9a0e4156SSadaf Ebrahimi 3222541687U, // SHLLv4i16 1342*9a0e4156SSadaf Ebrahimi 3758887101U, // SHLLv4i32 1343*9a0e4156SSadaf Ebrahimi 1315005U, // SHLLv8i16 1344*9a0e4156SSadaf Ebrahimi 538449271U, // SHLLv8i8 1345*9a0e4156SSadaf Ebrahimi 17048896U, // SHLd 1346*9a0e4156SSadaf Ebrahimi 2147489088U, // SHLv16i8_shift 1347*9a0e4156SSadaf Ebrahimi 2684884288U, // SHLv2i32_shift 1348*9a0e4156SSadaf Ebrahimi 537662784U, // SHLv2i64_shift 1349*9a0e4156SSadaf Ebrahimi 3222279488U, // SHLv4i16_shift 1350*9a0e4156SSadaf Ebrahimi 1075057984U, // SHLv4i32_shift 1351*9a0e4156SSadaf Ebrahimi 1612191040U, // SHLv8i16_shift 1352*9a0e4156SSadaf Ebrahimi 3759936832U, // SHLv8i8_shift 1353*9a0e4156SSadaf Ebrahimi 1644179748U, // SHRNv16i8_shift 1354*9a0e4156SSadaf Ebrahimi 537400901U, // SHRNv2i32_shift 1355*9a0e4156SSadaf Ebrahimi 1074796101U, // SHRNv4i16_shift 1356*9a0e4156SSadaf Ebrahimi 571748644U, // SHRNv4i32_shift 1357*9a0e4156SSadaf Ebrahimi 1108881700U, // SHRNv8i16_shift 1358*9a0e4156SSadaf Ebrahimi 1612453445U, // SHRNv8i8_shift 1359*9a0e4156SSadaf Ebrahimi 2147488435U, // SHSUBv16i8 1360*9a0e4156SSadaf Ebrahimi 2684883635U, // SHSUBv2i32 1361*9a0e4156SSadaf Ebrahimi 3222278835U, // SHSUBv4i16 1362*9a0e4156SSadaf Ebrahimi 1075057331U, // SHSUBv4i32 1363*9a0e4156SSadaf Ebrahimi 1612190387U, // SHSUBv8i16 1364*9a0e4156SSadaf Ebrahimi 3759936179U, // SHSUBv8i8 1365*9a0e4156SSadaf Ebrahimi 67404954U, // SLId 1366*9a0e4156SSadaf Ebrahimi 2181051546U, // SLIv16i8_shift 1367*9a0e4156SSadaf Ebrahimi 2718446746U, // SLIv2i32_shift 1368*9a0e4156SSadaf Ebrahimi 571225242U, // SLIv2i64_shift 1369*9a0e4156SSadaf Ebrahimi 3255841946U, // SLIv4i16_shift 1370*9a0e4156SSadaf Ebrahimi 1108620442U, // SLIv4i32_shift 1371*9a0e4156SSadaf Ebrahimi 1645753498U, // SLIv8i16_shift 1372*9a0e4156SSadaf Ebrahimi 3793499290U, // SLIv8i8_shift 1373*9a0e4156SSadaf Ebrahimi 17048857U, // SMADDLrrr 1374*9a0e4156SSadaf Ebrahimi 2147489609U, // SMAXPv16i8 1375*9a0e4156SSadaf Ebrahimi 2684884809U, // SMAXPv2i32 1376*9a0e4156SSadaf Ebrahimi 3222280009U, // SMAXPv4i16 1377*9a0e4156SSadaf Ebrahimi 1075058505U, // SMAXPv4i32 1378*9a0e4156SSadaf Ebrahimi 1612191561U, // SMAXPv8i16 1379*9a0e4156SSadaf Ebrahimi 3759937353U, // SMAXPv8i8 1380*9a0e4156SSadaf Ebrahimi 272787U, // SMAXVv16i8v 1381*9a0e4156SSadaf Ebrahimi 2147756435U, // SMAXVv4i16v 1382*9a0e4156SSadaf Ebrahimi 2684627347U, // SMAXVv4i32v 1383*9a0e4156SSadaf Ebrahimi 3221498259U, // SMAXVv8i16v 1384*9a0e4156SSadaf Ebrahimi 3758369171U, // SMAXVv8i8v 1385*9a0e4156SSadaf Ebrahimi 2147490298U, // SMAXv16i8 1386*9a0e4156SSadaf Ebrahimi 2684885498U, // SMAXv2i32 1387*9a0e4156SSadaf Ebrahimi 3222280698U, // SMAXv4i16 1388*9a0e4156SSadaf Ebrahimi 1075059194U, // SMAXv4i32 1389*9a0e4156SSadaf Ebrahimi 1612192250U, // SMAXv8i16 1390*9a0e4156SSadaf Ebrahimi 3759938042U, // SMAXv8i8 1391*9a0e4156SSadaf Ebrahimi 21246U, // SMC 1392*9a0e4156SSadaf Ebrahimi 2147489551U, // SMINPv16i8 1393*9a0e4156SSadaf Ebrahimi 2684884751U, // SMINPv2i32 1394*9a0e4156SSadaf Ebrahimi 3222279951U, // SMINPv4i16 1395*9a0e4156SSadaf Ebrahimi 1075058447U, // SMINPv4i32 1396*9a0e4156SSadaf Ebrahimi 1612191503U, // SMINPv8i16 1397*9a0e4156SSadaf Ebrahimi 3759937295U, // SMINPv8i8 1398*9a0e4156SSadaf Ebrahimi 272741U, // SMINVv16i8v 1399*9a0e4156SSadaf Ebrahimi 2147756389U, // SMINVv4i16v 1400*9a0e4156SSadaf Ebrahimi 2684627301U, // SMINVv4i32v 1401*9a0e4156SSadaf Ebrahimi 3221498213U, // SMINVv8i16v 1402*9a0e4156SSadaf Ebrahimi 3758369125U, // SMINVv8i8v 1403*9a0e4156SSadaf Ebrahimi 2147489324U, // SMINv16i8 1404*9a0e4156SSadaf Ebrahimi 2684884524U, // SMINv2i32 1405*9a0e4156SSadaf Ebrahimi 3222279724U, // SMINv4i16 1406*9a0e4156SSadaf Ebrahimi 1075058220U, // SMINv4i32 1407*9a0e4156SSadaf Ebrahimi 1612191276U, // SMINv8i16 1408*9a0e4156SSadaf Ebrahimi 3759937068U, // SMINv8i8 1409*9a0e4156SSadaf Ebrahimi 2182623356U, // SMLALv16i8_v8i16 1410*9a0e4156SSadaf Ebrahimi 2718708954U, // SMLALv2i32_indexed 1411*9a0e4156SSadaf Ebrahimi 2718708954U, // SMLALv2i32_v2i64 1412*9a0e4156SSadaf Ebrahimi 3256104154U, // SMLALv4i16_indexed 1413*9a0e4156SSadaf Ebrahimi 3256104154U, // SMLALv4i16_v4i32 1414*9a0e4156SSadaf Ebrahimi 1108095100U, // SMLALv4i32_indexed 1415*9a0e4156SSadaf Ebrahimi 1108095100U, // SMLALv4i32_v2i64 1416*9a0e4156SSadaf Ebrahimi 1645490300U, // SMLALv8i16_indexed 1417*9a0e4156SSadaf Ebrahimi 1645490300U, // SMLALv8i16_v4i32 1418*9a0e4156SSadaf Ebrahimi 3793237210U, // SMLALv8i8_v8i16 1419*9a0e4156SSadaf Ebrahimi 2182623480U, // SMLSLv16i8_v8i16 1420*9a0e4156SSadaf Ebrahimi 2718709168U, // SMLSLv2i32_indexed 1421*9a0e4156SSadaf Ebrahimi 2718709168U, // SMLSLv2i32_v2i64 1422*9a0e4156SSadaf Ebrahimi 3256104368U, // SMLSLv4i16_indexed 1423*9a0e4156SSadaf Ebrahimi 3256104368U, // SMLSLv4i16_v4i32 1424*9a0e4156SSadaf Ebrahimi 1108095224U, // SMLSLv4i32_indexed 1425*9a0e4156SSadaf Ebrahimi 1108095224U, // SMLSLv4i32_v2i64 1426*9a0e4156SSadaf Ebrahimi 1645490424U, // SMLSLv8i16_indexed 1427*9a0e4156SSadaf Ebrahimi 1645490424U, // SMLSLv8i16_v4i32 1428*9a0e4156SSadaf Ebrahimi 3793237424U, // SMLSLv8i8_v8i16 1429*9a0e4156SSadaf Ebrahimi 272768U, // SMOVvi16to32 1430*9a0e4156SSadaf Ebrahimi 272768U, // SMOVvi16to64 1431*9a0e4156SSadaf Ebrahimi 537143680U, // SMOVvi32to64 1432*9a0e4156SSadaf Ebrahimi 1610885504U, // SMOVvi8to32 1433*9a0e4156SSadaf Ebrahimi 1610885504U, // SMOVvi8to64 1434*9a0e4156SSadaf Ebrahimi 17048813U, // SMSUBLrrr 1435*9a0e4156SSadaf Ebrahimi 17048603U, // SMULHrr 1436*9a0e4156SSadaf Ebrahimi 2149060830U, // SMULLv16i8_v8i16 1437*9a0e4156SSadaf Ebrahimi 2685146516U, // SMULLv2i32_indexed 1438*9a0e4156SSadaf Ebrahimi 2685146516U, // SMULLv2i32_v2i64 1439*9a0e4156SSadaf Ebrahimi 3222541716U, // SMULLv4i16_indexed 1440*9a0e4156SSadaf Ebrahimi 3222541716U, // SMULLv4i16_v4i32 1441*9a0e4156SSadaf Ebrahimi 1074532574U, // SMULLv4i32_indexed 1442*9a0e4156SSadaf Ebrahimi 1074532574U, // SMULLv4i32_v2i64 1443*9a0e4156SSadaf Ebrahimi 1611927774U, // SMULLv8i16_indexed 1444*9a0e4156SSadaf Ebrahimi 1611927774U, // SMULLv8i16_v4i32 1445*9a0e4156SSadaf Ebrahimi 3759674772U, // SMULLv8i8_v8i16 1446*9a0e4156SSadaf Ebrahimi 6187U, // SQABSv16i8 1447*9a0e4156SSadaf Ebrahimi 553920555U, // SQABSv1i16 1448*9a0e4156SSadaf Ebrahimi 553920555U, // SQABSv1i32 1449*9a0e4156SSadaf Ebrahimi 553920555U, // SQABSv1i64 1450*9a0e4156SSadaf Ebrahimi 553920555U, // SQABSv1i8 1451*9a0e4156SSadaf Ebrahimi 1074272299U, // SQABSv2i32 1452*9a0e4156SSadaf Ebrahimi 1611405355U, // SQABSv2i64 1453*9a0e4156SSadaf Ebrahimi 2148538411U, // SQABSv4i16 1454*9a0e4156SSadaf Ebrahimi 2685671467U, // SQABSv4i32 1455*9a0e4156SSadaf Ebrahimi 3222804523U, // SQABSv8i16 1456*9a0e4156SSadaf Ebrahimi 3759937579U, // SQABSv8i8 1457*9a0e4156SSadaf Ebrahimi 2147488602U, // SQADDv16i8 1458*9a0e4156SSadaf Ebrahimi 17048410U, // SQADDv1i16 1459*9a0e4156SSadaf Ebrahimi 17048410U, // SQADDv1i32 1460*9a0e4156SSadaf Ebrahimi 17048410U, // SQADDv1i64 1461*9a0e4156SSadaf Ebrahimi 17048410U, // SQADDv1i8 1462*9a0e4156SSadaf Ebrahimi 2684883802U, // SQADDv2i32 1463*9a0e4156SSadaf Ebrahimi 537662298U, // SQADDv2i64 1464*9a0e4156SSadaf Ebrahimi 3222279002U, // SQADDv4i16 1465*9a0e4156SSadaf Ebrahimi 1075057498U, // SQADDv4i32 1466*9a0e4156SSadaf Ebrahimi 1612190554U, // SQADDv8i16 1467*9a0e4156SSadaf Ebrahimi 3759936346U, // SQADDv8i8 1468*9a0e4156SSadaf Ebrahimi 67405009U, // SQDMLALi16 1469*9a0e4156SSadaf Ebrahimi 67405009U, // SQDMLALi32 1470*9a0e4156SSadaf Ebrahimi 67405009U, // SQDMLALv1i32_indexed 1471*9a0e4156SSadaf Ebrahimi 67405009U, // SQDMLALv1i64_indexed 1472*9a0e4156SSadaf Ebrahimi 2718708945U, // SQDMLALv2i32_indexed 1473*9a0e4156SSadaf Ebrahimi 2718708945U, // SQDMLALv2i32_v2i64 1474*9a0e4156SSadaf Ebrahimi 3256104145U, // SQDMLALv4i16_indexed 1475*9a0e4156SSadaf Ebrahimi 3256104145U, // SQDMLALv4i16_v4i32 1476*9a0e4156SSadaf Ebrahimi 1108095090U, // SQDMLALv4i32_indexed 1477*9a0e4156SSadaf Ebrahimi 1108095090U, // SQDMLALv4i32_v2i64 1478*9a0e4156SSadaf Ebrahimi 1645490290U, // SQDMLALv8i16_indexed 1479*9a0e4156SSadaf Ebrahimi 1645490290U, // SQDMLALv8i16_v4i32 1480*9a0e4156SSadaf Ebrahimi 67405223U, // SQDMLSLi16 1481*9a0e4156SSadaf Ebrahimi 67405223U, // SQDMLSLi32 1482*9a0e4156SSadaf Ebrahimi 67405223U, // SQDMLSLv1i32_indexed 1483*9a0e4156SSadaf Ebrahimi 67405223U, // SQDMLSLv1i64_indexed 1484*9a0e4156SSadaf Ebrahimi 2718709159U, // SQDMLSLv2i32_indexed 1485*9a0e4156SSadaf Ebrahimi 2718709159U, // SQDMLSLv2i32_v2i64 1486*9a0e4156SSadaf Ebrahimi 3256104359U, // SQDMLSLv4i16_indexed 1487*9a0e4156SSadaf Ebrahimi 3256104359U, // SQDMLSLv4i16_v4i32 1488*9a0e4156SSadaf Ebrahimi 1108095214U, // SQDMLSLv4i32_indexed 1489*9a0e4156SSadaf Ebrahimi 1108095214U, // SQDMLSLv4i32_v2i64 1490*9a0e4156SSadaf Ebrahimi 1645490414U, // SQDMLSLv8i16_indexed 1491*9a0e4156SSadaf Ebrahimi 1645490414U, // SQDMLSLv8i16_v4i32 1492*9a0e4156SSadaf Ebrahimi 17048584U, // SQDMULHv1i16 1493*9a0e4156SSadaf Ebrahimi 17048584U, // SQDMULHv1i16_indexed 1494*9a0e4156SSadaf Ebrahimi 17048584U, // SQDMULHv1i32 1495*9a0e4156SSadaf Ebrahimi 17048584U, // SQDMULHv1i32_indexed 1496*9a0e4156SSadaf Ebrahimi 2684883976U, // SQDMULHv2i32 1497*9a0e4156SSadaf Ebrahimi 2684883976U, // SQDMULHv2i32_indexed 1498*9a0e4156SSadaf Ebrahimi 3222279176U, // SQDMULHv4i16 1499*9a0e4156SSadaf Ebrahimi 3222279176U, // SQDMULHv4i16_indexed 1500*9a0e4156SSadaf Ebrahimi 1075057672U, // SQDMULHv4i32 1501*9a0e4156SSadaf Ebrahimi 1075057672U, // SQDMULHv4i32_indexed 1502*9a0e4156SSadaf Ebrahimi 1612190728U, // SQDMULHv8i16 1503*9a0e4156SSadaf Ebrahimi 1612190728U, // SQDMULHv8i16_indexed 1504*9a0e4156SSadaf Ebrahimi 17048964U, // SQDMULLi16 1505*9a0e4156SSadaf Ebrahimi 17048964U, // SQDMULLi32 1506*9a0e4156SSadaf Ebrahimi 17048964U, // SQDMULLv1i32_indexed 1507*9a0e4156SSadaf Ebrahimi 17048964U, // SQDMULLv1i64_indexed 1508*9a0e4156SSadaf Ebrahimi 2685146500U, // SQDMULLv2i32_indexed 1509*9a0e4156SSadaf Ebrahimi 2685146500U, // SQDMULLv2i32_v2i64 1510*9a0e4156SSadaf Ebrahimi 3222541700U, // SQDMULLv4i16_indexed 1511*9a0e4156SSadaf Ebrahimi 3222541700U, // SQDMULLv4i16_v4i32 1512*9a0e4156SSadaf Ebrahimi 1074532556U, // SQDMULLv4i32_indexed 1513*9a0e4156SSadaf Ebrahimi 1074532556U, // SQDMULLv4i32_v2i64 1514*9a0e4156SSadaf Ebrahimi 1611927756U, // SQDMULLv8i16_indexed 1515*9a0e4156SSadaf Ebrahimi 1611927756U, // SQDMULLv8i16_v4i32 1516*9a0e4156SSadaf Ebrahimi 5081U, // SQNEGv16i8 1517*9a0e4156SSadaf Ebrahimi 553919449U, // SQNEGv1i16 1518*9a0e4156SSadaf Ebrahimi 553919449U, // SQNEGv1i32 1519*9a0e4156SSadaf Ebrahimi 553919449U, // SQNEGv1i64 1520*9a0e4156SSadaf Ebrahimi 553919449U, // SQNEGv1i8 1521*9a0e4156SSadaf Ebrahimi 1074271193U, // SQNEGv2i32 1522*9a0e4156SSadaf Ebrahimi 1611404249U, // SQNEGv2i64 1523*9a0e4156SSadaf Ebrahimi 2148537305U, // SQNEGv4i16 1524*9a0e4156SSadaf Ebrahimi 2685670361U, // SQNEGv4i32 1525*9a0e4156SSadaf Ebrahimi 3222803417U, // SQNEGv8i16 1526*9a0e4156SSadaf Ebrahimi 3759936473U, // SQNEGv8i8 1527*9a0e4156SSadaf Ebrahimi 17048593U, // SQRDMULHv1i16 1528*9a0e4156SSadaf Ebrahimi 17048593U, // SQRDMULHv1i16_indexed 1529*9a0e4156SSadaf Ebrahimi 17048593U, // SQRDMULHv1i32 1530*9a0e4156SSadaf Ebrahimi 17048593U, // SQRDMULHv1i32_indexed 1531*9a0e4156SSadaf Ebrahimi 2684883985U, // SQRDMULHv2i32 1532*9a0e4156SSadaf Ebrahimi 2684883985U, // SQRDMULHv2i32_indexed 1533*9a0e4156SSadaf Ebrahimi 3222279185U, // SQRDMULHv4i16 1534*9a0e4156SSadaf Ebrahimi 3222279185U, // SQRDMULHv4i16_indexed 1535*9a0e4156SSadaf Ebrahimi 1075057681U, // SQRDMULHv4i32 1536*9a0e4156SSadaf Ebrahimi 1075057681U, // SQRDMULHv4i32_indexed 1537*9a0e4156SSadaf Ebrahimi 1612190737U, // SQRDMULHv8i16 1538*9a0e4156SSadaf Ebrahimi 1612190737U, // SQRDMULHv8i16_indexed 1539*9a0e4156SSadaf Ebrahimi 2147489100U, // SQRSHLv16i8 1540*9a0e4156SSadaf Ebrahimi 17048908U, // SQRSHLv1i16 1541*9a0e4156SSadaf Ebrahimi 17048908U, // SQRSHLv1i32 1542*9a0e4156SSadaf Ebrahimi 17048908U, // SQRSHLv1i64 1543*9a0e4156SSadaf Ebrahimi 17048908U, // SQRSHLv1i8 1544*9a0e4156SSadaf Ebrahimi 2684884300U, // SQRSHLv2i32 1545*9a0e4156SSadaf Ebrahimi 537662796U, // SQRSHLv2i64 1546*9a0e4156SSadaf Ebrahimi 3222279500U, // SQRSHLv4i16 1547*9a0e4156SSadaf Ebrahimi 1075057996U, // SQRSHLv4i32 1548*9a0e4156SSadaf Ebrahimi 1612191052U, // SQRSHLv8i16 1549*9a0e4156SSadaf Ebrahimi 3759936844U, // SQRSHLv8i8 1550*9a0e4156SSadaf Ebrahimi 17049171U, // SQRSHRNb 1551*9a0e4156SSadaf Ebrahimi 17049171U, // SQRSHRNh 1552*9a0e4156SSadaf Ebrahimi 17049171U, // SQRSHRNs 1553*9a0e4156SSadaf Ebrahimi 1644179764U, // SQRSHRNv16i8_shift 1554*9a0e4156SSadaf Ebrahimi 537400915U, // SQRSHRNv2i32_shift 1555*9a0e4156SSadaf Ebrahimi 1074796115U, // SQRSHRNv4i16_shift 1556*9a0e4156SSadaf Ebrahimi 571748660U, // SQRSHRNv4i32_shift 1557*9a0e4156SSadaf Ebrahimi 1108881716U, // SQRSHRNv8i16_shift 1558*9a0e4156SSadaf Ebrahimi 1612453459U, // SQRSHRNv8i8_shift 1559*9a0e4156SSadaf Ebrahimi 17049232U, // SQRSHRUNb 1560*9a0e4156SSadaf Ebrahimi 17049232U, // SQRSHRUNh 1561*9a0e4156SSadaf Ebrahimi 17049232U, // SQRSHRUNs 1562*9a0e4156SSadaf Ebrahimi 1644179824U, // SQRSHRUNv16i8_shift 1563*9a0e4156SSadaf Ebrahimi 537400976U, // SQRSHRUNv2i32_shift 1564*9a0e4156SSadaf Ebrahimi 1074796176U, // SQRSHRUNv4i16_shift 1565*9a0e4156SSadaf Ebrahimi 571748720U, // SQRSHRUNv4i32_shift 1566*9a0e4156SSadaf Ebrahimi 1108881776U, // SQRSHRUNv8i16_shift 1567*9a0e4156SSadaf Ebrahimi 1612453520U, // SQRSHRUNv8i8_shift 1568*9a0e4156SSadaf Ebrahimi 17049847U, // SQSHLUb 1569*9a0e4156SSadaf Ebrahimi 17049847U, // SQSHLUd 1570*9a0e4156SSadaf Ebrahimi 17049847U, // SQSHLUh 1571*9a0e4156SSadaf Ebrahimi 17049847U, // SQSHLUs 1572*9a0e4156SSadaf Ebrahimi 2147490039U, // SQSHLUv16i8_shift 1573*9a0e4156SSadaf Ebrahimi 2684885239U, // SQSHLUv2i32_shift 1574*9a0e4156SSadaf Ebrahimi 537663735U, // SQSHLUv2i64_shift 1575*9a0e4156SSadaf Ebrahimi 3222280439U, // SQSHLUv4i16_shift 1576*9a0e4156SSadaf Ebrahimi 1075058935U, // SQSHLUv4i32_shift 1577*9a0e4156SSadaf Ebrahimi 1612191991U, // SQSHLUv8i16_shift 1578*9a0e4156SSadaf Ebrahimi 3759937783U, // SQSHLUv8i8_shift 1579*9a0e4156SSadaf Ebrahimi 17048894U, // SQSHLb 1580*9a0e4156SSadaf Ebrahimi 17048894U, // SQSHLd 1581*9a0e4156SSadaf Ebrahimi 17048894U, // SQSHLh 1582*9a0e4156SSadaf Ebrahimi 17048894U, // SQSHLs 1583*9a0e4156SSadaf Ebrahimi 2147489086U, // SQSHLv16i8 1584*9a0e4156SSadaf Ebrahimi 2147489086U, // SQSHLv16i8_shift 1585*9a0e4156SSadaf Ebrahimi 17048894U, // SQSHLv1i16 1586*9a0e4156SSadaf Ebrahimi 17048894U, // SQSHLv1i32 1587*9a0e4156SSadaf Ebrahimi 17048894U, // SQSHLv1i64 1588*9a0e4156SSadaf Ebrahimi 17048894U, // SQSHLv1i8 1589*9a0e4156SSadaf Ebrahimi 2684884286U, // SQSHLv2i32 1590*9a0e4156SSadaf Ebrahimi 2684884286U, // SQSHLv2i32_shift 1591*9a0e4156SSadaf Ebrahimi 537662782U, // SQSHLv2i64 1592*9a0e4156SSadaf Ebrahimi 537662782U, // SQSHLv2i64_shift 1593*9a0e4156SSadaf Ebrahimi 3222279486U, // SQSHLv4i16 1594*9a0e4156SSadaf Ebrahimi 3222279486U, // SQSHLv4i16_shift 1595*9a0e4156SSadaf Ebrahimi 1075057982U, // SQSHLv4i32 1596*9a0e4156SSadaf Ebrahimi 1075057982U, // SQSHLv4i32_shift 1597*9a0e4156SSadaf Ebrahimi 1612191038U, // SQSHLv8i16 1598*9a0e4156SSadaf Ebrahimi 1612191038U, // SQSHLv8i16_shift 1599*9a0e4156SSadaf Ebrahimi 3759936830U, // SQSHLv8i8 1600*9a0e4156SSadaf Ebrahimi 3759936830U, // SQSHLv8i8_shift 1601*9a0e4156SSadaf Ebrahimi 17049155U, // SQSHRNb 1602*9a0e4156SSadaf Ebrahimi 17049155U, // SQSHRNh 1603*9a0e4156SSadaf Ebrahimi 17049155U, // SQSHRNs 1604*9a0e4156SSadaf Ebrahimi 1644179746U, // SQSHRNv16i8_shift 1605*9a0e4156SSadaf Ebrahimi 537400899U, // SQSHRNv2i32_shift 1606*9a0e4156SSadaf Ebrahimi 1074796099U, // SQSHRNv4i16_shift 1607*9a0e4156SSadaf Ebrahimi 571748642U, // SQSHRNv4i32_shift 1608*9a0e4156SSadaf Ebrahimi 1108881698U, // SQSHRNv8i16_shift 1609*9a0e4156SSadaf Ebrahimi 1612453443U, // SQSHRNv8i8_shift 1610*9a0e4156SSadaf Ebrahimi 17049223U, // SQSHRUNb 1611*9a0e4156SSadaf Ebrahimi 17049223U, // SQSHRUNh 1612*9a0e4156SSadaf Ebrahimi 17049223U, // SQSHRUNs 1613*9a0e4156SSadaf Ebrahimi 1644179814U, // SQSHRUNv16i8_shift 1614*9a0e4156SSadaf Ebrahimi 537400967U, // SQSHRUNv2i32_shift 1615*9a0e4156SSadaf Ebrahimi 1074796167U, // SQSHRUNv4i16_shift 1616*9a0e4156SSadaf Ebrahimi 571748710U, // SQSHRUNv4i32_shift 1617*9a0e4156SSadaf Ebrahimi 1108881766U, // SQSHRUNv8i16_shift 1618*9a0e4156SSadaf Ebrahimi 1612453511U, // SQSHRUNv8i8_shift 1619*9a0e4156SSadaf Ebrahimi 2147488464U, // SQSUBv16i8 1620*9a0e4156SSadaf Ebrahimi 17048272U, // SQSUBv1i16 1621*9a0e4156SSadaf Ebrahimi 17048272U, // SQSUBv1i32 1622*9a0e4156SSadaf Ebrahimi 17048272U, // SQSUBv1i64 1623*9a0e4156SSadaf Ebrahimi 17048272U, // SQSUBv1i8 1624*9a0e4156SSadaf Ebrahimi 2684883664U, // SQSUBv2i32 1625*9a0e4156SSadaf Ebrahimi 537662160U, // SQSUBv2i64 1626*9a0e4156SSadaf Ebrahimi 3222278864U, // SQSUBv4i16 1627*9a0e4156SSadaf Ebrahimi 1075057360U, // SQSUBv4i32 1628*9a0e4156SSadaf Ebrahimi 1612190416U, // SQSUBv8i16 1629*9a0e4156SSadaf Ebrahimi 3759936208U, // SQSUBv8i8 1630*9a0e4156SSadaf Ebrahimi 3254792534U, // SQXTNv16i8 1631*9a0e4156SSadaf Ebrahimi 553920121U, // SQXTNv1i16 1632*9a0e4156SSadaf Ebrahimi 553920121U, // SQXTNv1i32 1633*9a0e4156SSadaf Ebrahimi 553920121U, // SQXTNv1i8 1634*9a0e4156SSadaf Ebrahimi 1611142777U, // SQXTNv2i32 1635*9a0e4156SSadaf Ebrahimi 2685408889U, // SQXTNv4i16 1636*9a0e4156SSadaf Ebrahimi 1645490518U, // SQXTNv4i32 1637*9a0e4156SSadaf Ebrahimi 2719494486U, // SQXTNv8i16 1638*9a0e4156SSadaf Ebrahimi 3223066233U, // SQXTNv8i8 1639*9a0e4156SSadaf Ebrahimi 3254792571U, // SQXTUNv16i8 1640*9a0e4156SSadaf Ebrahimi 553920154U, // SQXTUNv1i16 1641*9a0e4156SSadaf Ebrahimi 553920154U, // SQXTUNv1i32 1642*9a0e4156SSadaf Ebrahimi 553920154U, // SQXTUNv1i8 1643*9a0e4156SSadaf Ebrahimi 1611142810U, // SQXTUNv2i32 1644*9a0e4156SSadaf Ebrahimi 2685408922U, // SQXTUNv4i16 1645*9a0e4156SSadaf Ebrahimi 1645490555U, // SQXTUNv4i32 1646*9a0e4156SSadaf Ebrahimi 2719494523U, // SQXTUNv8i16 1647*9a0e4156SSadaf Ebrahimi 3223066266U, // SQXTUNv8i8 1648*9a0e4156SSadaf Ebrahimi 2147488556U, // SRHADDv16i8 1649*9a0e4156SSadaf Ebrahimi 2684883756U, // SRHADDv2i32 1650*9a0e4156SSadaf Ebrahimi 3222278956U, // SRHADDv4i16 1651*9a0e4156SSadaf Ebrahimi 1075057452U, // SRHADDv4i32 1652*9a0e4156SSadaf Ebrahimi 1612190508U, // SRHADDv8i16 1653*9a0e4156SSadaf Ebrahimi 3759936300U, // SRHADDv8i8 1654*9a0e4156SSadaf Ebrahimi 67404965U, // SRId 1655*9a0e4156SSadaf Ebrahimi 2181051557U, // SRIv16i8_shift 1656*9a0e4156SSadaf Ebrahimi 2718446757U, // SRIv2i32_shift 1657*9a0e4156SSadaf Ebrahimi 571225253U, // SRIv2i64_shift 1658*9a0e4156SSadaf Ebrahimi 3255841957U, // SRIv4i16_shift 1659*9a0e4156SSadaf Ebrahimi 1108620453U, // SRIv4i32_shift 1660*9a0e4156SSadaf Ebrahimi 1645753509U, // SRIv8i16_shift 1661*9a0e4156SSadaf Ebrahimi 3793499301U, // SRIv8i8_shift 1662*9a0e4156SSadaf Ebrahimi 2147489116U, // SRSHLv16i8 1663*9a0e4156SSadaf Ebrahimi 17048924U, // SRSHLv1i64 1664*9a0e4156SSadaf Ebrahimi 2684884316U, // SRSHLv2i32 1665*9a0e4156SSadaf Ebrahimi 537662812U, // SRSHLv2i64 1666*9a0e4156SSadaf Ebrahimi 3222279516U, // SRSHLv4i16 1667*9a0e4156SSadaf Ebrahimi 1075058012U, // SRSHLv4i32 1668*9a0e4156SSadaf Ebrahimi 1612191068U, // SRSHLv8i16 1669*9a0e4156SSadaf Ebrahimi 3759936860U, // SRSHLv8i8 1670*9a0e4156SSadaf Ebrahimi 17049501U, // SRSHRd 1671*9a0e4156SSadaf Ebrahimi 2147489693U, // SRSHRv16i8_shift 1672*9a0e4156SSadaf Ebrahimi 2684884893U, // SRSHRv2i32_shift 1673*9a0e4156SSadaf Ebrahimi 537663389U, // SRSHRv2i64_shift 1674*9a0e4156SSadaf Ebrahimi 3222280093U, // SRSHRv4i16_shift 1675*9a0e4156SSadaf Ebrahimi 1075058589U, // SRSHRv4i32_shift 1676*9a0e4156SSadaf Ebrahimi 1612191645U, // SRSHRv8i16_shift 1677*9a0e4156SSadaf Ebrahimi 3759937437U, // SRSHRv8i8_shift 1678*9a0e4156SSadaf Ebrahimi 67404288U, // SRSRAd 1679*9a0e4156SSadaf Ebrahimi 2181050880U, // SRSRAv16i8_shift 1680*9a0e4156SSadaf Ebrahimi 2718446080U, // SRSRAv2i32_shift 1681*9a0e4156SSadaf Ebrahimi 571224576U, // SRSRAv2i64_shift 1682*9a0e4156SSadaf Ebrahimi 3255841280U, // SRSRAv4i16_shift 1683*9a0e4156SSadaf Ebrahimi 1108619776U, // SRSRAv4i32_shift 1684*9a0e4156SSadaf Ebrahimi 1645752832U, // SRSRAv8i16_shift 1685*9a0e4156SSadaf Ebrahimi 3793498624U, // SRSRAv8i8_shift 1686*9a0e4156SSadaf Ebrahimi 2149060796U, // SSHLLv16i8_shift 1687*9a0e4156SSadaf Ebrahimi 2685146486U, // SSHLLv2i32_shift 1688*9a0e4156SSadaf Ebrahimi 3222541686U, // SSHLLv4i16_shift 1689*9a0e4156SSadaf Ebrahimi 1074532540U, // SSHLLv4i32_shift 1690*9a0e4156SSadaf Ebrahimi 1611927740U, // SSHLLv8i16_shift 1691*9a0e4156SSadaf Ebrahimi 3759674742U, // SSHLLv8i8_shift 1692*9a0e4156SSadaf Ebrahimi 2147489130U, // SSHLv16i8 1693*9a0e4156SSadaf Ebrahimi 17048938U, // SSHLv1i64 1694*9a0e4156SSadaf Ebrahimi 2684884330U, // SSHLv2i32 1695*9a0e4156SSadaf Ebrahimi 537662826U, // SSHLv2i64 1696*9a0e4156SSadaf Ebrahimi 3222279530U, // SSHLv4i16 1697*9a0e4156SSadaf Ebrahimi 1075058026U, // SSHLv4i32 1698*9a0e4156SSadaf Ebrahimi 1612191082U, // SSHLv8i16 1699*9a0e4156SSadaf Ebrahimi 3759936874U, // SSHLv8i8 1700*9a0e4156SSadaf Ebrahimi 17049515U, // SSHRd 1701*9a0e4156SSadaf Ebrahimi 2147489707U, // SSHRv16i8_shift 1702*9a0e4156SSadaf Ebrahimi 2684884907U, // SSHRv2i32_shift 1703*9a0e4156SSadaf Ebrahimi 537663403U, // SSHRv2i64_shift 1704*9a0e4156SSadaf Ebrahimi 3222280107U, // SSHRv4i16_shift 1705*9a0e4156SSadaf Ebrahimi 1075058603U, // SSHRv4i32_shift 1706*9a0e4156SSadaf Ebrahimi 1612191659U, // SSHRv8i16_shift 1707*9a0e4156SSadaf Ebrahimi 3759937451U, // SSHRv8i8_shift 1708*9a0e4156SSadaf Ebrahimi 67404302U, // SSRAd 1709*9a0e4156SSadaf Ebrahimi 2181050894U, // SSRAv16i8_shift 1710*9a0e4156SSadaf Ebrahimi 2718446094U, // SSRAv2i32_shift 1711*9a0e4156SSadaf Ebrahimi 571224590U, // SSRAv2i64_shift 1712*9a0e4156SSadaf Ebrahimi 3255841294U, // SSRAv4i16_shift 1713*9a0e4156SSadaf Ebrahimi 1108619790U, // SSRAv4i32_shift 1714*9a0e4156SSadaf Ebrahimi 1645752846U, // SSRAv8i16_shift 1715*9a0e4156SSadaf Ebrahimi 3793498638U, // SSRAv8i8_shift 1716*9a0e4156SSadaf Ebrahimi 2149060748U, // SSUBLv16i8_v8i16 1717*9a0e4156SSadaf Ebrahimi 2685146365U, // SSUBLv2i32_v2i64 1718*9a0e4156SSadaf Ebrahimi 3222541565U, // SSUBLv4i16_v4i32 1719*9a0e4156SSadaf Ebrahimi 1074532492U, // SSUBLv4i32_v2i64 1720*9a0e4156SSadaf Ebrahimi 1611927692U, // SSUBLv8i16_v4i32 1721*9a0e4156SSadaf Ebrahimi 3759674621U, // SSUBLv8i8_v8i16 1722*9a0e4156SSadaf Ebrahimi 1612190117U, // SSUBWv16i8_v8i16 1723*9a0e4156SSadaf Ebrahimi 537663913U, // SSUBWv2i32_v2i64 1724*9a0e4156SSadaf Ebrahimi 1075059113U, // SSUBWv4i16_v4i32 1725*9a0e4156SSadaf Ebrahimi 537661861U, // SSUBWv4i32_v2i64 1726*9a0e4156SSadaf Ebrahimi 1075057061U, // SSUBWv8i16_v4i32 1727*9a0e4156SSadaf Ebrahimi 1612192169U, // SSUBWv8i8_v8i16 1728*9a0e4156SSadaf Ebrahimi 36915U, // ST1Fourv16b 1729*9a0e4156SSadaf Ebrahimi 3711027U, // ST1Fourv16b_POST 1730*9a0e4156SSadaf Ebrahimi 45107U, // ST1Fourv1d 1731*9a0e4156SSadaf Ebrahimi 3981363U, // ST1Fourv1d_POST 1732*9a0e4156SSadaf Ebrahimi 53299U, // ST1Fourv2d 1733*9a0e4156SSadaf Ebrahimi 3727411U, // ST1Fourv2d_POST 1734*9a0e4156SSadaf Ebrahimi 61491U, // ST1Fourv2s 1735*9a0e4156SSadaf Ebrahimi 3997747U, // ST1Fourv2s_POST 1736*9a0e4156SSadaf Ebrahimi 69683U, // ST1Fourv4h 1737*9a0e4156SSadaf Ebrahimi 4005939U, // ST1Fourv4h_POST 1738*9a0e4156SSadaf Ebrahimi 77875U, // ST1Fourv4s 1739*9a0e4156SSadaf Ebrahimi 3751987U, // ST1Fourv4s_POST 1740*9a0e4156SSadaf Ebrahimi 86067U, // ST1Fourv8b 1741*9a0e4156SSadaf Ebrahimi 4022323U, // ST1Fourv8b_POST 1742*9a0e4156SSadaf Ebrahimi 94259U, // ST1Fourv8h 1743*9a0e4156SSadaf Ebrahimi 3768371U, // ST1Fourv8h_POST 1744*9a0e4156SSadaf Ebrahimi 36915U, // ST1Onev16b 1745*9a0e4156SSadaf Ebrahimi 4235315U, // ST1Onev16b_POST 1746*9a0e4156SSadaf Ebrahimi 45107U, // ST1Onev1d 1747*9a0e4156SSadaf Ebrahimi 4505651U, // ST1Onev1d_POST 1748*9a0e4156SSadaf Ebrahimi 53299U, // ST1Onev2d 1749*9a0e4156SSadaf Ebrahimi 4251699U, // ST1Onev2d_POST 1750*9a0e4156SSadaf Ebrahimi 61491U, // ST1Onev2s 1751*9a0e4156SSadaf Ebrahimi 4522035U, // ST1Onev2s_POST 1752*9a0e4156SSadaf Ebrahimi 69683U, // ST1Onev4h 1753*9a0e4156SSadaf Ebrahimi 4530227U, // ST1Onev4h_POST 1754*9a0e4156SSadaf Ebrahimi 77875U, // ST1Onev4s 1755*9a0e4156SSadaf Ebrahimi 4276275U, // ST1Onev4s_POST 1756*9a0e4156SSadaf Ebrahimi 86067U, // ST1Onev8b 1757*9a0e4156SSadaf Ebrahimi 4546611U, // ST1Onev8b_POST 1758*9a0e4156SSadaf Ebrahimi 94259U, // ST1Onev8h 1759*9a0e4156SSadaf Ebrahimi 4292659U, // ST1Onev8h_POST 1760*9a0e4156SSadaf Ebrahimi 36915U, // ST1Threev16b 1761*9a0e4156SSadaf Ebrahimi 5546035U, // ST1Threev16b_POST 1762*9a0e4156SSadaf Ebrahimi 45107U, // ST1Threev1d 1763*9a0e4156SSadaf Ebrahimi 5816371U, // ST1Threev1d_POST 1764*9a0e4156SSadaf Ebrahimi 53299U, // ST1Threev2d 1765*9a0e4156SSadaf Ebrahimi 5562419U, // ST1Threev2d_POST 1766*9a0e4156SSadaf Ebrahimi 61491U, // ST1Threev2s 1767*9a0e4156SSadaf Ebrahimi 5832755U, // ST1Threev2s_POST 1768*9a0e4156SSadaf Ebrahimi 69683U, // ST1Threev4h 1769*9a0e4156SSadaf Ebrahimi 5840947U, // ST1Threev4h_POST 1770*9a0e4156SSadaf Ebrahimi 77875U, // ST1Threev4s 1771*9a0e4156SSadaf Ebrahimi 5586995U, // ST1Threev4s_POST 1772*9a0e4156SSadaf Ebrahimi 86067U, // ST1Threev8b 1773*9a0e4156SSadaf Ebrahimi 5857331U, // ST1Threev8b_POST 1774*9a0e4156SSadaf Ebrahimi 94259U, // ST1Threev8h 1775*9a0e4156SSadaf Ebrahimi 5603379U, // ST1Threev8h_POST 1776*9a0e4156SSadaf Ebrahimi 36915U, // ST1Twov16b 1777*9a0e4156SSadaf Ebrahimi 3973171U, // ST1Twov16b_POST 1778*9a0e4156SSadaf Ebrahimi 45107U, // ST1Twov1d 1779*9a0e4156SSadaf Ebrahimi 4243507U, // ST1Twov1d_POST 1780*9a0e4156SSadaf Ebrahimi 53299U, // ST1Twov2d 1781*9a0e4156SSadaf Ebrahimi 3989555U, // ST1Twov2d_POST 1782*9a0e4156SSadaf Ebrahimi 61491U, // ST1Twov2s 1783*9a0e4156SSadaf Ebrahimi 4259891U, // ST1Twov2s_POST 1784*9a0e4156SSadaf Ebrahimi 69683U, // ST1Twov4h 1785*9a0e4156SSadaf Ebrahimi 4268083U, // ST1Twov4h_POST 1786*9a0e4156SSadaf Ebrahimi 77875U, // ST1Twov4s 1787*9a0e4156SSadaf Ebrahimi 4014131U, // ST1Twov4s_POST 1788*9a0e4156SSadaf Ebrahimi 86067U, // ST1Twov8b 1789*9a0e4156SSadaf Ebrahimi 4284467U, // ST1Twov8b_POST 1790*9a0e4156SSadaf Ebrahimi 94259U, // ST1Twov8h 1791*9a0e4156SSadaf Ebrahimi 4030515U, // ST1Twov8h_POST 1792*9a0e4156SSadaf Ebrahimi 147507U, // ST1i16 1793*9a0e4156SSadaf Ebrahimi 262246451U, // ST1i16_POST 1794*9a0e4156SSadaf Ebrahimi 151603U, // ST1i32 1795*9a0e4156SSadaf Ebrahimi 279031859U, // ST1i32_POST 1796*9a0e4156SSadaf Ebrahimi 155699U, // ST1i64 1797*9a0e4156SSadaf Ebrahimi 295817267U, // ST1i64_POST 1798*9a0e4156SSadaf Ebrahimi 159795U, // ST1i8 1799*9a0e4156SSadaf Ebrahimi 312602675U, // ST1i8_POST 1800*9a0e4156SSadaf Ebrahimi 37280U, // ST2Twov16b 1801*9a0e4156SSadaf Ebrahimi 3973536U, // ST2Twov16b_POST 1802*9a0e4156SSadaf Ebrahimi 53664U, // ST2Twov2d 1803*9a0e4156SSadaf Ebrahimi 3989920U, // ST2Twov2d_POST 1804*9a0e4156SSadaf Ebrahimi 61856U, // ST2Twov2s 1805*9a0e4156SSadaf Ebrahimi 4260256U, // ST2Twov2s_POST 1806*9a0e4156SSadaf Ebrahimi 70048U, // ST2Twov4h 1807*9a0e4156SSadaf Ebrahimi 4268448U, // ST2Twov4h_POST 1808*9a0e4156SSadaf Ebrahimi 78240U, // ST2Twov4s 1809*9a0e4156SSadaf Ebrahimi 4014496U, // ST2Twov4s_POST 1810*9a0e4156SSadaf Ebrahimi 86432U, // ST2Twov8b 1811*9a0e4156SSadaf Ebrahimi 4284832U, // ST2Twov8b_POST 1812*9a0e4156SSadaf Ebrahimi 94624U, // ST2Twov8h 1813*9a0e4156SSadaf Ebrahimi 4030880U, // ST2Twov8h_POST 1814*9a0e4156SSadaf Ebrahimi 147872U, // ST2i16 1815*9a0e4156SSadaf Ebrahimi 279024032U, // ST2i16_POST 1816*9a0e4156SSadaf Ebrahimi 151968U, // ST2i32 1817*9a0e4156SSadaf Ebrahimi 295809440U, // ST2i32_POST 1818*9a0e4156SSadaf Ebrahimi 156064U, // ST2i64 1819*9a0e4156SSadaf Ebrahimi 329372064U, // ST2i64_POST 1820*9a0e4156SSadaf Ebrahimi 160160U, // ST2i8 1821*9a0e4156SSadaf Ebrahimi 262271392U, // ST2i8_POST 1822*9a0e4156SSadaf Ebrahimi 37329U, // ST3Threev16b 1823*9a0e4156SSadaf Ebrahimi 5546449U, // ST3Threev16b_POST 1824*9a0e4156SSadaf Ebrahimi 53713U, // ST3Threev2d 1825*9a0e4156SSadaf Ebrahimi 5562833U, // ST3Threev2d_POST 1826*9a0e4156SSadaf Ebrahimi 61905U, // ST3Threev2s 1827*9a0e4156SSadaf Ebrahimi 5833169U, // ST3Threev2s_POST 1828*9a0e4156SSadaf Ebrahimi 70097U, // ST3Threev4h 1829*9a0e4156SSadaf Ebrahimi 5841361U, // ST3Threev4h_POST 1830*9a0e4156SSadaf Ebrahimi 78289U, // ST3Threev4s 1831*9a0e4156SSadaf Ebrahimi 5587409U, // ST3Threev4s_POST 1832*9a0e4156SSadaf Ebrahimi 86481U, // ST3Threev8b 1833*9a0e4156SSadaf Ebrahimi 5857745U, // ST3Threev8b_POST 1834*9a0e4156SSadaf Ebrahimi 94673U, // ST3Threev8h 1835*9a0e4156SSadaf Ebrahimi 5603793U, // ST3Threev8h_POST 1836*9a0e4156SSadaf Ebrahimi 147921U, // ST3i16 1837*9a0e4156SSadaf Ebrahimi 346132945U, // ST3i16_POST 1838*9a0e4156SSadaf Ebrahimi 152017U, // ST3i32 1839*9a0e4156SSadaf Ebrahimi 362918353U, // ST3i32_POST 1840*9a0e4156SSadaf Ebrahimi 156113U, // ST3i64 1841*9a0e4156SSadaf Ebrahimi 379703761U, // ST3i64_POST 1842*9a0e4156SSadaf Ebrahimi 160209U, // ST3i8 1843*9a0e4156SSadaf Ebrahimi 396489169U, // ST3i8_POST 1844*9a0e4156SSadaf Ebrahimi 37346U, // ST4Fourv16b 1845*9a0e4156SSadaf Ebrahimi 3711458U, // ST4Fourv16b_POST 1846*9a0e4156SSadaf Ebrahimi 53730U, // ST4Fourv2d 1847*9a0e4156SSadaf Ebrahimi 3727842U, // ST4Fourv2d_POST 1848*9a0e4156SSadaf Ebrahimi 61922U, // ST4Fourv2s 1849*9a0e4156SSadaf Ebrahimi 3998178U, // ST4Fourv2s_POST 1850*9a0e4156SSadaf Ebrahimi 70114U, // ST4Fourv4h 1851*9a0e4156SSadaf Ebrahimi 4006370U, // ST4Fourv4h_POST 1852*9a0e4156SSadaf Ebrahimi 78306U, // ST4Fourv4s 1853*9a0e4156SSadaf Ebrahimi 3752418U, // ST4Fourv4s_POST 1854*9a0e4156SSadaf Ebrahimi 86498U, // ST4Fourv8b 1855*9a0e4156SSadaf Ebrahimi 4022754U, // ST4Fourv8b_POST 1856*9a0e4156SSadaf Ebrahimi 94690U, // ST4Fourv8h 1857*9a0e4156SSadaf Ebrahimi 3768802U, // ST4Fourv8h_POST 1858*9a0e4156SSadaf Ebrahimi 147938U, // ST4i16 1859*9a0e4156SSadaf Ebrahimi 295801314U, // ST4i16_POST 1860*9a0e4156SSadaf Ebrahimi 152034U, // ST4i32 1861*9a0e4156SSadaf Ebrahimi 329363938U, // ST4i32_POST 1862*9a0e4156SSadaf Ebrahimi 156130U, // ST4i64 1863*9a0e4156SSadaf Ebrahimi 413258210U, // ST4i64_POST 1864*9a0e4156SSadaf Ebrahimi 160226U, // ST4i8 1865*9a0e4156SSadaf Ebrahimi 279048674U, // ST4i8_POST 1866*9a0e4156SSadaf Ebrahimi 26485317U, // STLRB 1867*9a0e4156SSadaf Ebrahimi 26485814U, // STLRH 1868*9a0e4156SSadaf Ebrahimi 26486716U, // STLRW 1869*9a0e4156SSadaf Ebrahimi 26486716U, // STLRX 1870*9a0e4156SSadaf Ebrahimi 17049437U, // STLXPW 1871*9a0e4156SSadaf Ebrahimi 17049437U, // STLXPX 1872*9a0e4156SSadaf Ebrahimi 553919101U, // STLXRB 1873*9a0e4156SSadaf Ebrahimi 553919598U, // STLXRH 1874*9a0e4156SSadaf Ebrahimi 553920528U, // STLXRW 1875*9a0e4156SSadaf Ebrahimi 553920528U, // STLXRX 1876*9a0e4156SSadaf Ebrahimi 553920285U, // STNPDi 1877*9a0e4156SSadaf Ebrahimi 553920285U, // STNPQi 1878*9a0e4156SSadaf Ebrahimi 553920285U, // STNPSi 1879*9a0e4156SSadaf Ebrahimi 553920285U, // STNPWi 1880*9a0e4156SSadaf Ebrahimi 553920285U, // STNPXi 1881*9a0e4156SSadaf Ebrahimi 553920305U, // STPDi 1882*9a0e4156SSadaf Ebrahimi 604276529U, // STPDpost 1883*9a0e4156SSadaf Ebrahimi 604276529U, // STPDpre 1884*9a0e4156SSadaf Ebrahimi 553920305U, // STPQi 1885*9a0e4156SSadaf Ebrahimi 604276529U, // STPQpost 1886*9a0e4156SSadaf Ebrahimi 604276529U, // STPQpre 1887*9a0e4156SSadaf Ebrahimi 553920305U, // STPSi 1888*9a0e4156SSadaf Ebrahimi 604276529U, // STPSpost 1889*9a0e4156SSadaf Ebrahimi 604276529U, // STPSpre 1890*9a0e4156SSadaf Ebrahimi 553920305U, // STPWi 1891*9a0e4156SSadaf Ebrahimi 604276529U, // STPWpost 1892*9a0e4156SSadaf Ebrahimi 604276529U, // STPWpre 1893*9a0e4156SSadaf Ebrahimi 553920305U, // STPXi 1894*9a0e4156SSadaf Ebrahimi 604276529U, // STPXpost 1895*9a0e4156SSadaf Ebrahimi 604276529U, // STPXpre 1896*9a0e4156SSadaf Ebrahimi 1150583379U, // STRBBpost 1897*9a0e4156SSadaf Ebrahimi 76841555U, // STRBBpre 1898*9a0e4156SSadaf Ebrahimi 26485331U, // STRBBroW 1899*9a0e4156SSadaf Ebrahimi 26485331U, // STRBBroX 1900*9a0e4156SSadaf Ebrahimi 26485331U, // STRBBui 1901*9a0e4156SSadaf Ebrahimi 1150584806U, // STRBpost 1902*9a0e4156SSadaf Ebrahimi 76842982U, // STRBpre 1903*9a0e4156SSadaf Ebrahimi 26486758U, // STRBroW 1904*9a0e4156SSadaf Ebrahimi 26486758U, // STRBroX 1905*9a0e4156SSadaf Ebrahimi 26486758U, // STRBui 1906*9a0e4156SSadaf Ebrahimi 1150584806U, // STRDpost 1907*9a0e4156SSadaf Ebrahimi 76842982U, // STRDpre 1908*9a0e4156SSadaf Ebrahimi 26486758U, // STRDroW 1909*9a0e4156SSadaf Ebrahimi 26486758U, // STRDroX 1910*9a0e4156SSadaf Ebrahimi 26486758U, // STRDui 1911*9a0e4156SSadaf Ebrahimi 1150583876U, // STRHHpost 1912*9a0e4156SSadaf Ebrahimi 76842052U, // STRHHpre 1913*9a0e4156SSadaf Ebrahimi 26485828U, // STRHHroW 1914*9a0e4156SSadaf Ebrahimi 26485828U, // STRHHroX 1915*9a0e4156SSadaf Ebrahimi 26485828U, // STRHHui 1916*9a0e4156SSadaf Ebrahimi 1150584806U, // STRHpost 1917*9a0e4156SSadaf Ebrahimi 76842982U, // STRHpre 1918*9a0e4156SSadaf Ebrahimi 26486758U, // STRHroW 1919*9a0e4156SSadaf Ebrahimi 26486758U, // STRHroX 1920*9a0e4156SSadaf Ebrahimi 26486758U, // STRHui 1921*9a0e4156SSadaf Ebrahimi 1150584806U, // STRQpost 1922*9a0e4156SSadaf Ebrahimi 76842982U, // STRQpre 1923*9a0e4156SSadaf Ebrahimi 26486758U, // STRQroW 1924*9a0e4156SSadaf Ebrahimi 26486758U, // STRQroX 1925*9a0e4156SSadaf Ebrahimi 26486758U, // STRQui 1926*9a0e4156SSadaf Ebrahimi 1150584806U, // STRSpost 1927*9a0e4156SSadaf Ebrahimi 76842982U, // STRSpre 1928*9a0e4156SSadaf Ebrahimi 26486758U, // STRSroW 1929*9a0e4156SSadaf Ebrahimi 26486758U, // STRSroX 1930*9a0e4156SSadaf Ebrahimi 26486758U, // STRSui 1931*9a0e4156SSadaf Ebrahimi 1150584806U, // STRWpost 1932*9a0e4156SSadaf Ebrahimi 76842982U, // STRWpre 1933*9a0e4156SSadaf Ebrahimi 26486758U, // STRWroW 1934*9a0e4156SSadaf Ebrahimi 26486758U, // STRWroX 1935*9a0e4156SSadaf Ebrahimi 26486758U, // STRWui 1936*9a0e4156SSadaf Ebrahimi 1150584806U, // STRXpost 1937*9a0e4156SSadaf Ebrahimi 76842982U, // STRXpre 1938*9a0e4156SSadaf Ebrahimi 26486758U, // STRXroW 1939*9a0e4156SSadaf Ebrahimi 26486758U, // STRXroX 1940*9a0e4156SSadaf Ebrahimi 26486758U, // STRXui 1941*9a0e4156SSadaf Ebrahimi 26485337U, // STTRBi 1942*9a0e4156SSadaf Ebrahimi 26485834U, // STTRHi 1943*9a0e4156SSadaf Ebrahimi 26486763U, // STTRWi 1944*9a0e4156SSadaf Ebrahimi 26486763U, // STTRXi 1945*9a0e4156SSadaf Ebrahimi 26485351U, // STURBBi 1946*9a0e4156SSadaf Ebrahimi 26486781U, // STURBi 1947*9a0e4156SSadaf Ebrahimi 26486781U, // STURDi 1948*9a0e4156SSadaf Ebrahimi 26485848U, // STURHHi 1949*9a0e4156SSadaf Ebrahimi 26486781U, // STURHi 1950*9a0e4156SSadaf Ebrahimi 26486781U, // STURQi 1951*9a0e4156SSadaf Ebrahimi 26486781U, // STURSi 1952*9a0e4156SSadaf Ebrahimi 26486781U, // STURWi 1953*9a0e4156SSadaf Ebrahimi 26486781U, // STURXi 1954*9a0e4156SSadaf Ebrahimi 17049444U, // STXPW 1955*9a0e4156SSadaf Ebrahimi 17049444U, // STXPX 1956*9a0e4156SSadaf Ebrahimi 553919109U, // STXRB 1957*9a0e4156SSadaf Ebrahimi 553919606U, // STXRH 1958*9a0e4156SSadaf Ebrahimi 553920535U, // STXRW 1959*9a0e4156SSadaf Ebrahimi 553920535U, // STXRX 1960*9a0e4156SSadaf Ebrahimi 537400855U, // SUBHNv2i64_v2i32 1961*9a0e4156SSadaf Ebrahimi 571748625U, // SUBHNv2i64_v4i32 1962*9a0e4156SSadaf Ebrahimi 1074796055U, // SUBHNv4i32_v4i16 1963*9a0e4156SSadaf Ebrahimi 1108881681U, // SUBHNv4i32_v8i16 1964*9a0e4156SSadaf Ebrahimi 1644179729U, // SUBHNv8i16_v16i8 1965*9a0e4156SSadaf Ebrahimi 1612453399U, // SUBHNv8i16_v8i8 1966*9a0e4156SSadaf Ebrahimi 17049650U, // SUBSWri 1967*9a0e4156SSadaf Ebrahimi 0U, // SUBSWrr 1968*9a0e4156SSadaf Ebrahimi 17049650U, // SUBSWrs 1969*9a0e4156SSadaf Ebrahimi 17049650U, // SUBSWrx 1970*9a0e4156SSadaf Ebrahimi 17049650U, // SUBSXri 1971*9a0e4156SSadaf Ebrahimi 0U, // SUBSXrr 1972*9a0e4156SSadaf Ebrahimi 17049650U, // SUBSXrs 1973*9a0e4156SSadaf Ebrahimi 17049650U, // SUBSXrx 1974*9a0e4156SSadaf Ebrahimi 17049650U, // SUBSXrx64 1975*9a0e4156SSadaf Ebrahimi 17048238U, // SUBWri 1976*9a0e4156SSadaf Ebrahimi 0U, // SUBWrr 1977*9a0e4156SSadaf Ebrahimi 17048238U, // SUBWrs 1978*9a0e4156SSadaf Ebrahimi 17048238U, // SUBWrx 1979*9a0e4156SSadaf Ebrahimi 17048238U, // SUBXri 1980*9a0e4156SSadaf Ebrahimi 0U, // SUBXrr 1981*9a0e4156SSadaf Ebrahimi 17048238U, // SUBXrs 1982*9a0e4156SSadaf Ebrahimi 17048238U, // SUBXrx 1983*9a0e4156SSadaf Ebrahimi 17048238U, // SUBXrx64 1984*9a0e4156SSadaf Ebrahimi 2147488430U, // SUBv16i8 1985*9a0e4156SSadaf Ebrahimi 17048238U, // SUBv1i64 1986*9a0e4156SSadaf Ebrahimi 2684883630U, // SUBv2i32 1987*9a0e4156SSadaf Ebrahimi 537662126U, // SUBv2i64 1988*9a0e4156SSadaf Ebrahimi 3222278830U, // SUBv4i16 1989*9a0e4156SSadaf Ebrahimi 1075057326U, // SUBv4i32 1990*9a0e4156SSadaf Ebrahimi 1612190382U, // SUBv8i16 1991*9a0e4156SSadaf Ebrahimi 3759936174U, // SUBv8i8 1992*9a0e4156SSadaf Ebrahimi 33567585U, // SUQADDv16i8 1993*9a0e4156SSadaf Ebrahimi 604275553U, // SUQADDv1i16 1994*9a0e4156SSadaf Ebrahimi 604275553U, // SUQADDv1i32 1995*9a0e4156SSadaf Ebrahimi 604275553U, // SUQADDv1i64 1996*9a0e4156SSadaf Ebrahimi 604275553U, // SUQADDv1i8 1997*9a0e4156SSadaf Ebrahimi 1107833697U, // SUQADDv2i32 1998*9a0e4156SSadaf Ebrahimi 1644966753U, // SUQADDv2i64 1999*9a0e4156SSadaf Ebrahimi 2182099809U, // SUQADDv4i16 2000*9a0e4156SSadaf Ebrahimi 2719232865U, // SUQADDv4i32 2001*9a0e4156SSadaf Ebrahimi 3256365921U, // SUQADDv8i16 2002*9a0e4156SSadaf Ebrahimi 3793498977U, // SUQADDv8i8 2003*9a0e4156SSadaf Ebrahimi 21263U, // SVC 2004*9a0e4156SSadaf Ebrahimi 17049022U, // SYSLxt 2005*9a0e4156SSadaf Ebrahimi 419702938U, // SYSxt 2006*9a0e4156SSadaf Ebrahimi 436212968U, // TBLv16i8Four 2007*9a0e4156SSadaf Ebrahimi 436212968U, // TBLv16i8One 2008*9a0e4156SSadaf Ebrahimi 436212968U, // TBLv16i8Three 2009*9a0e4156SSadaf Ebrahimi 436212968U, // TBLv16i8Two 2010*9a0e4156SSadaf Ebrahimi 4196144360U, // TBLv8i8Four 2011*9a0e4156SSadaf Ebrahimi 4196144360U, // TBLv8i8One 2012*9a0e4156SSadaf Ebrahimi 4196144360U, // TBLv8i8Three 2013*9a0e4156SSadaf Ebrahimi 4196144360U, // TBLv8i8Two 2014*9a0e4156SSadaf Ebrahimi 17050183U, // TBNZW 2015*9a0e4156SSadaf Ebrahimi 17050183U, // TBNZX 2016*9a0e4156SSadaf Ebrahimi 452999686U, // TBXv16i8Four 2017*9a0e4156SSadaf Ebrahimi 452999686U, // TBXv16i8One 2018*9a0e4156SSadaf Ebrahimi 452999686U, // TBXv16i8Three 2019*9a0e4156SSadaf Ebrahimi 452999686U, // TBXv16i8Two 2020*9a0e4156SSadaf Ebrahimi 4212931078U, // TBXv8i8Four 2021*9a0e4156SSadaf Ebrahimi 4212931078U, // TBXv8i8One 2022*9a0e4156SSadaf Ebrahimi 4212931078U, // TBXv8i8Three 2023*9a0e4156SSadaf Ebrahimi 4212931078U, // TBXv8i8Two 2024*9a0e4156SSadaf Ebrahimi 17050167U, // TBZW 2025*9a0e4156SSadaf Ebrahimi 17050167U, // TBZX 2026*9a0e4156SSadaf Ebrahimi 0U, // TCRETURNdi 2027*9a0e4156SSadaf Ebrahimi 0U, // TCRETURNri 2028*9a0e4156SSadaf Ebrahimi 2107995U, // TLSDESCCALL 2029*9a0e4156SSadaf Ebrahimi 0U, // TLSDESC_BLR 2030*9a0e4156SSadaf Ebrahimi 2147487770U, // TRN1v16i8 2031*9a0e4156SSadaf Ebrahimi 2684882970U, // TRN1v2i32 2032*9a0e4156SSadaf Ebrahimi 537661466U, // TRN1v2i64 2033*9a0e4156SSadaf Ebrahimi 3222278170U, // TRN1v4i16 2034*9a0e4156SSadaf Ebrahimi 1075056666U, // TRN1v4i32 2035*9a0e4156SSadaf Ebrahimi 1612189722U, // TRN1v8i16 2036*9a0e4156SSadaf Ebrahimi 3759935514U, // TRN1v8i8 2037*9a0e4156SSadaf Ebrahimi 2147488072U, // TRN2v16i8 2038*9a0e4156SSadaf Ebrahimi 2684883272U, // TRN2v2i32 2039*9a0e4156SSadaf Ebrahimi 537661768U, // TRN2v2i64 2040*9a0e4156SSadaf Ebrahimi 3222278472U, // TRN2v4i16 2041*9a0e4156SSadaf Ebrahimi 1075056968U, // TRN2v4i32 2042*9a0e4156SSadaf Ebrahimi 1612190024U, // TRN2v8i16 2043*9a0e4156SSadaf Ebrahimi 3759935816U, // TRN2v8i8 2044*9a0e4156SSadaf Ebrahimi 2182623338U, // UABALv16i8_v8i16 2045*9a0e4156SSadaf Ebrahimi 2718708938U, // UABALv2i32_v2i64 2046*9a0e4156SSadaf Ebrahimi 3256104138U, // UABALv4i16_v4i32 2047*9a0e4156SSadaf Ebrahimi 1108095082U, // UABALv4i32_v2i64 2048*9a0e4156SSadaf Ebrahimi 1645490282U, // UABALv8i16_v4i32 2049*9a0e4156SSadaf Ebrahimi 3793237194U, // UABALv8i8_v8i16 2050*9a0e4156SSadaf Ebrahimi 2181050868U, // UABAv16i8 2051*9a0e4156SSadaf Ebrahimi 2718446068U, // UABAv2i32 2052*9a0e4156SSadaf Ebrahimi 3255841268U, // UABAv4i16 2053*9a0e4156SSadaf Ebrahimi 1108619764U, // UABAv4i32 2054*9a0e4156SSadaf Ebrahimi 1645752820U, // UABAv8i16 2055*9a0e4156SSadaf Ebrahimi 3793498612U, // UABAv8i8 2056*9a0e4156SSadaf Ebrahimi 2149060772U, // UABDLv16i8_v8i16 2057*9a0e4156SSadaf Ebrahimi 2685146386U, // UABDLv2i32_v2i64 2058*9a0e4156SSadaf Ebrahimi 3222541586U, // UABDLv4i16_v4i32 2059*9a0e4156SSadaf Ebrahimi 1074532516U, // UABDLv4i32_v2i64 2060*9a0e4156SSadaf Ebrahimi 1611927716U, // UABDLv8i16_v4i32 2061*9a0e4156SSadaf Ebrahimi 3759674642U, // UABDLv8i8_v8i16 2062*9a0e4156SSadaf Ebrahimi 2147488544U, // UABDv16i8 2063*9a0e4156SSadaf Ebrahimi 2684883744U, // UABDv2i32 2064*9a0e4156SSadaf Ebrahimi 3222278944U, // UABDv4i16 2065*9a0e4156SSadaf Ebrahimi 1075057440U, // UABDv4i32 2066*9a0e4156SSadaf Ebrahimi 1612190496U, // UABDv8i16 2067*9a0e4156SSadaf Ebrahimi 3759936288U, // UABDv8i8 2068*9a0e4156SSadaf Ebrahimi 35141323U, // UADALPv16i8_v8i16 2069*9a0e4156SSadaf Ebrahimi 1117533899U, // UADALPv2i32_v1i64 2070*9a0e4156SSadaf Ebrahimi 2181576395U, // UADALPv4i16_v2i32 2071*9a0e4156SSadaf Ebrahimi 2718709451U, // UADALPv4i32_v2i64 2072*9a0e4156SSadaf Ebrahimi 3256104651U, // UADALPv8i16_v4i32 2073*9a0e4156SSadaf Ebrahimi 3792713419U, // UADALPv8i8_v4i16 2074*9a0e4156SSadaf Ebrahimi 1578715U, // UADDLPv16i8_v8i16 2075*9a0e4156SSadaf Ebrahimi 1083971291U, // UADDLPv2i32_v1i64 2076*9a0e4156SSadaf Ebrahimi 2148013787U, // UADDLPv4i16_v2i32 2077*9a0e4156SSadaf Ebrahimi 2685146843U, // UADDLPv4i32_v2i64 2078*9a0e4156SSadaf Ebrahimi 3222542043U, // UADDLPv8i16_v4i32 2079*9a0e4156SSadaf Ebrahimi 3759150811U, // UADDLPv8i8_v4i16 2080*9a0e4156SSadaf Ebrahimi 272708U, // UADDLVv16i8v 2081*9a0e4156SSadaf Ebrahimi 2147756356U, // UADDLVv4i16v 2082*9a0e4156SSadaf Ebrahimi 2684627268U, // UADDLVv4i32v 2083*9a0e4156SSadaf Ebrahimi 3221498180U, // UADDLVv8i16v 2084*9a0e4156SSadaf Ebrahimi 3758369092U, // UADDLVv8i8v 2085*9a0e4156SSadaf Ebrahimi 2149060788U, // UADDLv16i8_v8i16 2086*9a0e4156SSadaf Ebrahimi 2685146416U, // UADDLv2i32_v2i64 2087*9a0e4156SSadaf Ebrahimi 3222541616U, // UADDLv4i16_v4i32 2088*9a0e4156SSadaf Ebrahimi 1074532532U, // UADDLv4i32_v2i64 2089*9a0e4156SSadaf Ebrahimi 1611927732U, // UADDLv8i16_v4i32 2090*9a0e4156SSadaf Ebrahimi 3759674672U, // UADDLv8i8_v8i16 2091*9a0e4156SSadaf Ebrahimi 1612190141U, // UADDWv16i8_v8i16 2092*9a0e4156SSadaf Ebrahimi 537663943U, // UADDWv2i32_v2i64 2093*9a0e4156SSadaf Ebrahimi 1075059143U, // UADDWv4i16_v4i32 2094*9a0e4156SSadaf Ebrahimi 537661885U, // UADDWv4i32_v2i64 2095*9a0e4156SSadaf Ebrahimi 1075057085U, // UADDWv8i16_v4i32 2096*9a0e4156SSadaf Ebrahimi 1612192199U, // UADDWv8i8_v8i16 2097*9a0e4156SSadaf Ebrahimi 17049067U, // UBFMWri 2098*9a0e4156SSadaf Ebrahimi 17049067U, // UBFMXri 2099*9a0e4156SSadaf Ebrahimi 17048524U, // UCVTFSWDri 2100*9a0e4156SSadaf Ebrahimi 17048524U, // UCVTFSWSri 2101*9a0e4156SSadaf Ebrahimi 17048524U, // UCVTFSXDri 2102*9a0e4156SSadaf Ebrahimi 17048524U, // UCVTFSXSri 2103*9a0e4156SSadaf Ebrahimi 553919436U, // UCVTFUWDri 2104*9a0e4156SSadaf Ebrahimi 553919436U, // UCVTFUWSri 2105*9a0e4156SSadaf Ebrahimi 553919436U, // UCVTFUXDri 2106*9a0e4156SSadaf Ebrahimi 553919436U, // UCVTFUXSri 2107*9a0e4156SSadaf Ebrahimi 17048524U, // UCVTFd 2108*9a0e4156SSadaf Ebrahimi 17048524U, // UCVTFs 2109*9a0e4156SSadaf Ebrahimi 553919436U, // UCVTFv1i32 2110*9a0e4156SSadaf Ebrahimi 553919436U, // UCVTFv1i64 2111*9a0e4156SSadaf Ebrahimi 1074271180U, // UCVTFv2f32 2112*9a0e4156SSadaf Ebrahimi 1611404236U, // UCVTFv2f64 2113*9a0e4156SSadaf Ebrahimi 2684883916U, // UCVTFv2i32_shift 2114*9a0e4156SSadaf Ebrahimi 537662412U, // UCVTFv2i64_shift 2115*9a0e4156SSadaf Ebrahimi 2685670348U, // UCVTFv4f32 2116*9a0e4156SSadaf Ebrahimi 1075057612U, // UCVTFv4i32_shift 2117*9a0e4156SSadaf Ebrahimi 17049910U, // UDIVWr 2118*9a0e4156SSadaf Ebrahimi 17049910U, // UDIVXr 2119*9a0e4156SSadaf Ebrahimi 17049910U, // UDIV_IntWr 2120*9a0e4156SSadaf Ebrahimi 17049910U, // UDIV_IntXr 2121*9a0e4156SSadaf Ebrahimi 2147488579U, // UHADDv16i8 2122*9a0e4156SSadaf Ebrahimi 2684883779U, // UHADDv2i32 2123*9a0e4156SSadaf Ebrahimi 3222278979U, // UHADDv4i16 2124*9a0e4156SSadaf Ebrahimi 1075057475U, // UHADDv4i32 2125*9a0e4156SSadaf Ebrahimi 1612190531U, // UHADDv8i16 2126*9a0e4156SSadaf Ebrahimi 3759936323U, // UHADDv8i8 2127*9a0e4156SSadaf Ebrahimi 2147488442U, // UHSUBv16i8 2128*9a0e4156SSadaf Ebrahimi 2684883642U, // UHSUBv2i32 2129*9a0e4156SSadaf Ebrahimi 3222278842U, // UHSUBv4i16 2130*9a0e4156SSadaf Ebrahimi 1075057338U, // UHSUBv4i32 2131*9a0e4156SSadaf Ebrahimi 1612190394U, // UHSUBv8i16 2132*9a0e4156SSadaf Ebrahimi 3759936186U, // UHSUBv8i8 2133*9a0e4156SSadaf Ebrahimi 17048865U, // UMADDLrrr 2134*9a0e4156SSadaf Ebrahimi 2147489616U, // UMAXPv16i8 2135*9a0e4156SSadaf Ebrahimi 2684884816U, // UMAXPv2i32 2136*9a0e4156SSadaf Ebrahimi 3222280016U, // UMAXPv4i16 2137*9a0e4156SSadaf Ebrahimi 1075058512U, // UMAXPv4i32 2138*9a0e4156SSadaf Ebrahimi 1612191568U, // UMAXPv8i16 2139*9a0e4156SSadaf Ebrahimi 3759937360U, // UMAXPv8i8 2140*9a0e4156SSadaf Ebrahimi 272794U, // UMAXVv16i8v 2141*9a0e4156SSadaf Ebrahimi 2147756442U, // UMAXVv4i16v 2142*9a0e4156SSadaf Ebrahimi 2684627354U, // UMAXVv4i32v 2143*9a0e4156SSadaf Ebrahimi 3221498266U, // UMAXVv8i16v 2144*9a0e4156SSadaf Ebrahimi 3758369178U, // UMAXVv8i8v 2145*9a0e4156SSadaf Ebrahimi 2147490304U, // UMAXv16i8 2146*9a0e4156SSadaf Ebrahimi 2684885504U, // UMAXv2i32 2147*9a0e4156SSadaf Ebrahimi 3222280704U, // UMAXv4i16 2148*9a0e4156SSadaf Ebrahimi 1075059200U, // UMAXv4i32 2149*9a0e4156SSadaf Ebrahimi 1612192256U, // UMAXv8i16 2150*9a0e4156SSadaf Ebrahimi 3759938048U, // UMAXv8i8 2151*9a0e4156SSadaf Ebrahimi 2147489558U, // UMINPv16i8 2152*9a0e4156SSadaf Ebrahimi 2684884758U, // UMINPv2i32 2153*9a0e4156SSadaf Ebrahimi 3222279958U, // UMINPv4i16 2154*9a0e4156SSadaf Ebrahimi 1075058454U, // UMINPv4i32 2155*9a0e4156SSadaf Ebrahimi 1612191510U, // UMINPv8i16 2156*9a0e4156SSadaf Ebrahimi 3759937302U, // UMINPv8i8 2157*9a0e4156SSadaf Ebrahimi 272748U, // UMINVv16i8v 2158*9a0e4156SSadaf Ebrahimi 2147756396U, // UMINVv4i16v 2159*9a0e4156SSadaf Ebrahimi 2684627308U, // UMINVv4i32v 2160*9a0e4156SSadaf Ebrahimi 3221498220U, // UMINVv8i16v 2161*9a0e4156SSadaf Ebrahimi 3758369132U, // UMINVv8i8v 2162*9a0e4156SSadaf Ebrahimi 2147489330U, // UMINv16i8 2163*9a0e4156SSadaf Ebrahimi 2684884530U, // UMINv2i32 2164*9a0e4156SSadaf Ebrahimi 3222279730U, // UMINv4i16 2165*9a0e4156SSadaf Ebrahimi 1075058226U, // UMINv4i32 2166*9a0e4156SSadaf Ebrahimi 1612191282U, // UMINv8i16 2167*9a0e4156SSadaf Ebrahimi 3759937074U, // UMINv8i8 2168*9a0e4156SSadaf Ebrahimi 2182623364U, // UMLALv16i8_v8i16 2169*9a0e4156SSadaf Ebrahimi 2718708961U, // UMLALv2i32_indexed 2170*9a0e4156SSadaf Ebrahimi 2718708961U, // UMLALv2i32_v2i64 2171*9a0e4156SSadaf Ebrahimi 3256104161U, // UMLALv4i16_indexed 2172*9a0e4156SSadaf Ebrahimi 3256104161U, // UMLALv4i16_v4i32 2173*9a0e4156SSadaf Ebrahimi 1108095108U, // UMLALv4i32_indexed 2174*9a0e4156SSadaf Ebrahimi 1108095108U, // UMLALv4i32_v2i64 2175*9a0e4156SSadaf Ebrahimi 1645490308U, // UMLALv8i16_indexed 2176*9a0e4156SSadaf Ebrahimi 1645490308U, // UMLALv8i16_v4i32 2177*9a0e4156SSadaf Ebrahimi 3793237217U, // UMLALv8i8_v8i16 2178*9a0e4156SSadaf Ebrahimi 2182623488U, // UMLSLv16i8_v8i16 2179*9a0e4156SSadaf Ebrahimi 2718709175U, // UMLSLv2i32_indexed 2180*9a0e4156SSadaf Ebrahimi 2718709175U, // UMLSLv2i32_v2i64 2181*9a0e4156SSadaf Ebrahimi 3256104375U, // UMLSLv4i16_indexed 2182*9a0e4156SSadaf Ebrahimi 3256104375U, // UMLSLv4i16_v4i32 2183*9a0e4156SSadaf Ebrahimi 1108095232U, // UMLSLv4i32_indexed 2184*9a0e4156SSadaf Ebrahimi 1108095232U, // UMLSLv4i32_v2i64 2185*9a0e4156SSadaf Ebrahimi 1645490432U, // UMLSLv8i16_indexed 2186*9a0e4156SSadaf Ebrahimi 1645490432U, // UMLSLv8i16_v4i32 2187*9a0e4156SSadaf Ebrahimi 3793237431U, // UMLSLv8i8_v8i16 2188*9a0e4156SSadaf Ebrahimi 272774U, // UMOVvi16 2189*9a0e4156SSadaf Ebrahimi 537143686U, // UMOVvi32 2190*9a0e4156SSadaf Ebrahimi 1074014598U, // UMOVvi64 2191*9a0e4156SSadaf Ebrahimi 1610885510U, // UMOVvi8 2192*9a0e4156SSadaf Ebrahimi 17048821U, // UMSUBLrrr 2193*9a0e4156SSadaf Ebrahimi 17048610U, // UMULHrr 2194*9a0e4156SSadaf Ebrahimi 2149060838U, // UMULLv16i8_v8i16 2195*9a0e4156SSadaf Ebrahimi 2685146523U, // UMULLv2i32_indexed 2196*9a0e4156SSadaf Ebrahimi 2685146523U, // UMULLv2i32_v2i64 2197*9a0e4156SSadaf Ebrahimi 3222541723U, // UMULLv4i16_indexed 2198*9a0e4156SSadaf Ebrahimi 3222541723U, // UMULLv4i16_v4i32 2199*9a0e4156SSadaf Ebrahimi 1074532582U, // UMULLv4i32_indexed 2200*9a0e4156SSadaf Ebrahimi 1074532582U, // UMULLv4i32_v2i64 2201*9a0e4156SSadaf Ebrahimi 1611927782U, // UMULLv8i16_indexed 2202*9a0e4156SSadaf Ebrahimi 1611927782U, // UMULLv8i16_v4i32 2203*9a0e4156SSadaf Ebrahimi 3759674779U, // UMULLv8i8_v8i16 2204*9a0e4156SSadaf Ebrahimi 2147488610U, // UQADDv16i8 2205*9a0e4156SSadaf Ebrahimi 17048418U, // UQADDv1i16 2206*9a0e4156SSadaf Ebrahimi 17048418U, // UQADDv1i32 2207*9a0e4156SSadaf Ebrahimi 17048418U, // UQADDv1i64 2208*9a0e4156SSadaf Ebrahimi 17048418U, // UQADDv1i8 2209*9a0e4156SSadaf Ebrahimi 2684883810U, // UQADDv2i32 2210*9a0e4156SSadaf Ebrahimi 537662306U, // UQADDv2i64 2211*9a0e4156SSadaf Ebrahimi 3222279010U, // UQADDv4i16 2212*9a0e4156SSadaf Ebrahimi 1075057506U, // UQADDv4i32 2213*9a0e4156SSadaf Ebrahimi 1612190562U, // UQADDv8i16 2214*9a0e4156SSadaf Ebrahimi 3759936354U, // UQADDv8i8 2215*9a0e4156SSadaf Ebrahimi 2147489108U, // UQRSHLv16i8 2216*9a0e4156SSadaf Ebrahimi 17048916U, // UQRSHLv1i16 2217*9a0e4156SSadaf Ebrahimi 17048916U, // UQRSHLv1i32 2218*9a0e4156SSadaf Ebrahimi 17048916U, // UQRSHLv1i64 2219*9a0e4156SSadaf Ebrahimi 17048916U, // UQRSHLv1i8 2220*9a0e4156SSadaf Ebrahimi 2684884308U, // UQRSHLv2i32 2221*9a0e4156SSadaf Ebrahimi 537662804U, // UQRSHLv2i64 2222*9a0e4156SSadaf Ebrahimi 3222279508U, // UQRSHLv4i16 2223*9a0e4156SSadaf Ebrahimi 1075058004U, // UQRSHLv4i32 2224*9a0e4156SSadaf Ebrahimi 1612191060U, // UQRSHLv8i16 2225*9a0e4156SSadaf Ebrahimi 3759936852U, // UQRSHLv8i8 2226*9a0e4156SSadaf Ebrahimi 17049180U, // UQRSHRNb 2227*9a0e4156SSadaf Ebrahimi 17049180U, // UQRSHRNh 2228*9a0e4156SSadaf Ebrahimi 17049180U, // UQRSHRNs 2229*9a0e4156SSadaf Ebrahimi 1644179774U, // UQRSHRNv16i8_shift 2230*9a0e4156SSadaf Ebrahimi 537400924U, // UQRSHRNv2i32_shift 2231*9a0e4156SSadaf Ebrahimi 1074796124U, // UQRSHRNv4i16_shift 2232*9a0e4156SSadaf Ebrahimi 571748670U, // UQRSHRNv4i32_shift 2233*9a0e4156SSadaf Ebrahimi 1108881726U, // UQRSHRNv8i16_shift 2234*9a0e4156SSadaf Ebrahimi 1612453468U, // UQRSHRNv8i8_shift 2235*9a0e4156SSadaf Ebrahimi 17048901U, // UQSHLb 2236*9a0e4156SSadaf Ebrahimi 17048901U, // UQSHLd 2237*9a0e4156SSadaf Ebrahimi 17048901U, // UQSHLh 2238*9a0e4156SSadaf Ebrahimi 17048901U, // UQSHLs 2239*9a0e4156SSadaf Ebrahimi 2147489093U, // UQSHLv16i8 2240*9a0e4156SSadaf Ebrahimi 2147489093U, // UQSHLv16i8_shift 2241*9a0e4156SSadaf Ebrahimi 17048901U, // UQSHLv1i16 2242*9a0e4156SSadaf Ebrahimi 17048901U, // UQSHLv1i32 2243*9a0e4156SSadaf Ebrahimi 17048901U, // UQSHLv1i64 2244*9a0e4156SSadaf Ebrahimi 17048901U, // UQSHLv1i8 2245*9a0e4156SSadaf Ebrahimi 2684884293U, // UQSHLv2i32 2246*9a0e4156SSadaf Ebrahimi 2684884293U, // UQSHLv2i32_shift 2247*9a0e4156SSadaf Ebrahimi 537662789U, // UQSHLv2i64 2248*9a0e4156SSadaf Ebrahimi 537662789U, // UQSHLv2i64_shift 2249*9a0e4156SSadaf Ebrahimi 3222279493U, // UQSHLv4i16 2250*9a0e4156SSadaf Ebrahimi 3222279493U, // UQSHLv4i16_shift 2251*9a0e4156SSadaf Ebrahimi 1075057989U, // UQSHLv4i32 2252*9a0e4156SSadaf Ebrahimi 1075057989U, // UQSHLv4i32_shift 2253*9a0e4156SSadaf Ebrahimi 1612191045U, // UQSHLv8i16 2254*9a0e4156SSadaf Ebrahimi 1612191045U, // UQSHLv8i16_shift 2255*9a0e4156SSadaf Ebrahimi 3759936837U, // UQSHLv8i8 2256*9a0e4156SSadaf Ebrahimi 3759936837U, // UQSHLv8i8_shift 2257*9a0e4156SSadaf Ebrahimi 17049163U, // UQSHRNb 2258*9a0e4156SSadaf Ebrahimi 17049163U, // UQSHRNh 2259*9a0e4156SSadaf Ebrahimi 17049163U, // UQSHRNs 2260*9a0e4156SSadaf Ebrahimi 1644179755U, // UQSHRNv16i8_shift 2261*9a0e4156SSadaf Ebrahimi 537400907U, // UQSHRNv2i32_shift 2262*9a0e4156SSadaf Ebrahimi 1074796107U, // UQSHRNv4i16_shift 2263*9a0e4156SSadaf Ebrahimi 571748651U, // UQSHRNv4i32_shift 2264*9a0e4156SSadaf Ebrahimi 1108881707U, // UQSHRNv8i16_shift 2265*9a0e4156SSadaf Ebrahimi 1612453451U, // UQSHRNv8i8_shift 2266*9a0e4156SSadaf Ebrahimi 2147488471U, // UQSUBv16i8 2267*9a0e4156SSadaf Ebrahimi 17048279U, // UQSUBv1i16 2268*9a0e4156SSadaf Ebrahimi 17048279U, // UQSUBv1i32 2269*9a0e4156SSadaf Ebrahimi 17048279U, // UQSUBv1i64 2270*9a0e4156SSadaf Ebrahimi 17048279U, // UQSUBv1i8 2271*9a0e4156SSadaf Ebrahimi 2684883671U, // UQSUBv2i32 2272*9a0e4156SSadaf Ebrahimi 537662167U, // UQSUBv2i64 2273*9a0e4156SSadaf Ebrahimi 3222278871U, // UQSUBv4i16 2274*9a0e4156SSadaf Ebrahimi 1075057367U, // UQSUBv4i32 2275*9a0e4156SSadaf Ebrahimi 1612190423U, // UQSUBv8i16 2276*9a0e4156SSadaf Ebrahimi 3759936215U, // UQSUBv8i8 2277*9a0e4156SSadaf Ebrahimi 3254792542U, // UQXTNv16i8 2278*9a0e4156SSadaf Ebrahimi 553920128U, // UQXTNv1i16 2279*9a0e4156SSadaf Ebrahimi 553920128U, // UQXTNv1i32 2280*9a0e4156SSadaf Ebrahimi 553920128U, // UQXTNv1i8 2281*9a0e4156SSadaf Ebrahimi 1611142784U, // UQXTNv2i32 2282*9a0e4156SSadaf Ebrahimi 2685408896U, // UQXTNv4i16 2283*9a0e4156SSadaf Ebrahimi 1645490526U, // UQXTNv4i32 2284*9a0e4156SSadaf Ebrahimi 2719494494U, // UQXTNv8i16 2285*9a0e4156SSadaf Ebrahimi 3223066240U, // UQXTNv8i8 2286*9a0e4156SSadaf Ebrahimi 1074271121U, // URECPEv2i32 2287*9a0e4156SSadaf Ebrahimi 2685670289U, // URECPEv4i32 2288*9a0e4156SSadaf Ebrahimi 2147488564U, // URHADDv16i8 2289*9a0e4156SSadaf Ebrahimi 2684883764U, // URHADDv2i32 2290*9a0e4156SSadaf Ebrahimi 3222278964U, // URHADDv4i16 2291*9a0e4156SSadaf Ebrahimi 1075057460U, // URHADDv4i32 2292*9a0e4156SSadaf Ebrahimi 1612190516U, // URHADDv8i16 2293*9a0e4156SSadaf Ebrahimi 3759936308U, // URHADDv8i8 2294*9a0e4156SSadaf Ebrahimi 2147489123U, // URSHLv16i8 2295*9a0e4156SSadaf Ebrahimi 17048931U, // URSHLv1i64 2296*9a0e4156SSadaf Ebrahimi 2684884323U, // URSHLv2i32 2297*9a0e4156SSadaf Ebrahimi 537662819U, // URSHLv2i64 2298*9a0e4156SSadaf Ebrahimi 3222279523U, // URSHLv4i16 2299*9a0e4156SSadaf Ebrahimi 1075058019U, // URSHLv4i32 2300*9a0e4156SSadaf Ebrahimi 1612191075U, // URSHLv8i16 2301*9a0e4156SSadaf Ebrahimi 3759936867U, // URSHLv8i8 2302*9a0e4156SSadaf Ebrahimi 17049508U, // URSHRd 2303*9a0e4156SSadaf Ebrahimi 2147489700U, // URSHRv16i8_shift 2304*9a0e4156SSadaf Ebrahimi 2684884900U, // URSHRv2i32_shift 2305*9a0e4156SSadaf Ebrahimi 537663396U, // URSHRv2i64_shift 2306*9a0e4156SSadaf Ebrahimi 3222280100U, // URSHRv4i16_shift 2307*9a0e4156SSadaf Ebrahimi 1075058596U, // URSHRv4i32_shift 2308*9a0e4156SSadaf Ebrahimi 1612191652U, // URSHRv8i16_shift 2309*9a0e4156SSadaf Ebrahimi 3759937444U, // URSHRv8i8_shift 2310*9a0e4156SSadaf Ebrahimi 1074271159U, // URSQRTEv2i32 2311*9a0e4156SSadaf Ebrahimi 2685670327U, // URSQRTEv4i32 2312*9a0e4156SSadaf Ebrahimi 67404295U, // URSRAd 2313*9a0e4156SSadaf Ebrahimi 2181050887U, // URSRAv16i8_shift 2314*9a0e4156SSadaf Ebrahimi 2718446087U, // URSRAv2i32_shift 2315*9a0e4156SSadaf Ebrahimi 571224583U, // URSRAv2i64_shift 2316*9a0e4156SSadaf Ebrahimi 3255841287U, // URSRAv4i16_shift 2317*9a0e4156SSadaf Ebrahimi 1108619783U, // URSRAv4i32_shift 2318*9a0e4156SSadaf Ebrahimi 1645752839U, // URSRAv8i16_shift 2319*9a0e4156SSadaf Ebrahimi 3793498631U, // URSRAv8i8_shift 2320*9a0e4156SSadaf Ebrahimi 2149060804U, // USHLLv16i8_shift 2321*9a0e4156SSadaf Ebrahimi 2685146493U, // USHLLv2i32_shift 2322*9a0e4156SSadaf Ebrahimi 3222541693U, // USHLLv4i16_shift 2323*9a0e4156SSadaf Ebrahimi 1074532548U, // USHLLv4i32_shift 2324*9a0e4156SSadaf Ebrahimi 1611927748U, // USHLLv8i16_shift 2325*9a0e4156SSadaf Ebrahimi 3759674749U, // USHLLv8i8_shift 2326*9a0e4156SSadaf Ebrahimi 2147489136U, // USHLv16i8 2327*9a0e4156SSadaf Ebrahimi 17048944U, // USHLv1i64 2328*9a0e4156SSadaf Ebrahimi 2684884336U, // USHLv2i32 2329*9a0e4156SSadaf Ebrahimi 537662832U, // USHLv2i64 2330*9a0e4156SSadaf Ebrahimi 3222279536U, // USHLv4i16 2331*9a0e4156SSadaf Ebrahimi 1075058032U, // USHLv4i32 2332*9a0e4156SSadaf Ebrahimi 1612191088U, // USHLv8i16 2333*9a0e4156SSadaf Ebrahimi 3759936880U, // USHLv8i8 2334*9a0e4156SSadaf Ebrahimi 17049521U, // USHRd 2335*9a0e4156SSadaf Ebrahimi 2147489713U, // USHRv16i8_shift 2336*9a0e4156SSadaf Ebrahimi 2684884913U, // USHRv2i32_shift 2337*9a0e4156SSadaf Ebrahimi 537663409U, // USHRv2i64_shift 2338*9a0e4156SSadaf Ebrahimi 3222280113U, // USHRv4i16_shift 2339*9a0e4156SSadaf Ebrahimi 1075058609U, // USHRv4i32_shift 2340*9a0e4156SSadaf Ebrahimi 1612191665U, // USHRv8i16_shift 2341*9a0e4156SSadaf Ebrahimi 3759937457U, // USHRv8i8_shift 2342*9a0e4156SSadaf Ebrahimi 33567577U, // USQADDv16i8 2343*9a0e4156SSadaf Ebrahimi 604275545U, // USQADDv1i16 2344*9a0e4156SSadaf Ebrahimi 604275545U, // USQADDv1i32 2345*9a0e4156SSadaf Ebrahimi 604275545U, // USQADDv1i64 2346*9a0e4156SSadaf Ebrahimi 604275545U, // USQADDv1i8 2347*9a0e4156SSadaf Ebrahimi 1107833689U, // USQADDv2i32 2348*9a0e4156SSadaf Ebrahimi 1644966745U, // USQADDv2i64 2349*9a0e4156SSadaf Ebrahimi 2182099801U, // USQADDv4i16 2350*9a0e4156SSadaf Ebrahimi 2719232857U, // USQADDv4i32 2351*9a0e4156SSadaf Ebrahimi 3256365913U, // USQADDv8i16 2352*9a0e4156SSadaf Ebrahimi 3793498969U, // USQADDv8i8 2353*9a0e4156SSadaf Ebrahimi 67404308U, // USRAd 2354*9a0e4156SSadaf Ebrahimi 2181050900U, // USRAv16i8_shift 2355*9a0e4156SSadaf Ebrahimi 2718446100U, // USRAv2i32_shift 2356*9a0e4156SSadaf Ebrahimi 571224596U, // USRAv2i64_shift 2357*9a0e4156SSadaf Ebrahimi 3255841300U, // USRAv4i16_shift 2358*9a0e4156SSadaf Ebrahimi 1108619796U, // USRAv4i32_shift 2359*9a0e4156SSadaf Ebrahimi 1645752852U, // USRAv8i16_shift 2360*9a0e4156SSadaf Ebrahimi 3793498644U, // USRAv8i8_shift 2361*9a0e4156SSadaf Ebrahimi 2149060756U, // USUBLv16i8_v8i16 2362*9a0e4156SSadaf Ebrahimi 2685146372U, // USUBLv2i32_v2i64 2363*9a0e4156SSadaf Ebrahimi 3222541572U, // USUBLv4i16_v4i32 2364*9a0e4156SSadaf Ebrahimi 1074532500U, // USUBLv4i32_v2i64 2365*9a0e4156SSadaf Ebrahimi 1611927700U, // USUBLv8i16_v4i32 2366*9a0e4156SSadaf Ebrahimi 3759674628U, // USUBLv8i8_v8i16 2367*9a0e4156SSadaf Ebrahimi 1612190125U, // USUBWv16i8_v8i16 2368*9a0e4156SSadaf Ebrahimi 537663920U, // USUBWv2i32_v2i64 2369*9a0e4156SSadaf Ebrahimi 1075059120U, // USUBWv4i16_v4i32 2370*9a0e4156SSadaf Ebrahimi 537661869U, // USUBWv4i32_v2i64 2371*9a0e4156SSadaf Ebrahimi 1075057069U, // USUBWv8i16_v4i32 2372*9a0e4156SSadaf Ebrahimi 1612192176U, // USUBWv8i8_v8i16 2373*9a0e4156SSadaf Ebrahimi 2147487782U, // UZP1v16i8 2374*9a0e4156SSadaf Ebrahimi 2684882982U, // UZP1v2i32 2375*9a0e4156SSadaf Ebrahimi 537661478U, // UZP1v2i64 2376*9a0e4156SSadaf Ebrahimi 3222278182U, // UZP1v4i16 2377*9a0e4156SSadaf Ebrahimi 1075056678U, // UZP1v4i32 2378*9a0e4156SSadaf Ebrahimi 1612189734U, // UZP1v8i16 2379*9a0e4156SSadaf Ebrahimi 3759935526U, // UZP1v8i8 2380*9a0e4156SSadaf Ebrahimi 2147488147U, // UZP2v16i8 2381*9a0e4156SSadaf Ebrahimi 2684883347U, // UZP2v2i32 2382*9a0e4156SSadaf Ebrahimi 537661843U, // UZP2v2i64 2383*9a0e4156SSadaf Ebrahimi 3222278547U, // UZP2v4i16 2384*9a0e4156SSadaf Ebrahimi 1075057043U, // UZP2v4i32 2385*9a0e4156SSadaf Ebrahimi 1612190099U, // UZP2v8i16 2386*9a0e4156SSadaf Ebrahimi 3759935891U, // UZP2v8i8 2387*9a0e4156SSadaf Ebrahimi 3254792536U, // XTNv16i8 2388*9a0e4156SSadaf Ebrahimi 1611142779U, // XTNv2i32 2389*9a0e4156SSadaf Ebrahimi 2685408891U, // XTNv4i16 2390*9a0e4156SSadaf Ebrahimi 1645490520U, // XTNv4i32 2391*9a0e4156SSadaf Ebrahimi 2719494488U, // XTNv8i16 2392*9a0e4156SSadaf Ebrahimi 3223066235U, // XTNv8i8 2393*9a0e4156SSadaf Ebrahimi 2147487776U, // ZIP1v16i8 2394*9a0e4156SSadaf Ebrahimi 2684882976U, // ZIP1v2i32 2395*9a0e4156SSadaf Ebrahimi 537661472U, // ZIP1v2i64 2396*9a0e4156SSadaf Ebrahimi 3222278176U, // ZIP1v4i16 2397*9a0e4156SSadaf Ebrahimi 1075056672U, // ZIP1v4i32 2398*9a0e4156SSadaf Ebrahimi 1612189728U, // ZIP1v8i16 2399*9a0e4156SSadaf Ebrahimi 3759935520U, // ZIP1v8i8 2400*9a0e4156SSadaf Ebrahimi 2147488141U, // ZIP2v16i8 2401*9a0e4156SSadaf Ebrahimi 2684883341U, // ZIP2v2i32 2402*9a0e4156SSadaf Ebrahimi 537661837U, // ZIP2v2i64 2403*9a0e4156SSadaf Ebrahimi 3222278541U, // ZIP2v4i16 2404*9a0e4156SSadaf Ebrahimi 1075057037U, // ZIP2v4i32 2405*9a0e4156SSadaf Ebrahimi 1612190093U, // ZIP2v8i16 2406*9a0e4156SSadaf Ebrahimi 3759935885U, // ZIP2v8i8 2407*9a0e4156SSadaf Ebrahimi 0U 2408*9a0e4156SSadaf Ebrahimi }; 2409*9a0e4156SSadaf Ebrahimi 2410*9a0e4156SSadaf Ebrahimi static const uint32_t OpInfo2[] = { 2411*9a0e4156SSadaf Ebrahimi 0U, // PHI 2412*9a0e4156SSadaf Ebrahimi 0U, // INLINEASM 2413*9a0e4156SSadaf Ebrahimi 0U, // CFI_INSTRUCTION 2414*9a0e4156SSadaf Ebrahimi 0U, // EH_LABEL 2415*9a0e4156SSadaf Ebrahimi 0U, // GC_LABEL 2416*9a0e4156SSadaf Ebrahimi 0U, // KILL 2417*9a0e4156SSadaf Ebrahimi 0U, // EXTRACT_SUBREG 2418*9a0e4156SSadaf Ebrahimi 0U, // INSERT_SUBREG 2419*9a0e4156SSadaf Ebrahimi 0U, // IMPLICIT_DEF 2420*9a0e4156SSadaf Ebrahimi 0U, // SUBREG_TO_REG 2421*9a0e4156SSadaf Ebrahimi 0U, // COPY_TO_REGCLASS 2422*9a0e4156SSadaf Ebrahimi 0U, // DBG_VALUE 2423*9a0e4156SSadaf Ebrahimi 0U, // REG_SEQUENCE 2424*9a0e4156SSadaf Ebrahimi 0U, // COPY 2425*9a0e4156SSadaf Ebrahimi 0U, // BUNDLE 2426*9a0e4156SSadaf Ebrahimi 0U, // LIFETIME_START 2427*9a0e4156SSadaf Ebrahimi 0U, // LIFETIME_END 2428*9a0e4156SSadaf Ebrahimi 0U, // STACKMAP 2429*9a0e4156SSadaf Ebrahimi 0U, // PATCHPOINT 2430*9a0e4156SSadaf Ebrahimi 0U, // LOAD_STACK_GUARD 2431*9a0e4156SSadaf Ebrahimi 0U, // STATEPOINT 2432*9a0e4156SSadaf Ebrahimi 0U, // FRAME_ALLOC 2433*9a0e4156SSadaf Ebrahimi 0U, // ABSv16i8 2434*9a0e4156SSadaf Ebrahimi 0U, // ABSv1i64 2435*9a0e4156SSadaf Ebrahimi 0U, // ABSv2i32 2436*9a0e4156SSadaf Ebrahimi 0U, // ABSv2i64 2437*9a0e4156SSadaf Ebrahimi 0U, // ABSv4i16 2438*9a0e4156SSadaf Ebrahimi 0U, // ABSv4i32 2439*9a0e4156SSadaf Ebrahimi 0U, // ABSv8i16 2440*9a0e4156SSadaf Ebrahimi 0U, // ABSv8i8 2441*9a0e4156SSadaf Ebrahimi 1U, // ADCSWr 2442*9a0e4156SSadaf Ebrahimi 1U, // ADCSXr 2443*9a0e4156SSadaf Ebrahimi 1U, // ADCWr 2444*9a0e4156SSadaf Ebrahimi 1U, // ADCXr 2445*9a0e4156SSadaf Ebrahimi 265U, // ADDHNv2i64_v2i32 2446*9a0e4156SSadaf Ebrahimi 273U, // ADDHNv2i64_v4i32 2447*9a0e4156SSadaf Ebrahimi 521U, // ADDHNv4i32_v4i16 2448*9a0e4156SSadaf Ebrahimi 529U, // ADDHNv4i32_v8i16 2449*9a0e4156SSadaf Ebrahimi 785U, // ADDHNv8i16_v16i8 2450*9a0e4156SSadaf Ebrahimi 777U, // ADDHNv8i16_v8i8 2451*9a0e4156SSadaf Ebrahimi 1033U, // ADDPv16i8 2452*9a0e4156SSadaf Ebrahimi 1289U, // ADDPv2i32 2453*9a0e4156SSadaf Ebrahimi 265U, // ADDPv2i64 2454*9a0e4156SSadaf Ebrahimi 0U, // ADDPv2i64p 2455*9a0e4156SSadaf Ebrahimi 1545U, // ADDPv4i16 2456*9a0e4156SSadaf Ebrahimi 521U, // ADDPv4i32 2457*9a0e4156SSadaf Ebrahimi 777U, // ADDPv8i16 2458*9a0e4156SSadaf Ebrahimi 1801U, // ADDPv8i8 2459*9a0e4156SSadaf Ebrahimi 25U, // ADDSWri 2460*9a0e4156SSadaf Ebrahimi 0U, // ADDSWrr 2461*9a0e4156SSadaf Ebrahimi 33U, // ADDSWrs 2462*9a0e4156SSadaf Ebrahimi 41U, // ADDSWrx 2463*9a0e4156SSadaf Ebrahimi 25U, // ADDSXri 2464*9a0e4156SSadaf Ebrahimi 0U, // ADDSXrr 2465*9a0e4156SSadaf Ebrahimi 33U, // ADDSXrs 2466*9a0e4156SSadaf Ebrahimi 41U, // ADDSXrx 2467*9a0e4156SSadaf Ebrahimi 2049U, // ADDSXrx64 2468*9a0e4156SSadaf Ebrahimi 0U, // ADDVv16i8v 2469*9a0e4156SSadaf Ebrahimi 0U, // ADDVv4i16v 2470*9a0e4156SSadaf Ebrahimi 0U, // ADDVv4i32v 2471*9a0e4156SSadaf Ebrahimi 0U, // ADDVv8i16v 2472*9a0e4156SSadaf Ebrahimi 0U, // ADDVv8i8v 2473*9a0e4156SSadaf Ebrahimi 25U, // ADDWri 2474*9a0e4156SSadaf Ebrahimi 0U, // ADDWrr 2475*9a0e4156SSadaf Ebrahimi 33U, // ADDWrs 2476*9a0e4156SSadaf Ebrahimi 41U, // ADDWrx 2477*9a0e4156SSadaf Ebrahimi 25U, // ADDXri 2478*9a0e4156SSadaf Ebrahimi 0U, // ADDXrr 2479*9a0e4156SSadaf Ebrahimi 33U, // ADDXrs 2480*9a0e4156SSadaf Ebrahimi 41U, // ADDXrx 2481*9a0e4156SSadaf Ebrahimi 2049U, // ADDXrx64 2482*9a0e4156SSadaf Ebrahimi 1033U, // ADDv16i8 2483*9a0e4156SSadaf Ebrahimi 1U, // ADDv1i64 2484*9a0e4156SSadaf Ebrahimi 1289U, // ADDv2i32 2485*9a0e4156SSadaf Ebrahimi 265U, // ADDv2i64 2486*9a0e4156SSadaf Ebrahimi 1545U, // ADDv4i16 2487*9a0e4156SSadaf Ebrahimi 521U, // ADDv4i32 2488*9a0e4156SSadaf Ebrahimi 777U, // ADDv8i16 2489*9a0e4156SSadaf Ebrahimi 1801U, // ADDv8i8 2490*9a0e4156SSadaf Ebrahimi 0U, // ADJCALLSTACKDOWN 2491*9a0e4156SSadaf Ebrahimi 0U, // ADJCALLSTACKUP 2492*9a0e4156SSadaf Ebrahimi 0U, // ADR 2493*9a0e4156SSadaf Ebrahimi 0U, // ADRP 2494*9a0e4156SSadaf Ebrahimi 0U, // AESDrr 2495*9a0e4156SSadaf Ebrahimi 0U, // AESErr 2496*9a0e4156SSadaf Ebrahimi 0U, // AESIMCrr 2497*9a0e4156SSadaf Ebrahimi 0U, // AESMCrr 2498*9a0e4156SSadaf Ebrahimi 49U, // ANDSWri 2499*9a0e4156SSadaf Ebrahimi 0U, // ANDSWrr 2500*9a0e4156SSadaf Ebrahimi 33U, // ANDSWrs 2501*9a0e4156SSadaf Ebrahimi 57U, // ANDSXri 2502*9a0e4156SSadaf Ebrahimi 0U, // ANDSXrr 2503*9a0e4156SSadaf Ebrahimi 33U, // ANDSXrs 2504*9a0e4156SSadaf Ebrahimi 49U, // ANDWri 2505*9a0e4156SSadaf Ebrahimi 0U, // ANDWrr 2506*9a0e4156SSadaf Ebrahimi 33U, // ANDWrs 2507*9a0e4156SSadaf Ebrahimi 57U, // ANDXri 2508*9a0e4156SSadaf Ebrahimi 0U, // ANDXrr 2509*9a0e4156SSadaf Ebrahimi 33U, // ANDXrs 2510*9a0e4156SSadaf Ebrahimi 1033U, // ANDv16i8 2511*9a0e4156SSadaf Ebrahimi 1801U, // ANDv8i8 2512*9a0e4156SSadaf Ebrahimi 1U, // ASRVWr 2513*9a0e4156SSadaf Ebrahimi 1U, // ASRVXr 2514*9a0e4156SSadaf Ebrahimi 0U, // B 2515*9a0e4156SSadaf Ebrahimi 2369U, // BFMWri 2516*9a0e4156SSadaf Ebrahimi 2369U, // BFMXri 2517*9a0e4156SSadaf Ebrahimi 0U, // BICSWrr 2518*9a0e4156SSadaf Ebrahimi 33U, // BICSWrs 2519*9a0e4156SSadaf Ebrahimi 0U, // BICSXrr 2520*9a0e4156SSadaf Ebrahimi 33U, // BICSXrs 2521*9a0e4156SSadaf Ebrahimi 0U, // BICWrr 2522*9a0e4156SSadaf Ebrahimi 33U, // BICWrs 2523*9a0e4156SSadaf Ebrahimi 0U, // BICXrr 2524*9a0e4156SSadaf Ebrahimi 33U, // BICXrs 2525*9a0e4156SSadaf Ebrahimi 1033U, // BICv16i8 2526*9a0e4156SSadaf Ebrahimi 0U, // BICv2i32 2527*9a0e4156SSadaf Ebrahimi 0U, // BICv4i16 2528*9a0e4156SSadaf Ebrahimi 0U, // BICv4i32 2529*9a0e4156SSadaf Ebrahimi 0U, // BICv8i16 2530*9a0e4156SSadaf Ebrahimi 1801U, // BICv8i8 2531*9a0e4156SSadaf Ebrahimi 1033U, // BIFv16i8 2532*9a0e4156SSadaf Ebrahimi 1801U, // BIFv8i8 2533*9a0e4156SSadaf Ebrahimi 1041U, // BITv16i8 2534*9a0e4156SSadaf Ebrahimi 1809U, // BITv8i8 2535*9a0e4156SSadaf Ebrahimi 0U, // BL 2536*9a0e4156SSadaf Ebrahimi 0U, // BLR 2537*9a0e4156SSadaf Ebrahimi 0U, // BR 2538*9a0e4156SSadaf Ebrahimi 0U, // BRK 2539*9a0e4156SSadaf Ebrahimi 1041U, // BSLv16i8 2540*9a0e4156SSadaf Ebrahimi 1809U, // BSLv8i8 2541*9a0e4156SSadaf Ebrahimi 0U, // Bcc 2542*9a0e4156SSadaf Ebrahimi 0U, // CBNZW 2543*9a0e4156SSadaf Ebrahimi 0U, // CBNZX 2544*9a0e4156SSadaf Ebrahimi 0U, // CBZW 2545*9a0e4156SSadaf Ebrahimi 0U, // CBZX 2546*9a0e4156SSadaf Ebrahimi 10497U, // CCMNWi 2547*9a0e4156SSadaf Ebrahimi 10497U, // CCMNWr 2548*9a0e4156SSadaf Ebrahimi 10497U, // CCMNXi 2549*9a0e4156SSadaf Ebrahimi 10497U, // CCMNXr 2550*9a0e4156SSadaf Ebrahimi 10497U, // CCMPWi 2551*9a0e4156SSadaf Ebrahimi 10497U, // CCMPWr 2552*9a0e4156SSadaf Ebrahimi 10497U, // CCMPXi 2553*9a0e4156SSadaf Ebrahimi 10497U, // CCMPXr 2554*9a0e4156SSadaf Ebrahimi 0U, // CLREX 2555*9a0e4156SSadaf Ebrahimi 0U, // CLSWr 2556*9a0e4156SSadaf Ebrahimi 0U, // CLSXr 2557*9a0e4156SSadaf Ebrahimi 0U, // CLSv16i8 2558*9a0e4156SSadaf Ebrahimi 0U, // CLSv2i32 2559*9a0e4156SSadaf Ebrahimi 0U, // CLSv4i16 2560*9a0e4156SSadaf Ebrahimi 0U, // CLSv4i32 2561*9a0e4156SSadaf Ebrahimi 0U, // CLSv8i16 2562*9a0e4156SSadaf Ebrahimi 0U, // CLSv8i8 2563*9a0e4156SSadaf Ebrahimi 0U, // CLZWr 2564*9a0e4156SSadaf Ebrahimi 0U, // CLZXr 2565*9a0e4156SSadaf Ebrahimi 0U, // CLZv16i8 2566*9a0e4156SSadaf Ebrahimi 0U, // CLZv2i32 2567*9a0e4156SSadaf Ebrahimi 0U, // CLZv4i16 2568*9a0e4156SSadaf Ebrahimi 0U, // CLZv4i32 2569*9a0e4156SSadaf Ebrahimi 0U, // CLZv8i16 2570*9a0e4156SSadaf Ebrahimi 0U, // CLZv8i8 2571*9a0e4156SSadaf Ebrahimi 1033U, // CMEQv16i8 2572*9a0e4156SSadaf Ebrahimi 2U, // CMEQv16i8rz 2573*9a0e4156SSadaf Ebrahimi 1U, // CMEQv1i64 2574*9a0e4156SSadaf Ebrahimi 2U, // CMEQv1i64rz 2575*9a0e4156SSadaf Ebrahimi 1289U, // CMEQv2i32 2576*9a0e4156SSadaf Ebrahimi 2U, // CMEQv2i32rz 2577*9a0e4156SSadaf Ebrahimi 265U, // CMEQv2i64 2578*9a0e4156SSadaf Ebrahimi 2U, // CMEQv2i64rz 2579*9a0e4156SSadaf Ebrahimi 1545U, // CMEQv4i16 2580*9a0e4156SSadaf Ebrahimi 2U, // CMEQv4i16rz 2581*9a0e4156SSadaf Ebrahimi 521U, // CMEQv4i32 2582*9a0e4156SSadaf Ebrahimi 2U, // CMEQv4i32rz 2583*9a0e4156SSadaf Ebrahimi 777U, // CMEQv8i16 2584*9a0e4156SSadaf Ebrahimi 2U, // CMEQv8i16rz 2585*9a0e4156SSadaf Ebrahimi 1801U, // CMEQv8i8 2586*9a0e4156SSadaf Ebrahimi 2U, // CMEQv8i8rz 2587*9a0e4156SSadaf Ebrahimi 1033U, // CMGEv16i8 2588*9a0e4156SSadaf Ebrahimi 2U, // CMGEv16i8rz 2589*9a0e4156SSadaf Ebrahimi 1U, // CMGEv1i64 2590*9a0e4156SSadaf Ebrahimi 2U, // CMGEv1i64rz 2591*9a0e4156SSadaf Ebrahimi 1289U, // CMGEv2i32 2592*9a0e4156SSadaf Ebrahimi 2U, // CMGEv2i32rz 2593*9a0e4156SSadaf Ebrahimi 265U, // CMGEv2i64 2594*9a0e4156SSadaf Ebrahimi 2U, // CMGEv2i64rz 2595*9a0e4156SSadaf Ebrahimi 1545U, // CMGEv4i16 2596*9a0e4156SSadaf Ebrahimi 2U, // CMGEv4i16rz 2597*9a0e4156SSadaf Ebrahimi 521U, // CMGEv4i32 2598*9a0e4156SSadaf Ebrahimi 2U, // CMGEv4i32rz 2599*9a0e4156SSadaf Ebrahimi 777U, // CMGEv8i16 2600*9a0e4156SSadaf Ebrahimi 2U, // CMGEv8i16rz 2601*9a0e4156SSadaf Ebrahimi 1801U, // CMGEv8i8 2602*9a0e4156SSadaf Ebrahimi 2U, // CMGEv8i8rz 2603*9a0e4156SSadaf Ebrahimi 1033U, // CMGTv16i8 2604*9a0e4156SSadaf Ebrahimi 2U, // CMGTv16i8rz 2605*9a0e4156SSadaf Ebrahimi 1U, // CMGTv1i64 2606*9a0e4156SSadaf Ebrahimi 2U, // CMGTv1i64rz 2607*9a0e4156SSadaf Ebrahimi 1289U, // CMGTv2i32 2608*9a0e4156SSadaf Ebrahimi 2U, // CMGTv2i32rz 2609*9a0e4156SSadaf Ebrahimi 265U, // CMGTv2i64 2610*9a0e4156SSadaf Ebrahimi 2U, // CMGTv2i64rz 2611*9a0e4156SSadaf Ebrahimi 1545U, // CMGTv4i16 2612*9a0e4156SSadaf Ebrahimi 2U, // CMGTv4i16rz 2613*9a0e4156SSadaf Ebrahimi 521U, // CMGTv4i32 2614*9a0e4156SSadaf Ebrahimi 2U, // CMGTv4i32rz 2615*9a0e4156SSadaf Ebrahimi 777U, // CMGTv8i16 2616*9a0e4156SSadaf Ebrahimi 2U, // CMGTv8i16rz 2617*9a0e4156SSadaf Ebrahimi 1801U, // CMGTv8i8 2618*9a0e4156SSadaf Ebrahimi 2U, // CMGTv8i8rz 2619*9a0e4156SSadaf Ebrahimi 1033U, // CMHIv16i8 2620*9a0e4156SSadaf Ebrahimi 1U, // CMHIv1i64 2621*9a0e4156SSadaf Ebrahimi 1289U, // CMHIv2i32 2622*9a0e4156SSadaf Ebrahimi 265U, // CMHIv2i64 2623*9a0e4156SSadaf Ebrahimi 1545U, // CMHIv4i16 2624*9a0e4156SSadaf Ebrahimi 521U, // CMHIv4i32 2625*9a0e4156SSadaf Ebrahimi 777U, // CMHIv8i16 2626*9a0e4156SSadaf Ebrahimi 1801U, // CMHIv8i8 2627*9a0e4156SSadaf Ebrahimi 1033U, // CMHSv16i8 2628*9a0e4156SSadaf Ebrahimi 1U, // CMHSv1i64 2629*9a0e4156SSadaf Ebrahimi 1289U, // CMHSv2i32 2630*9a0e4156SSadaf Ebrahimi 265U, // CMHSv2i64 2631*9a0e4156SSadaf Ebrahimi 1545U, // CMHSv4i16 2632*9a0e4156SSadaf Ebrahimi 521U, // CMHSv4i32 2633*9a0e4156SSadaf Ebrahimi 777U, // CMHSv8i16 2634*9a0e4156SSadaf Ebrahimi 1801U, // CMHSv8i8 2635*9a0e4156SSadaf Ebrahimi 2U, // CMLEv16i8rz 2636*9a0e4156SSadaf Ebrahimi 2U, // CMLEv1i64rz 2637*9a0e4156SSadaf Ebrahimi 2U, // CMLEv2i32rz 2638*9a0e4156SSadaf Ebrahimi 2U, // CMLEv2i64rz 2639*9a0e4156SSadaf Ebrahimi 2U, // CMLEv4i16rz 2640*9a0e4156SSadaf Ebrahimi 2U, // CMLEv4i32rz 2641*9a0e4156SSadaf Ebrahimi 2U, // CMLEv8i16rz 2642*9a0e4156SSadaf Ebrahimi 2U, // CMLEv8i8rz 2643*9a0e4156SSadaf Ebrahimi 2U, // CMLTv16i8rz 2644*9a0e4156SSadaf Ebrahimi 2U, // CMLTv1i64rz 2645*9a0e4156SSadaf Ebrahimi 2U, // CMLTv2i32rz 2646*9a0e4156SSadaf Ebrahimi 2U, // CMLTv2i64rz 2647*9a0e4156SSadaf Ebrahimi 2U, // CMLTv4i16rz 2648*9a0e4156SSadaf Ebrahimi 2U, // CMLTv4i32rz 2649*9a0e4156SSadaf Ebrahimi 2U, // CMLTv8i16rz 2650*9a0e4156SSadaf Ebrahimi 2U, // CMLTv8i8rz 2651*9a0e4156SSadaf Ebrahimi 1033U, // CMTSTv16i8 2652*9a0e4156SSadaf Ebrahimi 1U, // CMTSTv1i64 2653*9a0e4156SSadaf Ebrahimi 1289U, // CMTSTv2i32 2654*9a0e4156SSadaf Ebrahimi 265U, // CMTSTv2i64 2655*9a0e4156SSadaf Ebrahimi 1545U, // CMTSTv4i16 2656*9a0e4156SSadaf Ebrahimi 521U, // CMTSTv4i32 2657*9a0e4156SSadaf Ebrahimi 777U, // CMTSTv8i16 2658*9a0e4156SSadaf Ebrahimi 1801U, // CMTSTv8i8 2659*9a0e4156SSadaf Ebrahimi 0U, // CNTv16i8 2660*9a0e4156SSadaf Ebrahimi 0U, // CNTv8i8 2661*9a0e4156SSadaf Ebrahimi 75U, // CPYi16 2662*9a0e4156SSadaf Ebrahimi 75U, // CPYi32 2663*9a0e4156SSadaf Ebrahimi 75U, // CPYi64 2664*9a0e4156SSadaf Ebrahimi 75U, // CPYi8 2665*9a0e4156SSadaf Ebrahimi 1U, // CRC32Brr 2666*9a0e4156SSadaf Ebrahimi 1U, // CRC32CBrr 2667*9a0e4156SSadaf Ebrahimi 1U, // CRC32CHrr 2668*9a0e4156SSadaf Ebrahimi 1U, // CRC32CWrr 2669*9a0e4156SSadaf Ebrahimi 1U, // CRC32CXrr 2670*9a0e4156SSadaf Ebrahimi 1U, // CRC32Hrr 2671*9a0e4156SSadaf Ebrahimi 1U, // CRC32Wrr 2672*9a0e4156SSadaf Ebrahimi 1U, // CRC32Xrr 2673*9a0e4156SSadaf Ebrahimi 10497U, // CSELWr 2674*9a0e4156SSadaf Ebrahimi 10497U, // CSELXr 2675*9a0e4156SSadaf Ebrahimi 10497U, // CSINCWr 2676*9a0e4156SSadaf Ebrahimi 10497U, // CSINCXr 2677*9a0e4156SSadaf Ebrahimi 10497U, // CSINVWr 2678*9a0e4156SSadaf Ebrahimi 10497U, // CSINVXr 2679*9a0e4156SSadaf Ebrahimi 10497U, // CSNEGWr 2680*9a0e4156SSadaf Ebrahimi 10497U, // CSNEGXr 2681*9a0e4156SSadaf Ebrahimi 0U, // DCPS1 2682*9a0e4156SSadaf Ebrahimi 0U, // DCPS2 2683*9a0e4156SSadaf Ebrahimi 0U, // DCPS3 2684*9a0e4156SSadaf Ebrahimi 0U, // DMB 2685*9a0e4156SSadaf Ebrahimi 0U, // DRPS 2686*9a0e4156SSadaf Ebrahimi 0U, // DSB 2687*9a0e4156SSadaf Ebrahimi 0U, // DUPv16i8gpr 2688*9a0e4156SSadaf Ebrahimi 75U, // DUPv16i8lane 2689*9a0e4156SSadaf Ebrahimi 0U, // DUPv2i32gpr 2690*9a0e4156SSadaf Ebrahimi 75U, // DUPv2i32lane 2691*9a0e4156SSadaf Ebrahimi 0U, // DUPv2i64gpr 2692*9a0e4156SSadaf Ebrahimi 75U, // DUPv2i64lane 2693*9a0e4156SSadaf Ebrahimi 0U, // DUPv4i16gpr 2694*9a0e4156SSadaf Ebrahimi 75U, // DUPv4i16lane 2695*9a0e4156SSadaf Ebrahimi 0U, // DUPv4i32gpr 2696*9a0e4156SSadaf Ebrahimi 75U, // DUPv4i32lane 2697*9a0e4156SSadaf Ebrahimi 0U, // DUPv8i16gpr 2698*9a0e4156SSadaf Ebrahimi 75U, // DUPv8i16lane 2699*9a0e4156SSadaf Ebrahimi 0U, // DUPv8i8gpr 2700*9a0e4156SSadaf Ebrahimi 75U, // DUPv8i8lane 2701*9a0e4156SSadaf Ebrahimi 0U, // EONWrr 2702*9a0e4156SSadaf Ebrahimi 33U, // EONWrs 2703*9a0e4156SSadaf Ebrahimi 0U, // EONXrr 2704*9a0e4156SSadaf Ebrahimi 33U, // EONXrs 2705*9a0e4156SSadaf Ebrahimi 49U, // EORWri 2706*9a0e4156SSadaf Ebrahimi 0U, // EORWrr 2707*9a0e4156SSadaf Ebrahimi 33U, // EORWrs 2708*9a0e4156SSadaf Ebrahimi 57U, // EORXri 2709*9a0e4156SSadaf Ebrahimi 0U, // EORXrr 2710*9a0e4156SSadaf Ebrahimi 33U, // EORXrs 2711*9a0e4156SSadaf Ebrahimi 1033U, // EORv16i8 2712*9a0e4156SSadaf Ebrahimi 1801U, // EORv8i8 2713*9a0e4156SSadaf Ebrahimi 0U, // ERET 2714*9a0e4156SSadaf Ebrahimi 18689U, // EXTRWrri 2715*9a0e4156SSadaf Ebrahimi 18689U, // EXTRXrri 2716*9a0e4156SSadaf Ebrahimi 2569U, // EXTv16i8 2717*9a0e4156SSadaf Ebrahimi 2825U, // EXTv8i8 2718*9a0e4156SSadaf Ebrahimi 0U, // F128CSEL 2719*9a0e4156SSadaf Ebrahimi 1U, // FABD32 2720*9a0e4156SSadaf Ebrahimi 1U, // FABD64 2721*9a0e4156SSadaf Ebrahimi 1289U, // FABDv2f32 2722*9a0e4156SSadaf Ebrahimi 265U, // FABDv2f64 2723*9a0e4156SSadaf Ebrahimi 521U, // FABDv4f32 2724*9a0e4156SSadaf Ebrahimi 0U, // FABSDr 2725*9a0e4156SSadaf Ebrahimi 0U, // FABSSr 2726*9a0e4156SSadaf Ebrahimi 0U, // FABSv2f32 2727*9a0e4156SSadaf Ebrahimi 0U, // FABSv2f64 2728*9a0e4156SSadaf Ebrahimi 0U, // FABSv4f32 2729*9a0e4156SSadaf Ebrahimi 1U, // FACGE32 2730*9a0e4156SSadaf Ebrahimi 1U, // FACGE64 2731*9a0e4156SSadaf Ebrahimi 1289U, // FACGEv2f32 2732*9a0e4156SSadaf Ebrahimi 265U, // FACGEv2f64 2733*9a0e4156SSadaf Ebrahimi 521U, // FACGEv4f32 2734*9a0e4156SSadaf Ebrahimi 1U, // FACGT32 2735*9a0e4156SSadaf Ebrahimi 1U, // FACGT64 2736*9a0e4156SSadaf Ebrahimi 1289U, // FACGTv2f32 2737*9a0e4156SSadaf Ebrahimi 265U, // FACGTv2f64 2738*9a0e4156SSadaf Ebrahimi 521U, // FACGTv4f32 2739*9a0e4156SSadaf Ebrahimi 1U, // FADDDrr 2740*9a0e4156SSadaf Ebrahimi 1289U, // FADDPv2f32 2741*9a0e4156SSadaf Ebrahimi 265U, // FADDPv2f64 2742*9a0e4156SSadaf Ebrahimi 0U, // FADDPv2i32p 2743*9a0e4156SSadaf Ebrahimi 0U, // FADDPv2i64p 2744*9a0e4156SSadaf Ebrahimi 521U, // FADDPv4f32 2745*9a0e4156SSadaf Ebrahimi 1U, // FADDSrr 2746*9a0e4156SSadaf Ebrahimi 1289U, // FADDv2f32 2747*9a0e4156SSadaf Ebrahimi 265U, // FADDv2f64 2748*9a0e4156SSadaf Ebrahimi 521U, // FADDv4f32 2749*9a0e4156SSadaf Ebrahimi 10497U, // FCCMPDrr 2750*9a0e4156SSadaf Ebrahimi 10497U, // FCCMPEDrr 2751*9a0e4156SSadaf Ebrahimi 10497U, // FCCMPESrr 2752*9a0e4156SSadaf Ebrahimi 10497U, // FCCMPSrr 2753*9a0e4156SSadaf Ebrahimi 1U, // FCMEQ32 2754*9a0e4156SSadaf Ebrahimi 1U, // FCMEQ64 2755*9a0e4156SSadaf Ebrahimi 3U, // FCMEQv1i32rz 2756*9a0e4156SSadaf Ebrahimi 3U, // FCMEQv1i64rz 2757*9a0e4156SSadaf Ebrahimi 1289U, // FCMEQv2f32 2758*9a0e4156SSadaf Ebrahimi 265U, // FCMEQv2f64 2759*9a0e4156SSadaf Ebrahimi 3U, // FCMEQv2i32rz 2760*9a0e4156SSadaf Ebrahimi 3U, // FCMEQv2i64rz 2761*9a0e4156SSadaf Ebrahimi 521U, // FCMEQv4f32 2762*9a0e4156SSadaf Ebrahimi 3U, // FCMEQv4i32rz 2763*9a0e4156SSadaf Ebrahimi 1U, // FCMGE32 2764*9a0e4156SSadaf Ebrahimi 1U, // FCMGE64 2765*9a0e4156SSadaf Ebrahimi 3U, // FCMGEv1i32rz 2766*9a0e4156SSadaf Ebrahimi 3U, // FCMGEv1i64rz 2767*9a0e4156SSadaf Ebrahimi 1289U, // FCMGEv2f32 2768*9a0e4156SSadaf Ebrahimi 265U, // FCMGEv2f64 2769*9a0e4156SSadaf Ebrahimi 3U, // FCMGEv2i32rz 2770*9a0e4156SSadaf Ebrahimi 3U, // FCMGEv2i64rz 2771*9a0e4156SSadaf Ebrahimi 521U, // FCMGEv4f32 2772*9a0e4156SSadaf Ebrahimi 3U, // FCMGEv4i32rz 2773*9a0e4156SSadaf Ebrahimi 1U, // FCMGT32 2774*9a0e4156SSadaf Ebrahimi 1U, // FCMGT64 2775*9a0e4156SSadaf Ebrahimi 3U, // FCMGTv1i32rz 2776*9a0e4156SSadaf Ebrahimi 3U, // FCMGTv1i64rz 2777*9a0e4156SSadaf Ebrahimi 1289U, // FCMGTv2f32 2778*9a0e4156SSadaf Ebrahimi 265U, // FCMGTv2f64 2779*9a0e4156SSadaf Ebrahimi 3U, // FCMGTv2i32rz 2780*9a0e4156SSadaf Ebrahimi 3U, // FCMGTv2i64rz 2781*9a0e4156SSadaf Ebrahimi 521U, // FCMGTv4f32 2782*9a0e4156SSadaf Ebrahimi 3U, // FCMGTv4i32rz 2783*9a0e4156SSadaf Ebrahimi 3U, // FCMLEv1i32rz 2784*9a0e4156SSadaf Ebrahimi 3U, // FCMLEv1i64rz 2785*9a0e4156SSadaf Ebrahimi 3U, // FCMLEv2i32rz 2786*9a0e4156SSadaf Ebrahimi 3U, // FCMLEv2i64rz 2787*9a0e4156SSadaf Ebrahimi 3U, // FCMLEv4i32rz 2788*9a0e4156SSadaf Ebrahimi 3U, // FCMLTv1i32rz 2789*9a0e4156SSadaf Ebrahimi 3U, // FCMLTv1i64rz 2790*9a0e4156SSadaf Ebrahimi 3U, // FCMLTv2i32rz 2791*9a0e4156SSadaf Ebrahimi 3U, // FCMLTv2i64rz 2792*9a0e4156SSadaf Ebrahimi 3U, // FCMLTv4i32rz 2793*9a0e4156SSadaf Ebrahimi 0U, // FCMPDri 2794*9a0e4156SSadaf Ebrahimi 0U, // FCMPDrr 2795*9a0e4156SSadaf Ebrahimi 0U, // FCMPEDri 2796*9a0e4156SSadaf Ebrahimi 0U, // FCMPEDrr 2797*9a0e4156SSadaf Ebrahimi 0U, // FCMPESri 2798*9a0e4156SSadaf Ebrahimi 0U, // FCMPESrr 2799*9a0e4156SSadaf Ebrahimi 0U, // FCMPSri 2800*9a0e4156SSadaf Ebrahimi 0U, // FCMPSrr 2801*9a0e4156SSadaf Ebrahimi 10497U, // FCSELDrrr 2802*9a0e4156SSadaf Ebrahimi 10497U, // FCSELSrrr 2803*9a0e4156SSadaf Ebrahimi 0U, // FCVTASUWDr 2804*9a0e4156SSadaf Ebrahimi 0U, // FCVTASUWSr 2805*9a0e4156SSadaf Ebrahimi 0U, // FCVTASUXDr 2806*9a0e4156SSadaf Ebrahimi 0U, // FCVTASUXSr 2807*9a0e4156SSadaf Ebrahimi 0U, // FCVTASv1i32 2808*9a0e4156SSadaf Ebrahimi 0U, // FCVTASv1i64 2809*9a0e4156SSadaf Ebrahimi 0U, // FCVTASv2f32 2810*9a0e4156SSadaf Ebrahimi 0U, // FCVTASv2f64 2811*9a0e4156SSadaf Ebrahimi 0U, // FCVTASv4f32 2812*9a0e4156SSadaf Ebrahimi 0U, // FCVTAUUWDr 2813*9a0e4156SSadaf Ebrahimi 0U, // FCVTAUUWSr 2814*9a0e4156SSadaf Ebrahimi 0U, // FCVTAUUXDr 2815*9a0e4156SSadaf Ebrahimi 0U, // FCVTAUUXSr 2816*9a0e4156SSadaf Ebrahimi 0U, // FCVTAUv1i32 2817*9a0e4156SSadaf Ebrahimi 0U, // FCVTAUv1i64 2818*9a0e4156SSadaf Ebrahimi 0U, // FCVTAUv2f32 2819*9a0e4156SSadaf Ebrahimi 0U, // FCVTAUv2f64 2820*9a0e4156SSadaf Ebrahimi 0U, // FCVTAUv4f32 2821*9a0e4156SSadaf Ebrahimi 0U, // FCVTDHr 2822*9a0e4156SSadaf Ebrahimi 0U, // FCVTDSr 2823*9a0e4156SSadaf Ebrahimi 0U, // FCVTHDr 2824*9a0e4156SSadaf Ebrahimi 0U, // FCVTHSr 2825*9a0e4156SSadaf Ebrahimi 0U, // FCVTLv2i32 2826*9a0e4156SSadaf Ebrahimi 0U, // FCVTLv4i16 2827*9a0e4156SSadaf Ebrahimi 0U, // FCVTLv4i32 2828*9a0e4156SSadaf Ebrahimi 0U, // FCVTLv8i16 2829*9a0e4156SSadaf Ebrahimi 0U, // FCVTMSUWDr 2830*9a0e4156SSadaf Ebrahimi 0U, // FCVTMSUWSr 2831*9a0e4156SSadaf Ebrahimi 0U, // FCVTMSUXDr 2832*9a0e4156SSadaf Ebrahimi 0U, // FCVTMSUXSr 2833*9a0e4156SSadaf Ebrahimi 0U, // FCVTMSv1i32 2834*9a0e4156SSadaf Ebrahimi 0U, // FCVTMSv1i64 2835*9a0e4156SSadaf Ebrahimi 0U, // FCVTMSv2f32 2836*9a0e4156SSadaf Ebrahimi 0U, // FCVTMSv2f64 2837*9a0e4156SSadaf Ebrahimi 0U, // FCVTMSv4f32 2838*9a0e4156SSadaf Ebrahimi 0U, // FCVTMUUWDr 2839*9a0e4156SSadaf Ebrahimi 0U, // FCVTMUUWSr 2840*9a0e4156SSadaf Ebrahimi 0U, // FCVTMUUXDr 2841*9a0e4156SSadaf Ebrahimi 0U, // FCVTMUUXSr 2842*9a0e4156SSadaf Ebrahimi 0U, // FCVTMUv1i32 2843*9a0e4156SSadaf Ebrahimi 0U, // FCVTMUv1i64 2844*9a0e4156SSadaf Ebrahimi 0U, // FCVTMUv2f32 2845*9a0e4156SSadaf Ebrahimi 0U, // FCVTMUv2f64 2846*9a0e4156SSadaf Ebrahimi 0U, // FCVTMUv4f32 2847*9a0e4156SSadaf Ebrahimi 0U, // FCVTNSUWDr 2848*9a0e4156SSadaf Ebrahimi 0U, // FCVTNSUWSr 2849*9a0e4156SSadaf Ebrahimi 0U, // FCVTNSUXDr 2850*9a0e4156SSadaf Ebrahimi 0U, // FCVTNSUXSr 2851*9a0e4156SSadaf Ebrahimi 0U, // FCVTNSv1i32 2852*9a0e4156SSadaf Ebrahimi 0U, // FCVTNSv1i64 2853*9a0e4156SSadaf Ebrahimi 0U, // FCVTNSv2f32 2854*9a0e4156SSadaf Ebrahimi 0U, // FCVTNSv2f64 2855*9a0e4156SSadaf Ebrahimi 0U, // FCVTNSv4f32 2856*9a0e4156SSadaf Ebrahimi 0U, // FCVTNUUWDr 2857*9a0e4156SSadaf Ebrahimi 0U, // FCVTNUUWSr 2858*9a0e4156SSadaf Ebrahimi 0U, // FCVTNUUXDr 2859*9a0e4156SSadaf Ebrahimi 0U, // FCVTNUUXSr 2860*9a0e4156SSadaf Ebrahimi 0U, // FCVTNUv1i32 2861*9a0e4156SSadaf Ebrahimi 0U, // FCVTNUv1i64 2862*9a0e4156SSadaf Ebrahimi 0U, // FCVTNUv2f32 2863*9a0e4156SSadaf Ebrahimi 0U, // FCVTNUv2f64 2864*9a0e4156SSadaf Ebrahimi 0U, // FCVTNUv4f32 2865*9a0e4156SSadaf Ebrahimi 0U, // FCVTNv2i32 2866*9a0e4156SSadaf Ebrahimi 0U, // FCVTNv4i16 2867*9a0e4156SSadaf Ebrahimi 0U, // FCVTNv4i32 2868*9a0e4156SSadaf Ebrahimi 0U, // FCVTNv8i16 2869*9a0e4156SSadaf Ebrahimi 0U, // FCVTPSUWDr 2870*9a0e4156SSadaf Ebrahimi 0U, // FCVTPSUWSr 2871*9a0e4156SSadaf Ebrahimi 0U, // FCVTPSUXDr 2872*9a0e4156SSadaf Ebrahimi 0U, // FCVTPSUXSr 2873*9a0e4156SSadaf Ebrahimi 0U, // FCVTPSv1i32 2874*9a0e4156SSadaf Ebrahimi 0U, // FCVTPSv1i64 2875*9a0e4156SSadaf Ebrahimi 0U, // FCVTPSv2f32 2876*9a0e4156SSadaf Ebrahimi 0U, // FCVTPSv2f64 2877*9a0e4156SSadaf Ebrahimi 0U, // FCVTPSv4f32 2878*9a0e4156SSadaf Ebrahimi 0U, // FCVTPUUWDr 2879*9a0e4156SSadaf Ebrahimi 0U, // FCVTPUUWSr 2880*9a0e4156SSadaf Ebrahimi 0U, // FCVTPUUXDr 2881*9a0e4156SSadaf Ebrahimi 0U, // FCVTPUUXSr 2882*9a0e4156SSadaf Ebrahimi 0U, // FCVTPUv1i32 2883*9a0e4156SSadaf Ebrahimi 0U, // FCVTPUv1i64 2884*9a0e4156SSadaf Ebrahimi 0U, // FCVTPUv2f32 2885*9a0e4156SSadaf Ebrahimi 0U, // FCVTPUv2f64 2886*9a0e4156SSadaf Ebrahimi 0U, // FCVTPUv4f32 2887*9a0e4156SSadaf Ebrahimi 0U, // FCVTSDr 2888*9a0e4156SSadaf Ebrahimi 0U, // FCVTSHr 2889*9a0e4156SSadaf Ebrahimi 0U, // FCVTXNv1i64 2890*9a0e4156SSadaf Ebrahimi 0U, // FCVTXNv2f32 2891*9a0e4156SSadaf Ebrahimi 0U, // FCVTXNv4f32 2892*9a0e4156SSadaf Ebrahimi 1U, // FCVTZSSWDri 2893*9a0e4156SSadaf Ebrahimi 1U, // FCVTZSSWSri 2894*9a0e4156SSadaf Ebrahimi 1U, // FCVTZSSXDri 2895*9a0e4156SSadaf Ebrahimi 1U, // FCVTZSSXSri 2896*9a0e4156SSadaf Ebrahimi 0U, // FCVTZSUWDr 2897*9a0e4156SSadaf Ebrahimi 0U, // FCVTZSUWSr 2898*9a0e4156SSadaf Ebrahimi 0U, // FCVTZSUXDr 2899*9a0e4156SSadaf Ebrahimi 0U, // FCVTZSUXSr 2900*9a0e4156SSadaf Ebrahimi 1U, // FCVTZS_IntSWDri 2901*9a0e4156SSadaf Ebrahimi 1U, // FCVTZS_IntSWSri 2902*9a0e4156SSadaf Ebrahimi 1U, // FCVTZS_IntSXDri 2903*9a0e4156SSadaf Ebrahimi 1U, // FCVTZS_IntSXSri 2904*9a0e4156SSadaf Ebrahimi 0U, // FCVTZS_IntUWDr 2905*9a0e4156SSadaf Ebrahimi 0U, // FCVTZS_IntUWSr 2906*9a0e4156SSadaf Ebrahimi 0U, // FCVTZS_IntUXDr 2907*9a0e4156SSadaf Ebrahimi 0U, // FCVTZS_IntUXSr 2908*9a0e4156SSadaf Ebrahimi 0U, // FCVTZS_Intv2f32 2909*9a0e4156SSadaf Ebrahimi 0U, // FCVTZS_Intv2f64 2910*9a0e4156SSadaf Ebrahimi 0U, // FCVTZS_Intv4f32 2911*9a0e4156SSadaf Ebrahimi 1U, // FCVTZSd 2912*9a0e4156SSadaf Ebrahimi 1U, // FCVTZSs 2913*9a0e4156SSadaf Ebrahimi 0U, // FCVTZSv1i32 2914*9a0e4156SSadaf Ebrahimi 0U, // FCVTZSv1i64 2915*9a0e4156SSadaf Ebrahimi 0U, // FCVTZSv2f32 2916*9a0e4156SSadaf Ebrahimi 0U, // FCVTZSv2f64 2917*9a0e4156SSadaf Ebrahimi 1U, // FCVTZSv2i32_shift 2918*9a0e4156SSadaf Ebrahimi 1U, // FCVTZSv2i64_shift 2919*9a0e4156SSadaf Ebrahimi 0U, // FCVTZSv4f32 2920*9a0e4156SSadaf Ebrahimi 1U, // FCVTZSv4i32_shift 2921*9a0e4156SSadaf Ebrahimi 1U, // FCVTZUSWDri 2922*9a0e4156SSadaf Ebrahimi 1U, // FCVTZUSWSri 2923*9a0e4156SSadaf Ebrahimi 1U, // FCVTZUSXDri 2924*9a0e4156SSadaf Ebrahimi 1U, // FCVTZUSXSri 2925*9a0e4156SSadaf Ebrahimi 0U, // FCVTZUUWDr 2926*9a0e4156SSadaf Ebrahimi 0U, // FCVTZUUWSr 2927*9a0e4156SSadaf Ebrahimi 0U, // FCVTZUUXDr 2928*9a0e4156SSadaf Ebrahimi 0U, // FCVTZUUXSr 2929*9a0e4156SSadaf Ebrahimi 1U, // FCVTZU_IntSWDri 2930*9a0e4156SSadaf Ebrahimi 1U, // FCVTZU_IntSWSri 2931*9a0e4156SSadaf Ebrahimi 1U, // FCVTZU_IntSXDri 2932*9a0e4156SSadaf Ebrahimi 1U, // FCVTZU_IntSXSri 2933*9a0e4156SSadaf Ebrahimi 0U, // FCVTZU_IntUWDr 2934*9a0e4156SSadaf Ebrahimi 0U, // FCVTZU_IntUWSr 2935*9a0e4156SSadaf Ebrahimi 0U, // FCVTZU_IntUXDr 2936*9a0e4156SSadaf Ebrahimi 0U, // FCVTZU_IntUXSr 2937*9a0e4156SSadaf Ebrahimi 0U, // FCVTZU_Intv2f32 2938*9a0e4156SSadaf Ebrahimi 0U, // FCVTZU_Intv2f64 2939*9a0e4156SSadaf Ebrahimi 0U, // FCVTZU_Intv4f32 2940*9a0e4156SSadaf Ebrahimi 1U, // FCVTZUd 2941*9a0e4156SSadaf Ebrahimi 1U, // FCVTZUs 2942*9a0e4156SSadaf Ebrahimi 0U, // FCVTZUv1i32 2943*9a0e4156SSadaf Ebrahimi 0U, // FCVTZUv1i64 2944*9a0e4156SSadaf Ebrahimi 0U, // FCVTZUv2f32 2945*9a0e4156SSadaf Ebrahimi 0U, // FCVTZUv2f64 2946*9a0e4156SSadaf Ebrahimi 1U, // FCVTZUv2i32_shift 2947*9a0e4156SSadaf Ebrahimi 1U, // FCVTZUv2i64_shift 2948*9a0e4156SSadaf Ebrahimi 0U, // FCVTZUv4f32 2949*9a0e4156SSadaf Ebrahimi 1U, // FCVTZUv4i32_shift 2950*9a0e4156SSadaf Ebrahimi 1U, // FDIVDrr 2951*9a0e4156SSadaf Ebrahimi 1U, // FDIVSrr 2952*9a0e4156SSadaf Ebrahimi 1289U, // FDIVv2f32 2953*9a0e4156SSadaf Ebrahimi 265U, // FDIVv2f64 2954*9a0e4156SSadaf Ebrahimi 521U, // FDIVv4f32 2955*9a0e4156SSadaf Ebrahimi 18689U, // FMADDDrrr 2956*9a0e4156SSadaf Ebrahimi 18689U, // FMADDSrrr 2957*9a0e4156SSadaf Ebrahimi 1U, // FMAXDrr 2958*9a0e4156SSadaf Ebrahimi 1U, // FMAXNMDrr 2959*9a0e4156SSadaf Ebrahimi 1289U, // FMAXNMPv2f32 2960*9a0e4156SSadaf Ebrahimi 265U, // FMAXNMPv2f64 2961*9a0e4156SSadaf Ebrahimi 0U, // FMAXNMPv2i32p 2962*9a0e4156SSadaf Ebrahimi 0U, // FMAXNMPv2i64p 2963*9a0e4156SSadaf Ebrahimi 521U, // FMAXNMPv4f32 2964*9a0e4156SSadaf Ebrahimi 1U, // FMAXNMSrr 2965*9a0e4156SSadaf Ebrahimi 0U, // FMAXNMVv4i32v 2966*9a0e4156SSadaf Ebrahimi 1289U, // FMAXNMv2f32 2967*9a0e4156SSadaf Ebrahimi 265U, // FMAXNMv2f64 2968*9a0e4156SSadaf Ebrahimi 521U, // FMAXNMv4f32 2969*9a0e4156SSadaf Ebrahimi 1289U, // FMAXPv2f32 2970*9a0e4156SSadaf Ebrahimi 265U, // FMAXPv2f64 2971*9a0e4156SSadaf Ebrahimi 0U, // FMAXPv2i32p 2972*9a0e4156SSadaf Ebrahimi 0U, // FMAXPv2i64p 2973*9a0e4156SSadaf Ebrahimi 521U, // FMAXPv4f32 2974*9a0e4156SSadaf Ebrahimi 1U, // FMAXSrr 2975*9a0e4156SSadaf Ebrahimi 0U, // FMAXVv4i32v 2976*9a0e4156SSadaf Ebrahimi 1289U, // FMAXv2f32 2977*9a0e4156SSadaf Ebrahimi 265U, // FMAXv2f64 2978*9a0e4156SSadaf Ebrahimi 521U, // FMAXv4f32 2979*9a0e4156SSadaf Ebrahimi 1U, // FMINDrr 2980*9a0e4156SSadaf Ebrahimi 1U, // FMINNMDrr 2981*9a0e4156SSadaf Ebrahimi 1289U, // FMINNMPv2f32 2982*9a0e4156SSadaf Ebrahimi 265U, // FMINNMPv2f64 2983*9a0e4156SSadaf Ebrahimi 0U, // FMINNMPv2i32p 2984*9a0e4156SSadaf Ebrahimi 0U, // FMINNMPv2i64p 2985*9a0e4156SSadaf Ebrahimi 521U, // FMINNMPv4f32 2986*9a0e4156SSadaf Ebrahimi 1U, // FMINNMSrr 2987*9a0e4156SSadaf Ebrahimi 0U, // FMINNMVv4i32v 2988*9a0e4156SSadaf Ebrahimi 1289U, // FMINNMv2f32 2989*9a0e4156SSadaf Ebrahimi 265U, // FMINNMv2f64 2990*9a0e4156SSadaf Ebrahimi 521U, // FMINNMv4f32 2991*9a0e4156SSadaf Ebrahimi 1289U, // FMINPv2f32 2992*9a0e4156SSadaf Ebrahimi 265U, // FMINPv2f64 2993*9a0e4156SSadaf Ebrahimi 0U, // FMINPv2i32p 2994*9a0e4156SSadaf Ebrahimi 0U, // FMINPv2i64p 2995*9a0e4156SSadaf Ebrahimi 521U, // FMINPv4f32 2996*9a0e4156SSadaf Ebrahimi 1U, // FMINSrr 2997*9a0e4156SSadaf Ebrahimi 0U, // FMINVv4i32v 2998*9a0e4156SSadaf Ebrahimi 1289U, // FMINv2f32 2999*9a0e4156SSadaf Ebrahimi 265U, // FMINv2f64 3000*9a0e4156SSadaf Ebrahimi 521U, // FMINv4f32 3001*9a0e4156SSadaf Ebrahimi 27665U, // FMLAv1i32_indexed 3002*9a0e4156SSadaf Ebrahimi 27921U, // FMLAv1i64_indexed 3003*9a0e4156SSadaf Ebrahimi 1297U, // FMLAv2f32 3004*9a0e4156SSadaf Ebrahimi 273U, // FMLAv2f64 3005*9a0e4156SSadaf Ebrahimi 27665U, // FMLAv2i32_indexed 3006*9a0e4156SSadaf Ebrahimi 27921U, // FMLAv2i64_indexed 3007*9a0e4156SSadaf Ebrahimi 529U, // FMLAv4f32 3008*9a0e4156SSadaf Ebrahimi 27665U, // FMLAv4i32_indexed 3009*9a0e4156SSadaf Ebrahimi 27665U, // FMLSv1i32_indexed 3010*9a0e4156SSadaf Ebrahimi 27921U, // FMLSv1i64_indexed 3011*9a0e4156SSadaf Ebrahimi 1297U, // FMLSv2f32 3012*9a0e4156SSadaf Ebrahimi 273U, // FMLSv2f64 3013*9a0e4156SSadaf Ebrahimi 27665U, // FMLSv2i32_indexed 3014*9a0e4156SSadaf Ebrahimi 27921U, // FMLSv2i64_indexed 3015*9a0e4156SSadaf Ebrahimi 529U, // FMLSv4f32 3016*9a0e4156SSadaf Ebrahimi 27665U, // FMLSv4i32_indexed 3017*9a0e4156SSadaf Ebrahimi 75U, // FMOVDXHighr 3018*9a0e4156SSadaf Ebrahimi 0U, // FMOVDXr 3019*9a0e4156SSadaf Ebrahimi 0U, // FMOVDi 3020*9a0e4156SSadaf Ebrahimi 0U, // FMOVDr 3021*9a0e4156SSadaf Ebrahimi 0U, // FMOVSWr 3022*9a0e4156SSadaf Ebrahimi 0U, // FMOVSi 3023*9a0e4156SSadaf Ebrahimi 0U, // FMOVSr 3024*9a0e4156SSadaf Ebrahimi 0U, // FMOVWSr 3025*9a0e4156SSadaf Ebrahimi 0U, // FMOVXDHighr 3026*9a0e4156SSadaf Ebrahimi 0U, // FMOVXDr 3027*9a0e4156SSadaf Ebrahimi 0U, // FMOVv2f32_ns 3028*9a0e4156SSadaf Ebrahimi 0U, // FMOVv2f64_ns 3029*9a0e4156SSadaf Ebrahimi 0U, // FMOVv4f32_ns 3030*9a0e4156SSadaf Ebrahimi 18689U, // FMSUBDrrr 3031*9a0e4156SSadaf Ebrahimi 18689U, // FMSUBSrrr 3032*9a0e4156SSadaf Ebrahimi 1U, // FMULDrr 3033*9a0e4156SSadaf Ebrahimi 1U, // FMULSrr 3034*9a0e4156SSadaf Ebrahimi 1U, // FMULX32 3035*9a0e4156SSadaf Ebrahimi 1U, // FMULX64 3036*9a0e4156SSadaf Ebrahimi 35849U, // FMULXv1i32_indexed 3037*9a0e4156SSadaf Ebrahimi 36105U, // FMULXv1i64_indexed 3038*9a0e4156SSadaf Ebrahimi 1289U, // FMULXv2f32 3039*9a0e4156SSadaf Ebrahimi 265U, // FMULXv2f64 3040*9a0e4156SSadaf Ebrahimi 35849U, // FMULXv2i32_indexed 3041*9a0e4156SSadaf Ebrahimi 36105U, // FMULXv2i64_indexed 3042*9a0e4156SSadaf Ebrahimi 521U, // FMULXv4f32 3043*9a0e4156SSadaf Ebrahimi 35849U, // FMULXv4i32_indexed 3044*9a0e4156SSadaf Ebrahimi 35849U, // FMULv1i32_indexed 3045*9a0e4156SSadaf Ebrahimi 36105U, // FMULv1i64_indexed 3046*9a0e4156SSadaf Ebrahimi 1289U, // FMULv2f32 3047*9a0e4156SSadaf Ebrahimi 265U, // FMULv2f64 3048*9a0e4156SSadaf Ebrahimi 35849U, // FMULv2i32_indexed 3049*9a0e4156SSadaf Ebrahimi 36105U, // FMULv2i64_indexed 3050*9a0e4156SSadaf Ebrahimi 521U, // FMULv4f32 3051*9a0e4156SSadaf Ebrahimi 35849U, // FMULv4i32_indexed 3052*9a0e4156SSadaf Ebrahimi 0U, // FNEGDr 3053*9a0e4156SSadaf Ebrahimi 0U, // FNEGSr 3054*9a0e4156SSadaf Ebrahimi 0U, // FNEGv2f32 3055*9a0e4156SSadaf Ebrahimi 0U, // FNEGv2f64 3056*9a0e4156SSadaf Ebrahimi 0U, // FNEGv4f32 3057*9a0e4156SSadaf Ebrahimi 18689U, // FNMADDDrrr 3058*9a0e4156SSadaf Ebrahimi 18689U, // FNMADDSrrr 3059*9a0e4156SSadaf Ebrahimi 18689U, // FNMSUBDrrr 3060*9a0e4156SSadaf Ebrahimi 18689U, // FNMSUBSrrr 3061*9a0e4156SSadaf Ebrahimi 1U, // FNMULDrr 3062*9a0e4156SSadaf Ebrahimi 1U, // FNMULSrr 3063*9a0e4156SSadaf Ebrahimi 0U, // FRECPEv1i32 3064*9a0e4156SSadaf Ebrahimi 0U, // FRECPEv1i64 3065*9a0e4156SSadaf Ebrahimi 0U, // FRECPEv2f32 3066*9a0e4156SSadaf Ebrahimi 0U, // FRECPEv2f64 3067*9a0e4156SSadaf Ebrahimi 0U, // FRECPEv4f32 3068*9a0e4156SSadaf Ebrahimi 1U, // FRECPS32 3069*9a0e4156SSadaf Ebrahimi 1U, // FRECPS64 3070*9a0e4156SSadaf Ebrahimi 1289U, // FRECPSv2f32 3071*9a0e4156SSadaf Ebrahimi 265U, // FRECPSv2f64 3072*9a0e4156SSadaf Ebrahimi 521U, // FRECPSv4f32 3073*9a0e4156SSadaf Ebrahimi 0U, // FRECPXv1i32 3074*9a0e4156SSadaf Ebrahimi 0U, // FRECPXv1i64 3075*9a0e4156SSadaf Ebrahimi 0U, // FRINTADr 3076*9a0e4156SSadaf Ebrahimi 0U, // FRINTASr 3077*9a0e4156SSadaf Ebrahimi 0U, // FRINTAv2f32 3078*9a0e4156SSadaf Ebrahimi 0U, // FRINTAv2f64 3079*9a0e4156SSadaf Ebrahimi 0U, // FRINTAv4f32 3080*9a0e4156SSadaf Ebrahimi 0U, // FRINTIDr 3081*9a0e4156SSadaf Ebrahimi 0U, // FRINTISr 3082*9a0e4156SSadaf Ebrahimi 0U, // FRINTIv2f32 3083*9a0e4156SSadaf Ebrahimi 0U, // FRINTIv2f64 3084*9a0e4156SSadaf Ebrahimi 0U, // FRINTIv4f32 3085*9a0e4156SSadaf Ebrahimi 0U, // FRINTMDr 3086*9a0e4156SSadaf Ebrahimi 0U, // FRINTMSr 3087*9a0e4156SSadaf Ebrahimi 0U, // FRINTMv2f32 3088*9a0e4156SSadaf Ebrahimi 0U, // FRINTMv2f64 3089*9a0e4156SSadaf Ebrahimi 0U, // FRINTMv4f32 3090*9a0e4156SSadaf Ebrahimi 0U, // FRINTNDr 3091*9a0e4156SSadaf Ebrahimi 0U, // FRINTNSr 3092*9a0e4156SSadaf Ebrahimi 0U, // FRINTNv2f32 3093*9a0e4156SSadaf Ebrahimi 0U, // FRINTNv2f64 3094*9a0e4156SSadaf Ebrahimi 0U, // FRINTNv4f32 3095*9a0e4156SSadaf Ebrahimi 0U, // FRINTPDr 3096*9a0e4156SSadaf Ebrahimi 0U, // FRINTPSr 3097*9a0e4156SSadaf Ebrahimi 0U, // FRINTPv2f32 3098*9a0e4156SSadaf Ebrahimi 0U, // FRINTPv2f64 3099*9a0e4156SSadaf Ebrahimi 0U, // FRINTPv4f32 3100*9a0e4156SSadaf Ebrahimi 0U, // FRINTXDr 3101*9a0e4156SSadaf Ebrahimi 0U, // FRINTXSr 3102*9a0e4156SSadaf Ebrahimi 0U, // FRINTXv2f32 3103*9a0e4156SSadaf Ebrahimi 0U, // FRINTXv2f64 3104*9a0e4156SSadaf Ebrahimi 0U, // FRINTXv4f32 3105*9a0e4156SSadaf Ebrahimi 0U, // FRINTZDr 3106*9a0e4156SSadaf Ebrahimi 0U, // FRINTZSr 3107*9a0e4156SSadaf Ebrahimi 0U, // FRINTZv2f32 3108*9a0e4156SSadaf Ebrahimi 0U, // FRINTZv2f64 3109*9a0e4156SSadaf Ebrahimi 0U, // FRINTZv4f32 3110*9a0e4156SSadaf Ebrahimi 0U, // FRSQRTEv1i32 3111*9a0e4156SSadaf Ebrahimi 0U, // FRSQRTEv1i64 3112*9a0e4156SSadaf Ebrahimi 0U, // FRSQRTEv2f32 3113*9a0e4156SSadaf Ebrahimi 0U, // FRSQRTEv2f64 3114*9a0e4156SSadaf Ebrahimi 0U, // FRSQRTEv4f32 3115*9a0e4156SSadaf Ebrahimi 1U, // FRSQRTS32 3116*9a0e4156SSadaf Ebrahimi 1U, // FRSQRTS64 3117*9a0e4156SSadaf Ebrahimi 1289U, // FRSQRTSv2f32 3118*9a0e4156SSadaf Ebrahimi 265U, // FRSQRTSv2f64 3119*9a0e4156SSadaf Ebrahimi 521U, // FRSQRTSv4f32 3120*9a0e4156SSadaf Ebrahimi 0U, // FSQRTDr 3121*9a0e4156SSadaf Ebrahimi 0U, // FSQRTSr 3122*9a0e4156SSadaf Ebrahimi 0U, // FSQRTv2f32 3123*9a0e4156SSadaf Ebrahimi 0U, // FSQRTv2f64 3124*9a0e4156SSadaf Ebrahimi 0U, // FSQRTv4f32 3125*9a0e4156SSadaf Ebrahimi 1U, // FSUBDrr 3126*9a0e4156SSadaf Ebrahimi 1U, // FSUBSrr 3127*9a0e4156SSadaf Ebrahimi 1289U, // FSUBv2f32 3128*9a0e4156SSadaf Ebrahimi 265U, // FSUBv2f64 3129*9a0e4156SSadaf Ebrahimi 521U, // FSUBv4f32 3130*9a0e4156SSadaf Ebrahimi 0U, // HINT 3131*9a0e4156SSadaf Ebrahimi 0U, // HLT 3132*9a0e4156SSadaf Ebrahimi 0U, // HVC 3133*9a0e4156SSadaf Ebrahimi 0U, // INSvi16gpr 3134*9a0e4156SSadaf Ebrahimi 83U, // INSvi16lane 3135*9a0e4156SSadaf Ebrahimi 0U, // INSvi32gpr 3136*9a0e4156SSadaf Ebrahimi 83U, // INSvi32lane 3137*9a0e4156SSadaf Ebrahimi 0U, // INSvi64gpr 3138*9a0e4156SSadaf Ebrahimi 83U, // INSvi64lane 3139*9a0e4156SSadaf Ebrahimi 0U, // INSvi8gpr 3140*9a0e4156SSadaf Ebrahimi 83U, // INSvi8lane 3141*9a0e4156SSadaf Ebrahimi 0U, // ISB 3142*9a0e4156SSadaf Ebrahimi 0U, // LD1Fourv16b 3143*9a0e4156SSadaf Ebrahimi 0U, // LD1Fourv16b_POST 3144*9a0e4156SSadaf Ebrahimi 0U, // LD1Fourv1d 3145*9a0e4156SSadaf Ebrahimi 0U, // LD1Fourv1d_POST 3146*9a0e4156SSadaf Ebrahimi 0U, // LD1Fourv2d 3147*9a0e4156SSadaf Ebrahimi 0U, // LD1Fourv2d_POST 3148*9a0e4156SSadaf Ebrahimi 0U, // LD1Fourv2s 3149*9a0e4156SSadaf Ebrahimi 0U, // LD1Fourv2s_POST 3150*9a0e4156SSadaf Ebrahimi 0U, // LD1Fourv4h 3151*9a0e4156SSadaf Ebrahimi 0U, // LD1Fourv4h_POST 3152*9a0e4156SSadaf Ebrahimi 0U, // LD1Fourv4s 3153*9a0e4156SSadaf Ebrahimi 0U, // LD1Fourv4s_POST 3154*9a0e4156SSadaf Ebrahimi 0U, // LD1Fourv8b 3155*9a0e4156SSadaf Ebrahimi 0U, // LD1Fourv8b_POST 3156*9a0e4156SSadaf Ebrahimi 0U, // LD1Fourv8h 3157*9a0e4156SSadaf Ebrahimi 0U, // LD1Fourv8h_POST 3158*9a0e4156SSadaf Ebrahimi 0U, // LD1Onev16b 3159*9a0e4156SSadaf Ebrahimi 0U, // LD1Onev16b_POST 3160*9a0e4156SSadaf Ebrahimi 0U, // LD1Onev1d 3161*9a0e4156SSadaf Ebrahimi 0U, // LD1Onev1d_POST 3162*9a0e4156SSadaf Ebrahimi 0U, // LD1Onev2d 3163*9a0e4156SSadaf Ebrahimi 0U, // LD1Onev2d_POST 3164*9a0e4156SSadaf Ebrahimi 0U, // LD1Onev2s 3165*9a0e4156SSadaf Ebrahimi 0U, // LD1Onev2s_POST 3166*9a0e4156SSadaf Ebrahimi 0U, // LD1Onev4h 3167*9a0e4156SSadaf Ebrahimi 0U, // LD1Onev4h_POST 3168*9a0e4156SSadaf Ebrahimi 0U, // LD1Onev4s 3169*9a0e4156SSadaf Ebrahimi 0U, // LD1Onev4s_POST 3170*9a0e4156SSadaf Ebrahimi 0U, // LD1Onev8b 3171*9a0e4156SSadaf Ebrahimi 0U, // LD1Onev8b_POST 3172*9a0e4156SSadaf Ebrahimi 0U, // LD1Onev8h 3173*9a0e4156SSadaf Ebrahimi 0U, // LD1Onev8h_POST 3174*9a0e4156SSadaf Ebrahimi 0U, // LD1Rv16b 3175*9a0e4156SSadaf Ebrahimi 0U, // LD1Rv16b_POST 3176*9a0e4156SSadaf Ebrahimi 0U, // LD1Rv1d 3177*9a0e4156SSadaf Ebrahimi 0U, // LD1Rv1d_POST 3178*9a0e4156SSadaf Ebrahimi 0U, // LD1Rv2d 3179*9a0e4156SSadaf Ebrahimi 0U, // LD1Rv2d_POST 3180*9a0e4156SSadaf Ebrahimi 0U, // LD1Rv2s 3181*9a0e4156SSadaf Ebrahimi 0U, // LD1Rv2s_POST 3182*9a0e4156SSadaf Ebrahimi 0U, // LD1Rv4h 3183*9a0e4156SSadaf Ebrahimi 0U, // LD1Rv4h_POST 3184*9a0e4156SSadaf Ebrahimi 0U, // LD1Rv4s 3185*9a0e4156SSadaf Ebrahimi 0U, // LD1Rv4s_POST 3186*9a0e4156SSadaf Ebrahimi 0U, // LD1Rv8b 3187*9a0e4156SSadaf Ebrahimi 0U, // LD1Rv8b_POST 3188*9a0e4156SSadaf Ebrahimi 0U, // LD1Rv8h 3189*9a0e4156SSadaf Ebrahimi 0U, // LD1Rv8h_POST 3190*9a0e4156SSadaf Ebrahimi 0U, // LD1Threev16b 3191*9a0e4156SSadaf Ebrahimi 0U, // LD1Threev16b_POST 3192*9a0e4156SSadaf Ebrahimi 0U, // LD1Threev1d 3193*9a0e4156SSadaf Ebrahimi 0U, // LD1Threev1d_POST 3194*9a0e4156SSadaf Ebrahimi 0U, // LD1Threev2d 3195*9a0e4156SSadaf Ebrahimi 0U, // LD1Threev2d_POST 3196*9a0e4156SSadaf Ebrahimi 0U, // LD1Threev2s 3197*9a0e4156SSadaf Ebrahimi 0U, // LD1Threev2s_POST 3198*9a0e4156SSadaf Ebrahimi 0U, // LD1Threev4h 3199*9a0e4156SSadaf Ebrahimi 0U, // LD1Threev4h_POST 3200*9a0e4156SSadaf Ebrahimi 0U, // LD1Threev4s 3201*9a0e4156SSadaf Ebrahimi 0U, // LD1Threev4s_POST 3202*9a0e4156SSadaf Ebrahimi 0U, // LD1Threev8b 3203*9a0e4156SSadaf Ebrahimi 0U, // LD1Threev8b_POST 3204*9a0e4156SSadaf Ebrahimi 0U, // LD1Threev8h 3205*9a0e4156SSadaf Ebrahimi 0U, // LD1Threev8h_POST 3206*9a0e4156SSadaf Ebrahimi 0U, // LD1Twov16b 3207*9a0e4156SSadaf Ebrahimi 0U, // LD1Twov16b_POST 3208*9a0e4156SSadaf Ebrahimi 0U, // LD1Twov1d 3209*9a0e4156SSadaf Ebrahimi 0U, // LD1Twov1d_POST 3210*9a0e4156SSadaf Ebrahimi 0U, // LD1Twov2d 3211*9a0e4156SSadaf Ebrahimi 0U, // LD1Twov2d_POST 3212*9a0e4156SSadaf Ebrahimi 0U, // LD1Twov2s 3213*9a0e4156SSadaf Ebrahimi 0U, // LD1Twov2s_POST 3214*9a0e4156SSadaf Ebrahimi 0U, // LD1Twov4h 3215*9a0e4156SSadaf Ebrahimi 0U, // LD1Twov4h_POST 3216*9a0e4156SSadaf Ebrahimi 0U, // LD1Twov4s 3217*9a0e4156SSadaf Ebrahimi 0U, // LD1Twov4s_POST 3218*9a0e4156SSadaf Ebrahimi 0U, // LD1Twov8b 3219*9a0e4156SSadaf Ebrahimi 0U, // LD1Twov8b_POST 3220*9a0e4156SSadaf Ebrahimi 0U, // LD1Twov8h 3221*9a0e4156SSadaf Ebrahimi 0U, // LD1Twov8h_POST 3222*9a0e4156SSadaf Ebrahimi 0U, // LD1i16 3223*9a0e4156SSadaf Ebrahimi 0U, // LD1i16_POST 3224*9a0e4156SSadaf Ebrahimi 0U, // LD1i32 3225*9a0e4156SSadaf Ebrahimi 0U, // LD1i32_POST 3226*9a0e4156SSadaf Ebrahimi 0U, // LD1i64 3227*9a0e4156SSadaf Ebrahimi 0U, // LD1i64_POST 3228*9a0e4156SSadaf Ebrahimi 0U, // LD1i8 3229*9a0e4156SSadaf Ebrahimi 0U, // LD1i8_POST 3230*9a0e4156SSadaf Ebrahimi 0U, // LD2Rv16b 3231*9a0e4156SSadaf Ebrahimi 0U, // LD2Rv16b_POST 3232*9a0e4156SSadaf Ebrahimi 0U, // LD2Rv1d 3233*9a0e4156SSadaf Ebrahimi 0U, // LD2Rv1d_POST 3234*9a0e4156SSadaf Ebrahimi 0U, // LD2Rv2d 3235*9a0e4156SSadaf Ebrahimi 0U, // LD2Rv2d_POST 3236*9a0e4156SSadaf Ebrahimi 0U, // LD2Rv2s 3237*9a0e4156SSadaf Ebrahimi 0U, // LD2Rv2s_POST 3238*9a0e4156SSadaf Ebrahimi 0U, // LD2Rv4h 3239*9a0e4156SSadaf Ebrahimi 0U, // LD2Rv4h_POST 3240*9a0e4156SSadaf Ebrahimi 0U, // LD2Rv4s 3241*9a0e4156SSadaf Ebrahimi 0U, // LD2Rv4s_POST 3242*9a0e4156SSadaf Ebrahimi 0U, // LD2Rv8b 3243*9a0e4156SSadaf Ebrahimi 0U, // LD2Rv8b_POST 3244*9a0e4156SSadaf Ebrahimi 0U, // LD2Rv8h 3245*9a0e4156SSadaf Ebrahimi 0U, // LD2Rv8h_POST 3246*9a0e4156SSadaf Ebrahimi 0U, // LD2Twov16b 3247*9a0e4156SSadaf Ebrahimi 0U, // LD2Twov16b_POST 3248*9a0e4156SSadaf Ebrahimi 0U, // LD2Twov2d 3249*9a0e4156SSadaf Ebrahimi 0U, // LD2Twov2d_POST 3250*9a0e4156SSadaf Ebrahimi 0U, // LD2Twov2s 3251*9a0e4156SSadaf Ebrahimi 0U, // LD2Twov2s_POST 3252*9a0e4156SSadaf Ebrahimi 0U, // LD2Twov4h 3253*9a0e4156SSadaf Ebrahimi 0U, // LD2Twov4h_POST 3254*9a0e4156SSadaf Ebrahimi 0U, // LD2Twov4s 3255*9a0e4156SSadaf Ebrahimi 0U, // LD2Twov4s_POST 3256*9a0e4156SSadaf Ebrahimi 0U, // LD2Twov8b 3257*9a0e4156SSadaf Ebrahimi 0U, // LD2Twov8b_POST 3258*9a0e4156SSadaf Ebrahimi 0U, // LD2Twov8h 3259*9a0e4156SSadaf Ebrahimi 0U, // LD2Twov8h_POST 3260*9a0e4156SSadaf Ebrahimi 0U, // LD2i16 3261*9a0e4156SSadaf Ebrahimi 0U, // LD2i16_POST 3262*9a0e4156SSadaf Ebrahimi 0U, // LD2i32 3263*9a0e4156SSadaf Ebrahimi 0U, // LD2i32_POST 3264*9a0e4156SSadaf Ebrahimi 0U, // LD2i64 3265*9a0e4156SSadaf Ebrahimi 0U, // LD2i64_POST 3266*9a0e4156SSadaf Ebrahimi 0U, // LD2i8 3267*9a0e4156SSadaf Ebrahimi 0U, // LD2i8_POST 3268*9a0e4156SSadaf Ebrahimi 0U, // LD3Rv16b 3269*9a0e4156SSadaf Ebrahimi 0U, // LD3Rv16b_POST 3270*9a0e4156SSadaf Ebrahimi 0U, // LD3Rv1d 3271*9a0e4156SSadaf Ebrahimi 0U, // LD3Rv1d_POST 3272*9a0e4156SSadaf Ebrahimi 0U, // LD3Rv2d 3273*9a0e4156SSadaf Ebrahimi 0U, // LD3Rv2d_POST 3274*9a0e4156SSadaf Ebrahimi 0U, // LD3Rv2s 3275*9a0e4156SSadaf Ebrahimi 0U, // LD3Rv2s_POST 3276*9a0e4156SSadaf Ebrahimi 0U, // LD3Rv4h 3277*9a0e4156SSadaf Ebrahimi 0U, // LD3Rv4h_POST 3278*9a0e4156SSadaf Ebrahimi 0U, // LD3Rv4s 3279*9a0e4156SSadaf Ebrahimi 0U, // LD3Rv4s_POST 3280*9a0e4156SSadaf Ebrahimi 0U, // LD3Rv8b 3281*9a0e4156SSadaf Ebrahimi 0U, // LD3Rv8b_POST 3282*9a0e4156SSadaf Ebrahimi 0U, // LD3Rv8h 3283*9a0e4156SSadaf Ebrahimi 0U, // LD3Rv8h_POST 3284*9a0e4156SSadaf Ebrahimi 0U, // LD3Threev16b 3285*9a0e4156SSadaf Ebrahimi 0U, // LD3Threev16b_POST 3286*9a0e4156SSadaf Ebrahimi 0U, // LD3Threev2d 3287*9a0e4156SSadaf Ebrahimi 0U, // LD3Threev2d_POST 3288*9a0e4156SSadaf Ebrahimi 0U, // LD3Threev2s 3289*9a0e4156SSadaf Ebrahimi 0U, // LD3Threev2s_POST 3290*9a0e4156SSadaf Ebrahimi 0U, // LD3Threev4h 3291*9a0e4156SSadaf Ebrahimi 0U, // LD3Threev4h_POST 3292*9a0e4156SSadaf Ebrahimi 0U, // LD3Threev4s 3293*9a0e4156SSadaf Ebrahimi 0U, // LD3Threev4s_POST 3294*9a0e4156SSadaf Ebrahimi 0U, // LD3Threev8b 3295*9a0e4156SSadaf Ebrahimi 0U, // LD3Threev8b_POST 3296*9a0e4156SSadaf Ebrahimi 0U, // LD3Threev8h 3297*9a0e4156SSadaf Ebrahimi 0U, // LD3Threev8h_POST 3298*9a0e4156SSadaf Ebrahimi 0U, // LD3i16 3299*9a0e4156SSadaf Ebrahimi 0U, // LD3i16_POST 3300*9a0e4156SSadaf Ebrahimi 0U, // LD3i32 3301*9a0e4156SSadaf Ebrahimi 0U, // LD3i32_POST 3302*9a0e4156SSadaf Ebrahimi 0U, // LD3i64 3303*9a0e4156SSadaf Ebrahimi 0U, // LD3i64_POST 3304*9a0e4156SSadaf Ebrahimi 0U, // LD3i8 3305*9a0e4156SSadaf Ebrahimi 0U, // LD3i8_POST 3306*9a0e4156SSadaf Ebrahimi 0U, // LD4Fourv16b 3307*9a0e4156SSadaf Ebrahimi 0U, // LD4Fourv16b_POST 3308*9a0e4156SSadaf Ebrahimi 0U, // LD4Fourv2d 3309*9a0e4156SSadaf Ebrahimi 0U, // LD4Fourv2d_POST 3310*9a0e4156SSadaf Ebrahimi 0U, // LD4Fourv2s 3311*9a0e4156SSadaf Ebrahimi 0U, // LD4Fourv2s_POST 3312*9a0e4156SSadaf Ebrahimi 0U, // LD4Fourv4h 3313*9a0e4156SSadaf Ebrahimi 0U, // LD4Fourv4h_POST 3314*9a0e4156SSadaf Ebrahimi 0U, // LD4Fourv4s 3315*9a0e4156SSadaf Ebrahimi 0U, // LD4Fourv4s_POST 3316*9a0e4156SSadaf Ebrahimi 0U, // LD4Fourv8b 3317*9a0e4156SSadaf Ebrahimi 0U, // LD4Fourv8b_POST 3318*9a0e4156SSadaf Ebrahimi 0U, // LD4Fourv8h 3319*9a0e4156SSadaf Ebrahimi 0U, // LD4Fourv8h_POST 3320*9a0e4156SSadaf Ebrahimi 0U, // LD4Rv16b 3321*9a0e4156SSadaf Ebrahimi 0U, // LD4Rv16b_POST 3322*9a0e4156SSadaf Ebrahimi 0U, // LD4Rv1d 3323*9a0e4156SSadaf Ebrahimi 0U, // LD4Rv1d_POST 3324*9a0e4156SSadaf Ebrahimi 0U, // LD4Rv2d 3325*9a0e4156SSadaf Ebrahimi 0U, // LD4Rv2d_POST 3326*9a0e4156SSadaf Ebrahimi 0U, // LD4Rv2s 3327*9a0e4156SSadaf Ebrahimi 0U, // LD4Rv2s_POST 3328*9a0e4156SSadaf Ebrahimi 0U, // LD4Rv4h 3329*9a0e4156SSadaf Ebrahimi 0U, // LD4Rv4h_POST 3330*9a0e4156SSadaf Ebrahimi 0U, // LD4Rv4s 3331*9a0e4156SSadaf Ebrahimi 0U, // LD4Rv4s_POST 3332*9a0e4156SSadaf Ebrahimi 0U, // LD4Rv8b 3333*9a0e4156SSadaf Ebrahimi 0U, // LD4Rv8b_POST 3334*9a0e4156SSadaf Ebrahimi 0U, // LD4Rv8h 3335*9a0e4156SSadaf Ebrahimi 0U, // LD4Rv8h_POST 3336*9a0e4156SSadaf Ebrahimi 0U, // LD4i16 3337*9a0e4156SSadaf Ebrahimi 0U, // LD4i16_POST 3338*9a0e4156SSadaf Ebrahimi 0U, // LD4i32 3339*9a0e4156SSadaf Ebrahimi 0U, // LD4i32_POST 3340*9a0e4156SSadaf Ebrahimi 0U, // LD4i64 3341*9a0e4156SSadaf Ebrahimi 0U, // LD4i64_POST 3342*9a0e4156SSadaf Ebrahimi 0U, // LD4i8 3343*9a0e4156SSadaf Ebrahimi 0U, // LD4i8_POST 3344*9a0e4156SSadaf Ebrahimi 4U, // LDARB 3345*9a0e4156SSadaf Ebrahimi 4U, // LDARH 3346*9a0e4156SSadaf Ebrahimi 4U, // LDARW 3347*9a0e4156SSadaf Ebrahimi 4U, // LDARX 3348*9a0e4156SSadaf Ebrahimi 3588U, // LDAXPW 3349*9a0e4156SSadaf Ebrahimi 3588U, // LDAXPX 3350*9a0e4156SSadaf Ebrahimi 4U, // LDAXRB 3351*9a0e4156SSadaf Ebrahimi 4U, // LDAXRH 3352*9a0e4156SSadaf Ebrahimi 4U, // LDAXRW 3353*9a0e4156SSadaf Ebrahimi 4U, // LDAXRX 3354*9a0e4156SSadaf Ebrahimi 43268U, // LDNPDi 3355*9a0e4156SSadaf Ebrahimi 51460U, // LDNPQi 3356*9a0e4156SSadaf Ebrahimi 59652U, // LDNPSi 3357*9a0e4156SSadaf Ebrahimi 59652U, // LDNPWi 3358*9a0e4156SSadaf Ebrahimi 43268U, // LDNPXi 3359*9a0e4156SSadaf Ebrahimi 43268U, // LDPDi 3360*9a0e4156SSadaf Ebrahimi 69444U, // LDPDpost 3361*9a0e4156SSadaf Ebrahimi 330052U, // LDPDpre 3362*9a0e4156SSadaf Ebrahimi 51460U, // LDPQi 3363*9a0e4156SSadaf Ebrahimi 77636U, // LDPQpost 3364*9a0e4156SSadaf Ebrahimi 338244U, // LDPQpre 3365*9a0e4156SSadaf Ebrahimi 59652U, // LDPSWi 3366*9a0e4156SSadaf Ebrahimi 85828U, // LDPSWpost 3367*9a0e4156SSadaf Ebrahimi 346436U, // LDPSWpre 3368*9a0e4156SSadaf Ebrahimi 59652U, // LDPSi 3369*9a0e4156SSadaf Ebrahimi 85828U, // LDPSpost 3370*9a0e4156SSadaf Ebrahimi 346436U, // LDPSpre 3371*9a0e4156SSadaf Ebrahimi 59652U, // LDPWi 3372*9a0e4156SSadaf Ebrahimi 85828U, // LDPWpost 3373*9a0e4156SSadaf Ebrahimi 346436U, // LDPWpre 3374*9a0e4156SSadaf Ebrahimi 43268U, // LDPXi 3375*9a0e4156SSadaf Ebrahimi 69444U, // LDPXpost 3376*9a0e4156SSadaf Ebrahimi 330052U, // LDPXpre 3377*9a0e4156SSadaf Ebrahimi 4U, // LDRBBpost 3378*9a0e4156SSadaf Ebrahimi 4161U, // LDRBBpre 3379*9a0e4156SSadaf Ebrahimi 92417U, // LDRBBroW 3380*9a0e4156SSadaf Ebrahimi 100609U, // LDRBBroX 3381*9a0e4156SSadaf Ebrahimi 89U, // LDRBBui 3382*9a0e4156SSadaf Ebrahimi 4U, // LDRBpost 3383*9a0e4156SSadaf Ebrahimi 4161U, // LDRBpre 3384*9a0e4156SSadaf Ebrahimi 92417U, // LDRBroW 3385*9a0e4156SSadaf Ebrahimi 100609U, // LDRBroX 3386*9a0e4156SSadaf Ebrahimi 89U, // LDRBui 3387*9a0e4156SSadaf Ebrahimi 0U, // LDRDl 3388*9a0e4156SSadaf Ebrahimi 4U, // LDRDpost 3389*9a0e4156SSadaf Ebrahimi 4161U, // LDRDpre 3390*9a0e4156SSadaf Ebrahimi 108801U, // LDRDroW 3391*9a0e4156SSadaf Ebrahimi 116993U, // LDRDroX 3392*9a0e4156SSadaf Ebrahimi 97U, // LDRDui 3393*9a0e4156SSadaf Ebrahimi 4U, // LDRHHpost 3394*9a0e4156SSadaf Ebrahimi 4161U, // LDRHHpre 3395*9a0e4156SSadaf Ebrahimi 125185U, // LDRHHroW 3396*9a0e4156SSadaf Ebrahimi 133377U, // LDRHHroX 3397*9a0e4156SSadaf Ebrahimi 105U, // LDRHHui 3398*9a0e4156SSadaf Ebrahimi 4U, // LDRHpost 3399*9a0e4156SSadaf Ebrahimi 4161U, // LDRHpre 3400*9a0e4156SSadaf Ebrahimi 125185U, // LDRHroW 3401*9a0e4156SSadaf Ebrahimi 133377U, // LDRHroX 3402*9a0e4156SSadaf Ebrahimi 105U, // LDRHui 3403*9a0e4156SSadaf Ebrahimi 0U, // LDRQl 3404*9a0e4156SSadaf Ebrahimi 4U, // LDRQpost 3405*9a0e4156SSadaf Ebrahimi 4161U, // LDRQpre 3406*9a0e4156SSadaf Ebrahimi 141569U, // LDRQroW 3407*9a0e4156SSadaf Ebrahimi 149761U, // LDRQroX 3408*9a0e4156SSadaf Ebrahimi 113U, // LDRQui 3409*9a0e4156SSadaf Ebrahimi 4U, // LDRSBWpost 3410*9a0e4156SSadaf Ebrahimi 4161U, // LDRSBWpre 3411*9a0e4156SSadaf Ebrahimi 92417U, // LDRSBWroW 3412*9a0e4156SSadaf Ebrahimi 100609U, // LDRSBWroX 3413*9a0e4156SSadaf Ebrahimi 89U, // LDRSBWui 3414*9a0e4156SSadaf Ebrahimi 4U, // LDRSBXpost 3415*9a0e4156SSadaf Ebrahimi 4161U, // LDRSBXpre 3416*9a0e4156SSadaf Ebrahimi 92417U, // LDRSBXroW 3417*9a0e4156SSadaf Ebrahimi 100609U, // LDRSBXroX 3418*9a0e4156SSadaf Ebrahimi 89U, // LDRSBXui 3419*9a0e4156SSadaf Ebrahimi 4U, // LDRSHWpost 3420*9a0e4156SSadaf Ebrahimi 4161U, // LDRSHWpre 3421*9a0e4156SSadaf Ebrahimi 125185U, // LDRSHWroW 3422*9a0e4156SSadaf Ebrahimi 133377U, // LDRSHWroX 3423*9a0e4156SSadaf Ebrahimi 105U, // LDRSHWui 3424*9a0e4156SSadaf Ebrahimi 4U, // LDRSHXpost 3425*9a0e4156SSadaf Ebrahimi 4161U, // LDRSHXpre 3426*9a0e4156SSadaf Ebrahimi 125185U, // LDRSHXroW 3427*9a0e4156SSadaf Ebrahimi 133377U, // LDRSHXroX 3428*9a0e4156SSadaf Ebrahimi 105U, // LDRSHXui 3429*9a0e4156SSadaf Ebrahimi 0U, // LDRSWl 3430*9a0e4156SSadaf Ebrahimi 4U, // LDRSWpost 3431*9a0e4156SSadaf Ebrahimi 4161U, // LDRSWpre 3432*9a0e4156SSadaf Ebrahimi 157953U, // LDRSWroW 3433*9a0e4156SSadaf Ebrahimi 166145U, // LDRSWroX 3434*9a0e4156SSadaf Ebrahimi 121U, // LDRSWui 3435*9a0e4156SSadaf Ebrahimi 0U, // LDRSl 3436*9a0e4156SSadaf Ebrahimi 4U, // LDRSpost 3437*9a0e4156SSadaf Ebrahimi 4161U, // LDRSpre 3438*9a0e4156SSadaf Ebrahimi 157953U, // LDRSroW 3439*9a0e4156SSadaf Ebrahimi 166145U, // LDRSroX 3440*9a0e4156SSadaf Ebrahimi 121U, // LDRSui 3441*9a0e4156SSadaf Ebrahimi 0U, // LDRWl 3442*9a0e4156SSadaf Ebrahimi 4U, // LDRWpost 3443*9a0e4156SSadaf Ebrahimi 4161U, // LDRWpre 3444*9a0e4156SSadaf Ebrahimi 157953U, // LDRWroW 3445*9a0e4156SSadaf Ebrahimi 166145U, // LDRWroX 3446*9a0e4156SSadaf Ebrahimi 121U, // LDRWui 3447*9a0e4156SSadaf Ebrahimi 0U, // LDRXl 3448*9a0e4156SSadaf Ebrahimi 4U, // LDRXpost 3449*9a0e4156SSadaf Ebrahimi 4161U, // LDRXpre 3450*9a0e4156SSadaf Ebrahimi 108801U, // LDRXroW 3451*9a0e4156SSadaf Ebrahimi 116993U, // LDRXroX 3452*9a0e4156SSadaf Ebrahimi 97U, // LDRXui 3453*9a0e4156SSadaf Ebrahimi 3585U, // LDTRBi 3454*9a0e4156SSadaf Ebrahimi 3585U, // LDTRHi 3455*9a0e4156SSadaf Ebrahimi 3585U, // LDTRSBWi 3456*9a0e4156SSadaf Ebrahimi 3585U, // LDTRSBXi 3457*9a0e4156SSadaf Ebrahimi 3585U, // LDTRSHWi 3458*9a0e4156SSadaf Ebrahimi 3585U, // LDTRSHXi 3459*9a0e4156SSadaf Ebrahimi 3585U, // LDTRSWi 3460*9a0e4156SSadaf Ebrahimi 3585U, // LDTRWi 3461*9a0e4156SSadaf Ebrahimi 3585U, // LDTRXi 3462*9a0e4156SSadaf Ebrahimi 3585U, // LDURBBi 3463*9a0e4156SSadaf Ebrahimi 3585U, // LDURBi 3464*9a0e4156SSadaf Ebrahimi 3585U, // LDURDi 3465*9a0e4156SSadaf Ebrahimi 3585U, // LDURHHi 3466*9a0e4156SSadaf Ebrahimi 3585U, // LDURHi 3467*9a0e4156SSadaf Ebrahimi 3585U, // LDURQi 3468*9a0e4156SSadaf Ebrahimi 3585U, // LDURSBWi 3469*9a0e4156SSadaf Ebrahimi 3585U, // LDURSBXi 3470*9a0e4156SSadaf Ebrahimi 3585U, // LDURSHWi 3471*9a0e4156SSadaf Ebrahimi 3585U, // LDURSHXi 3472*9a0e4156SSadaf Ebrahimi 3585U, // LDURSWi 3473*9a0e4156SSadaf Ebrahimi 3585U, // LDURSi 3474*9a0e4156SSadaf Ebrahimi 3585U, // LDURWi 3475*9a0e4156SSadaf Ebrahimi 3585U, // LDURXi 3476*9a0e4156SSadaf Ebrahimi 3588U, // LDXPW 3477*9a0e4156SSadaf Ebrahimi 3588U, // LDXPX 3478*9a0e4156SSadaf Ebrahimi 4U, // LDXRB 3479*9a0e4156SSadaf Ebrahimi 4U, // LDXRH 3480*9a0e4156SSadaf Ebrahimi 4U, // LDXRW 3481*9a0e4156SSadaf Ebrahimi 4U, // LDXRX 3482*9a0e4156SSadaf Ebrahimi 0U, // LOADgot 3483*9a0e4156SSadaf Ebrahimi 1U, // LSLVWr 3484*9a0e4156SSadaf Ebrahimi 1U, // LSLVXr 3485*9a0e4156SSadaf Ebrahimi 1U, // LSRVWr 3486*9a0e4156SSadaf Ebrahimi 1U, // LSRVXr 3487*9a0e4156SSadaf Ebrahimi 18689U, // MADDWrrr 3488*9a0e4156SSadaf Ebrahimi 18689U, // MADDXrrr 3489*9a0e4156SSadaf Ebrahimi 1041U, // MLAv16i8 3490*9a0e4156SSadaf Ebrahimi 1297U, // MLAv2i32 3491*9a0e4156SSadaf Ebrahimi 27665U, // MLAv2i32_indexed 3492*9a0e4156SSadaf Ebrahimi 1553U, // MLAv4i16 3493*9a0e4156SSadaf Ebrahimi 28945U, // MLAv4i16_indexed 3494*9a0e4156SSadaf Ebrahimi 529U, // MLAv4i32 3495*9a0e4156SSadaf Ebrahimi 27665U, // MLAv4i32_indexed 3496*9a0e4156SSadaf Ebrahimi 785U, // MLAv8i16 3497*9a0e4156SSadaf Ebrahimi 28945U, // MLAv8i16_indexed 3498*9a0e4156SSadaf Ebrahimi 1809U, // MLAv8i8 3499*9a0e4156SSadaf Ebrahimi 1041U, // MLSv16i8 3500*9a0e4156SSadaf Ebrahimi 1297U, // MLSv2i32 3501*9a0e4156SSadaf Ebrahimi 27665U, // MLSv2i32_indexed 3502*9a0e4156SSadaf Ebrahimi 1553U, // MLSv4i16 3503*9a0e4156SSadaf Ebrahimi 28945U, // MLSv4i16_indexed 3504*9a0e4156SSadaf Ebrahimi 529U, // MLSv4i32 3505*9a0e4156SSadaf Ebrahimi 27665U, // MLSv4i32_indexed 3506*9a0e4156SSadaf Ebrahimi 785U, // MLSv8i16 3507*9a0e4156SSadaf Ebrahimi 28945U, // MLSv8i16_indexed 3508*9a0e4156SSadaf Ebrahimi 1809U, // MLSv8i8 3509*9a0e4156SSadaf Ebrahimi 0U, // MOVID 3510*9a0e4156SSadaf Ebrahimi 0U, // MOVIv16b_ns 3511*9a0e4156SSadaf Ebrahimi 0U, // MOVIv2d_ns 3512*9a0e4156SSadaf Ebrahimi 4U, // MOVIv2i32 3513*9a0e4156SSadaf Ebrahimi 4U, // MOVIv2s_msl 3514*9a0e4156SSadaf Ebrahimi 4U, // MOVIv4i16 3515*9a0e4156SSadaf Ebrahimi 4U, // MOVIv4i32 3516*9a0e4156SSadaf Ebrahimi 4U, // MOVIv4s_msl 3517*9a0e4156SSadaf Ebrahimi 0U, // MOVIv8b_ns 3518*9a0e4156SSadaf Ebrahimi 4U, // MOVIv8i16 3519*9a0e4156SSadaf Ebrahimi 0U, // MOVKWi 3520*9a0e4156SSadaf Ebrahimi 0U, // MOVKXi 3521*9a0e4156SSadaf Ebrahimi 4U, // MOVNWi 3522*9a0e4156SSadaf Ebrahimi 4U, // MOVNXi 3523*9a0e4156SSadaf Ebrahimi 4U, // MOVZWi 3524*9a0e4156SSadaf Ebrahimi 4U, // MOVZXi 3525*9a0e4156SSadaf Ebrahimi 0U, // MOVaddr 3526*9a0e4156SSadaf Ebrahimi 0U, // MOVaddrBA 3527*9a0e4156SSadaf Ebrahimi 0U, // MOVaddrCP 3528*9a0e4156SSadaf Ebrahimi 0U, // MOVaddrEXT 3529*9a0e4156SSadaf Ebrahimi 0U, // MOVaddrJT 3530*9a0e4156SSadaf Ebrahimi 0U, // MOVaddrTLS 3531*9a0e4156SSadaf Ebrahimi 0U, // MOVi32imm 3532*9a0e4156SSadaf Ebrahimi 0U, // MOVi64imm 3533*9a0e4156SSadaf Ebrahimi 0U, // MRS 3534*9a0e4156SSadaf Ebrahimi 0U, // MSR 3535*9a0e4156SSadaf Ebrahimi 0U, // MSRpstate 3536*9a0e4156SSadaf Ebrahimi 18689U, // MSUBWrrr 3537*9a0e4156SSadaf Ebrahimi 18689U, // MSUBXrrr 3538*9a0e4156SSadaf Ebrahimi 1033U, // MULv16i8 3539*9a0e4156SSadaf Ebrahimi 1289U, // MULv2i32 3540*9a0e4156SSadaf Ebrahimi 35849U, // MULv2i32_indexed 3541*9a0e4156SSadaf Ebrahimi 1545U, // MULv4i16 3542*9a0e4156SSadaf Ebrahimi 37129U, // MULv4i16_indexed 3543*9a0e4156SSadaf Ebrahimi 521U, // MULv4i32 3544*9a0e4156SSadaf Ebrahimi 35849U, // MULv4i32_indexed 3545*9a0e4156SSadaf Ebrahimi 777U, // MULv8i16 3546*9a0e4156SSadaf Ebrahimi 37129U, // MULv8i16_indexed 3547*9a0e4156SSadaf Ebrahimi 1801U, // MULv8i8 3548*9a0e4156SSadaf Ebrahimi 4U, // MVNIv2i32 3549*9a0e4156SSadaf Ebrahimi 4U, // MVNIv2s_msl 3550*9a0e4156SSadaf Ebrahimi 4U, // MVNIv4i16 3551*9a0e4156SSadaf Ebrahimi 4U, // MVNIv4i32 3552*9a0e4156SSadaf Ebrahimi 4U, // MVNIv4s_msl 3553*9a0e4156SSadaf Ebrahimi 4U, // MVNIv8i16 3554*9a0e4156SSadaf Ebrahimi 0U, // NEGv16i8 3555*9a0e4156SSadaf Ebrahimi 0U, // NEGv1i64 3556*9a0e4156SSadaf Ebrahimi 0U, // NEGv2i32 3557*9a0e4156SSadaf Ebrahimi 0U, // NEGv2i64 3558*9a0e4156SSadaf Ebrahimi 0U, // NEGv4i16 3559*9a0e4156SSadaf Ebrahimi 0U, // NEGv4i32 3560*9a0e4156SSadaf Ebrahimi 0U, // NEGv8i16 3561*9a0e4156SSadaf Ebrahimi 0U, // NEGv8i8 3562*9a0e4156SSadaf Ebrahimi 0U, // NOTv16i8 3563*9a0e4156SSadaf Ebrahimi 0U, // NOTv8i8 3564*9a0e4156SSadaf Ebrahimi 0U, // ORNWrr 3565*9a0e4156SSadaf Ebrahimi 33U, // ORNWrs 3566*9a0e4156SSadaf Ebrahimi 0U, // ORNXrr 3567*9a0e4156SSadaf Ebrahimi 33U, // ORNXrs 3568*9a0e4156SSadaf Ebrahimi 1033U, // ORNv16i8 3569*9a0e4156SSadaf Ebrahimi 1801U, // ORNv8i8 3570*9a0e4156SSadaf Ebrahimi 49U, // ORRWri 3571*9a0e4156SSadaf Ebrahimi 0U, // ORRWrr 3572*9a0e4156SSadaf Ebrahimi 33U, // ORRWrs 3573*9a0e4156SSadaf Ebrahimi 57U, // ORRXri 3574*9a0e4156SSadaf Ebrahimi 0U, // ORRXrr 3575*9a0e4156SSadaf Ebrahimi 33U, // ORRXrs 3576*9a0e4156SSadaf Ebrahimi 1033U, // ORRv16i8 3577*9a0e4156SSadaf Ebrahimi 0U, // ORRv2i32 3578*9a0e4156SSadaf Ebrahimi 0U, // ORRv4i16 3579*9a0e4156SSadaf Ebrahimi 0U, // ORRv4i32 3580*9a0e4156SSadaf Ebrahimi 0U, // ORRv8i16 3581*9a0e4156SSadaf Ebrahimi 1801U, // ORRv8i8 3582*9a0e4156SSadaf Ebrahimi 1033U, // PMULLv16i8 3583*9a0e4156SSadaf Ebrahimi 0U, // PMULLv1i64 3584*9a0e4156SSadaf Ebrahimi 0U, // PMULLv2i64 3585*9a0e4156SSadaf Ebrahimi 1801U, // PMULLv8i8 3586*9a0e4156SSadaf Ebrahimi 1033U, // PMULv16i8 3587*9a0e4156SSadaf Ebrahimi 1801U, // PMULv8i8 3588*9a0e4156SSadaf Ebrahimi 0U, // PRFMl 3589*9a0e4156SSadaf Ebrahimi 108801U, // PRFMroW 3590*9a0e4156SSadaf Ebrahimi 116993U, // PRFMroX 3591*9a0e4156SSadaf Ebrahimi 97U, // PRFMui 3592*9a0e4156SSadaf Ebrahimi 3585U, // PRFUMi 3593*9a0e4156SSadaf Ebrahimi 265U, // RADDHNv2i64_v2i32 3594*9a0e4156SSadaf Ebrahimi 273U, // RADDHNv2i64_v4i32 3595*9a0e4156SSadaf Ebrahimi 521U, // RADDHNv4i32_v4i16 3596*9a0e4156SSadaf Ebrahimi 529U, // RADDHNv4i32_v8i16 3597*9a0e4156SSadaf Ebrahimi 785U, // RADDHNv8i16_v16i8 3598*9a0e4156SSadaf Ebrahimi 777U, // RADDHNv8i16_v8i8 3599*9a0e4156SSadaf Ebrahimi 0U, // RBITWr 3600*9a0e4156SSadaf Ebrahimi 0U, // RBITXr 3601*9a0e4156SSadaf Ebrahimi 0U, // RBITv16i8 3602*9a0e4156SSadaf Ebrahimi 0U, // RBITv8i8 3603*9a0e4156SSadaf Ebrahimi 0U, // RET 3604*9a0e4156SSadaf Ebrahimi 0U, // RET_ReallyLR 3605*9a0e4156SSadaf Ebrahimi 0U, // REV16Wr 3606*9a0e4156SSadaf Ebrahimi 0U, // REV16Xr 3607*9a0e4156SSadaf Ebrahimi 0U, // REV16v16i8 3608*9a0e4156SSadaf Ebrahimi 0U, // REV16v8i8 3609*9a0e4156SSadaf Ebrahimi 0U, // REV32Xr 3610*9a0e4156SSadaf Ebrahimi 0U, // REV32v16i8 3611*9a0e4156SSadaf Ebrahimi 0U, // REV32v4i16 3612*9a0e4156SSadaf Ebrahimi 0U, // REV32v8i16 3613*9a0e4156SSadaf Ebrahimi 0U, // REV32v8i8 3614*9a0e4156SSadaf Ebrahimi 0U, // REV64v16i8 3615*9a0e4156SSadaf Ebrahimi 0U, // REV64v2i32 3616*9a0e4156SSadaf Ebrahimi 0U, // REV64v4i16 3617*9a0e4156SSadaf Ebrahimi 0U, // REV64v4i32 3618*9a0e4156SSadaf Ebrahimi 0U, // REV64v8i16 3619*9a0e4156SSadaf Ebrahimi 0U, // REV64v8i8 3620*9a0e4156SSadaf Ebrahimi 0U, // REVWr 3621*9a0e4156SSadaf Ebrahimi 0U, // REVXr 3622*9a0e4156SSadaf Ebrahimi 1U, // RORVWr 3623*9a0e4156SSadaf Ebrahimi 1U, // RORVXr 3624*9a0e4156SSadaf Ebrahimi 65U, // RSHRNv16i8_shift 3625*9a0e4156SSadaf Ebrahimi 1U, // RSHRNv2i32_shift 3626*9a0e4156SSadaf Ebrahimi 1U, // RSHRNv4i16_shift 3627*9a0e4156SSadaf Ebrahimi 65U, // RSHRNv4i32_shift 3628*9a0e4156SSadaf Ebrahimi 65U, // RSHRNv8i16_shift 3629*9a0e4156SSadaf Ebrahimi 1U, // RSHRNv8i8_shift 3630*9a0e4156SSadaf Ebrahimi 265U, // RSUBHNv2i64_v2i32 3631*9a0e4156SSadaf Ebrahimi 273U, // RSUBHNv2i64_v4i32 3632*9a0e4156SSadaf Ebrahimi 521U, // RSUBHNv4i32_v4i16 3633*9a0e4156SSadaf Ebrahimi 529U, // RSUBHNv4i32_v8i16 3634*9a0e4156SSadaf Ebrahimi 785U, // RSUBHNv8i16_v16i8 3635*9a0e4156SSadaf Ebrahimi 777U, // RSUBHNv8i16_v8i8 3636*9a0e4156SSadaf Ebrahimi 1041U, // SABALv16i8_v8i16 3637*9a0e4156SSadaf Ebrahimi 1297U, // SABALv2i32_v2i64 3638*9a0e4156SSadaf Ebrahimi 1553U, // SABALv4i16_v4i32 3639*9a0e4156SSadaf Ebrahimi 529U, // SABALv4i32_v2i64 3640*9a0e4156SSadaf Ebrahimi 785U, // SABALv8i16_v4i32 3641*9a0e4156SSadaf Ebrahimi 1809U, // SABALv8i8_v8i16 3642*9a0e4156SSadaf Ebrahimi 1041U, // SABAv16i8 3643*9a0e4156SSadaf Ebrahimi 1297U, // SABAv2i32 3644*9a0e4156SSadaf Ebrahimi 1553U, // SABAv4i16 3645*9a0e4156SSadaf Ebrahimi 529U, // SABAv4i32 3646*9a0e4156SSadaf Ebrahimi 785U, // SABAv8i16 3647*9a0e4156SSadaf Ebrahimi 1809U, // SABAv8i8 3648*9a0e4156SSadaf Ebrahimi 1033U, // SABDLv16i8_v8i16 3649*9a0e4156SSadaf Ebrahimi 1289U, // SABDLv2i32_v2i64 3650*9a0e4156SSadaf Ebrahimi 1545U, // SABDLv4i16_v4i32 3651*9a0e4156SSadaf Ebrahimi 521U, // SABDLv4i32_v2i64 3652*9a0e4156SSadaf Ebrahimi 777U, // SABDLv8i16_v4i32 3653*9a0e4156SSadaf Ebrahimi 1801U, // SABDLv8i8_v8i16 3654*9a0e4156SSadaf Ebrahimi 1033U, // SABDv16i8 3655*9a0e4156SSadaf Ebrahimi 1289U, // SABDv2i32 3656*9a0e4156SSadaf Ebrahimi 1545U, // SABDv4i16 3657*9a0e4156SSadaf Ebrahimi 521U, // SABDv4i32 3658*9a0e4156SSadaf Ebrahimi 777U, // SABDv8i16 3659*9a0e4156SSadaf Ebrahimi 1801U, // SABDv8i8 3660*9a0e4156SSadaf Ebrahimi 0U, // SADALPv16i8_v8i16 3661*9a0e4156SSadaf Ebrahimi 0U, // SADALPv2i32_v1i64 3662*9a0e4156SSadaf Ebrahimi 0U, // SADALPv4i16_v2i32 3663*9a0e4156SSadaf Ebrahimi 0U, // SADALPv4i32_v2i64 3664*9a0e4156SSadaf Ebrahimi 0U, // SADALPv8i16_v4i32 3665*9a0e4156SSadaf Ebrahimi 0U, // SADALPv8i8_v4i16 3666*9a0e4156SSadaf Ebrahimi 0U, // SADDLPv16i8_v8i16 3667*9a0e4156SSadaf Ebrahimi 0U, // SADDLPv2i32_v1i64 3668*9a0e4156SSadaf Ebrahimi 0U, // SADDLPv4i16_v2i32 3669*9a0e4156SSadaf Ebrahimi 0U, // SADDLPv4i32_v2i64 3670*9a0e4156SSadaf Ebrahimi 0U, // SADDLPv8i16_v4i32 3671*9a0e4156SSadaf Ebrahimi 0U, // SADDLPv8i8_v4i16 3672*9a0e4156SSadaf Ebrahimi 0U, // SADDLVv16i8v 3673*9a0e4156SSadaf Ebrahimi 0U, // SADDLVv4i16v 3674*9a0e4156SSadaf Ebrahimi 0U, // SADDLVv4i32v 3675*9a0e4156SSadaf Ebrahimi 0U, // SADDLVv8i16v 3676*9a0e4156SSadaf Ebrahimi 0U, // SADDLVv8i8v 3677*9a0e4156SSadaf Ebrahimi 1033U, // SADDLv16i8_v8i16 3678*9a0e4156SSadaf Ebrahimi 1289U, // SADDLv2i32_v2i64 3679*9a0e4156SSadaf Ebrahimi 1545U, // SADDLv4i16_v4i32 3680*9a0e4156SSadaf Ebrahimi 521U, // SADDLv4i32_v2i64 3681*9a0e4156SSadaf Ebrahimi 777U, // SADDLv8i16_v4i32 3682*9a0e4156SSadaf Ebrahimi 1801U, // SADDLv8i8_v8i16 3683*9a0e4156SSadaf Ebrahimi 1033U, // SADDWv16i8_v8i16 3684*9a0e4156SSadaf Ebrahimi 1289U, // SADDWv2i32_v2i64 3685*9a0e4156SSadaf Ebrahimi 1545U, // SADDWv4i16_v4i32 3686*9a0e4156SSadaf Ebrahimi 521U, // SADDWv4i32_v2i64 3687*9a0e4156SSadaf Ebrahimi 777U, // SADDWv8i16_v4i32 3688*9a0e4156SSadaf Ebrahimi 1801U, // SADDWv8i8_v8i16 3689*9a0e4156SSadaf Ebrahimi 1U, // SBCSWr 3690*9a0e4156SSadaf Ebrahimi 1U, // SBCSXr 3691*9a0e4156SSadaf Ebrahimi 1U, // SBCWr 3692*9a0e4156SSadaf Ebrahimi 1U, // SBCXr 3693*9a0e4156SSadaf Ebrahimi 18689U, // SBFMWri 3694*9a0e4156SSadaf Ebrahimi 18689U, // SBFMXri 3695*9a0e4156SSadaf Ebrahimi 1U, // SCVTFSWDri 3696*9a0e4156SSadaf Ebrahimi 1U, // SCVTFSWSri 3697*9a0e4156SSadaf Ebrahimi 1U, // SCVTFSXDri 3698*9a0e4156SSadaf Ebrahimi 1U, // SCVTFSXSri 3699*9a0e4156SSadaf Ebrahimi 0U, // SCVTFUWDri 3700*9a0e4156SSadaf Ebrahimi 0U, // SCVTFUWSri 3701*9a0e4156SSadaf Ebrahimi 0U, // SCVTFUXDri 3702*9a0e4156SSadaf Ebrahimi 0U, // SCVTFUXSri 3703*9a0e4156SSadaf Ebrahimi 1U, // SCVTFd 3704*9a0e4156SSadaf Ebrahimi 1U, // SCVTFs 3705*9a0e4156SSadaf Ebrahimi 0U, // SCVTFv1i32 3706*9a0e4156SSadaf Ebrahimi 0U, // SCVTFv1i64 3707*9a0e4156SSadaf Ebrahimi 0U, // SCVTFv2f32 3708*9a0e4156SSadaf Ebrahimi 0U, // SCVTFv2f64 3709*9a0e4156SSadaf Ebrahimi 1U, // SCVTFv2i32_shift 3710*9a0e4156SSadaf Ebrahimi 1U, // SCVTFv2i64_shift 3711*9a0e4156SSadaf Ebrahimi 0U, // SCVTFv4f32 3712*9a0e4156SSadaf Ebrahimi 1U, // SCVTFv4i32_shift 3713*9a0e4156SSadaf Ebrahimi 1U, // SDIVWr 3714*9a0e4156SSadaf Ebrahimi 1U, // SDIVXr 3715*9a0e4156SSadaf Ebrahimi 1U, // SDIV_IntWr 3716*9a0e4156SSadaf Ebrahimi 1U, // SDIV_IntXr 3717*9a0e4156SSadaf Ebrahimi 529U, // SHA1Crrr 3718*9a0e4156SSadaf Ebrahimi 0U, // SHA1Hrr 3719*9a0e4156SSadaf Ebrahimi 529U, // SHA1Mrrr 3720*9a0e4156SSadaf Ebrahimi 529U, // SHA1Prrr 3721*9a0e4156SSadaf Ebrahimi 529U, // SHA1SU0rrr 3722*9a0e4156SSadaf Ebrahimi 0U, // SHA1SU1rr 3723*9a0e4156SSadaf Ebrahimi 529U, // SHA256H2rrr 3724*9a0e4156SSadaf Ebrahimi 529U, // SHA256Hrrr 3725*9a0e4156SSadaf Ebrahimi 0U, // SHA256SU0rr 3726*9a0e4156SSadaf Ebrahimi 529U, // SHA256SU1rrr 3727*9a0e4156SSadaf Ebrahimi 1033U, // SHADDv16i8 3728*9a0e4156SSadaf Ebrahimi 1289U, // SHADDv2i32 3729*9a0e4156SSadaf Ebrahimi 1545U, // SHADDv4i16 3730*9a0e4156SSadaf Ebrahimi 521U, // SHADDv4i32 3731*9a0e4156SSadaf Ebrahimi 777U, // SHADDv8i16 3732*9a0e4156SSadaf Ebrahimi 1801U, // SHADDv8i8 3733*9a0e4156SSadaf Ebrahimi 4U, // SHLLv16i8 3734*9a0e4156SSadaf Ebrahimi 4U, // SHLLv2i32 3735*9a0e4156SSadaf Ebrahimi 4U, // SHLLv4i16 3736*9a0e4156SSadaf Ebrahimi 4U, // SHLLv4i32 3737*9a0e4156SSadaf Ebrahimi 5U, // SHLLv8i16 3738*9a0e4156SSadaf Ebrahimi 5U, // SHLLv8i8 3739*9a0e4156SSadaf Ebrahimi 1U, // SHLd 3740*9a0e4156SSadaf Ebrahimi 1U, // SHLv16i8_shift 3741*9a0e4156SSadaf Ebrahimi 1U, // SHLv2i32_shift 3742*9a0e4156SSadaf Ebrahimi 1U, // SHLv2i64_shift 3743*9a0e4156SSadaf Ebrahimi 1U, // SHLv4i16_shift 3744*9a0e4156SSadaf Ebrahimi 1U, // SHLv4i32_shift 3745*9a0e4156SSadaf Ebrahimi 1U, // SHLv8i16_shift 3746*9a0e4156SSadaf Ebrahimi 1U, // SHLv8i8_shift 3747*9a0e4156SSadaf Ebrahimi 65U, // SHRNv16i8_shift 3748*9a0e4156SSadaf Ebrahimi 1U, // SHRNv2i32_shift 3749*9a0e4156SSadaf Ebrahimi 1U, // SHRNv4i16_shift 3750*9a0e4156SSadaf Ebrahimi 65U, // SHRNv4i32_shift 3751*9a0e4156SSadaf Ebrahimi 65U, // SHRNv8i16_shift 3752*9a0e4156SSadaf Ebrahimi 1U, // SHRNv8i8_shift 3753*9a0e4156SSadaf Ebrahimi 1033U, // SHSUBv16i8 3754*9a0e4156SSadaf Ebrahimi 1289U, // SHSUBv2i32 3755*9a0e4156SSadaf Ebrahimi 1545U, // SHSUBv4i16 3756*9a0e4156SSadaf Ebrahimi 521U, // SHSUBv4i32 3757*9a0e4156SSadaf Ebrahimi 777U, // SHSUBv8i16 3758*9a0e4156SSadaf Ebrahimi 1801U, // SHSUBv8i8 3759*9a0e4156SSadaf Ebrahimi 65U, // SLId 3760*9a0e4156SSadaf Ebrahimi 65U, // SLIv16i8_shift 3761*9a0e4156SSadaf Ebrahimi 65U, // SLIv2i32_shift 3762*9a0e4156SSadaf Ebrahimi 65U, // SLIv2i64_shift 3763*9a0e4156SSadaf Ebrahimi 65U, // SLIv4i16_shift 3764*9a0e4156SSadaf Ebrahimi 65U, // SLIv4i32_shift 3765*9a0e4156SSadaf Ebrahimi 65U, // SLIv8i16_shift 3766*9a0e4156SSadaf Ebrahimi 65U, // SLIv8i8_shift 3767*9a0e4156SSadaf Ebrahimi 18689U, // SMADDLrrr 3768*9a0e4156SSadaf Ebrahimi 1033U, // SMAXPv16i8 3769*9a0e4156SSadaf Ebrahimi 1289U, // SMAXPv2i32 3770*9a0e4156SSadaf Ebrahimi 1545U, // SMAXPv4i16 3771*9a0e4156SSadaf Ebrahimi 521U, // SMAXPv4i32 3772*9a0e4156SSadaf Ebrahimi 777U, // SMAXPv8i16 3773*9a0e4156SSadaf Ebrahimi 1801U, // SMAXPv8i8 3774*9a0e4156SSadaf Ebrahimi 0U, // SMAXVv16i8v 3775*9a0e4156SSadaf Ebrahimi 0U, // SMAXVv4i16v 3776*9a0e4156SSadaf Ebrahimi 0U, // SMAXVv4i32v 3777*9a0e4156SSadaf Ebrahimi 0U, // SMAXVv8i16v 3778*9a0e4156SSadaf Ebrahimi 0U, // SMAXVv8i8v 3779*9a0e4156SSadaf Ebrahimi 1033U, // SMAXv16i8 3780*9a0e4156SSadaf Ebrahimi 1289U, // SMAXv2i32 3781*9a0e4156SSadaf Ebrahimi 1545U, // SMAXv4i16 3782*9a0e4156SSadaf Ebrahimi 521U, // SMAXv4i32 3783*9a0e4156SSadaf Ebrahimi 777U, // SMAXv8i16 3784*9a0e4156SSadaf Ebrahimi 1801U, // SMAXv8i8 3785*9a0e4156SSadaf Ebrahimi 0U, // SMC 3786*9a0e4156SSadaf Ebrahimi 1033U, // SMINPv16i8 3787*9a0e4156SSadaf Ebrahimi 1289U, // SMINPv2i32 3788*9a0e4156SSadaf Ebrahimi 1545U, // SMINPv4i16 3789*9a0e4156SSadaf Ebrahimi 521U, // SMINPv4i32 3790*9a0e4156SSadaf Ebrahimi 777U, // SMINPv8i16 3791*9a0e4156SSadaf Ebrahimi 1801U, // SMINPv8i8 3792*9a0e4156SSadaf Ebrahimi 0U, // SMINVv16i8v 3793*9a0e4156SSadaf Ebrahimi 0U, // SMINVv4i16v 3794*9a0e4156SSadaf Ebrahimi 0U, // SMINVv4i32v 3795*9a0e4156SSadaf Ebrahimi 0U, // SMINVv8i16v 3796*9a0e4156SSadaf Ebrahimi 0U, // SMINVv8i8v 3797*9a0e4156SSadaf Ebrahimi 1033U, // SMINv16i8 3798*9a0e4156SSadaf Ebrahimi 1289U, // SMINv2i32 3799*9a0e4156SSadaf Ebrahimi 1545U, // SMINv4i16 3800*9a0e4156SSadaf Ebrahimi 521U, // SMINv4i32 3801*9a0e4156SSadaf Ebrahimi 777U, // SMINv8i16 3802*9a0e4156SSadaf Ebrahimi 1801U, // SMINv8i8 3803*9a0e4156SSadaf Ebrahimi 1041U, // SMLALv16i8_v8i16 3804*9a0e4156SSadaf Ebrahimi 27665U, // SMLALv2i32_indexed 3805*9a0e4156SSadaf Ebrahimi 1297U, // SMLALv2i32_v2i64 3806*9a0e4156SSadaf Ebrahimi 28945U, // SMLALv4i16_indexed 3807*9a0e4156SSadaf Ebrahimi 1553U, // SMLALv4i16_v4i32 3808*9a0e4156SSadaf Ebrahimi 27665U, // SMLALv4i32_indexed 3809*9a0e4156SSadaf Ebrahimi 529U, // SMLALv4i32_v2i64 3810*9a0e4156SSadaf Ebrahimi 28945U, // SMLALv8i16_indexed 3811*9a0e4156SSadaf Ebrahimi 785U, // SMLALv8i16_v4i32 3812*9a0e4156SSadaf Ebrahimi 1809U, // SMLALv8i8_v8i16 3813*9a0e4156SSadaf Ebrahimi 1041U, // SMLSLv16i8_v8i16 3814*9a0e4156SSadaf Ebrahimi 27665U, // SMLSLv2i32_indexed 3815*9a0e4156SSadaf Ebrahimi 1297U, // SMLSLv2i32_v2i64 3816*9a0e4156SSadaf Ebrahimi 28945U, // SMLSLv4i16_indexed 3817*9a0e4156SSadaf Ebrahimi 1553U, // SMLSLv4i16_v4i32 3818*9a0e4156SSadaf Ebrahimi 27665U, // SMLSLv4i32_indexed 3819*9a0e4156SSadaf Ebrahimi 529U, // SMLSLv4i32_v2i64 3820*9a0e4156SSadaf Ebrahimi 28945U, // SMLSLv8i16_indexed 3821*9a0e4156SSadaf Ebrahimi 785U, // SMLSLv8i16_v4i32 3822*9a0e4156SSadaf Ebrahimi 1809U, // SMLSLv8i8_v8i16 3823*9a0e4156SSadaf Ebrahimi 75U, // SMOVvi16to32 3824*9a0e4156SSadaf Ebrahimi 75U, // SMOVvi16to64 3825*9a0e4156SSadaf Ebrahimi 75U, // SMOVvi32to64 3826*9a0e4156SSadaf Ebrahimi 75U, // SMOVvi8to32 3827*9a0e4156SSadaf Ebrahimi 75U, // SMOVvi8to64 3828*9a0e4156SSadaf Ebrahimi 18689U, // SMSUBLrrr 3829*9a0e4156SSadaf Ebrahimi 1U, // SMULHrr 3830*9a0e4156SSadaf Ebrahimi 1033U, // SMULLv16i8_v8i16 3831*9a0e4156SSadaf Ebrahimi 35849U, // SMULLv2i32_indexed 3832*9a0e4156SSadaf Ebrahimi 1289U, // SMULLv2i32_v2i64 3833*9a0e4156SSadaf Ebrahimi 37129U, // SMULLv4i16_indexed 3834*9a0e4156SSadaf Ebrahimi 1545U, // SMULLv4i16_v4i32 3835*9a0e4156SSadaf Ebrahimi 35849U, // SMULLv4i32_indexed 3836*9a0e4156SSadaf Ebrahimi 521U, // SMULLv4i32_v2i64 3837*9a0e4156SSadaf Ebrahimi 37129U, // SMULLv8i16_indexed 3838*9a0e4156SSadaf Ebrahimi 777U, // SMULLv8i16_v4i32 3839*9a0e4156SSadaf Ebrahimi 1801U, // SMULLv8i8_v8i16 3840*9a0e4156SSadaf Ebrahimi 0U, // SQABSv16i8 3841*9a0e4156SSadaf Ebrahimi 0U, // SQABSv1i16 3842*9a0e4156SSadaf Ebrahimi 0U, // SQABSv1i32 3843*9a0e4156SSadaf Ebrahimi 0U, // SQABSv1i64 3844*9a0e4156SSadaf Ebrahimi 0U, // SQABSv1i8 3845*9a0e4156SSadaf Ebrahimi 0U, // SQABSv2i32 3846*9a0e4156SSadaf Ebrahimi 0U, // SQABSv2i64 3847*9a0e4156SSadaf Ebrahimi 0U, // SQABSv4i16 3848*9a0e4156SSadaf Ebrahimi 0U, // SQABSv4i32 3849*9a0e4156SSadaf Ebrahimi 0U, // SQABSv8i16 3850*9a0e4156SSadaf Ebrahimi 0U, // SQABSv8i8 3851*9a0e4156SSadaf Ebrahimi 1033U, // SQADDv16i8 3852*9a0e4156SSadaf Ebrahimi 1U, // SQADDv1i16 3853*9a0e4156SSadaf Ebrahimi 1U, // SQADDv1i32 3854*9a0e4156SSadaf Ebrahimi 1U, // SQADDv1i64 3855*9a0e4156SSadaf Ebrahimi 1U, // SQADDv1i8 3856*9a0e4156SSadaf Ebrahimi 1289U, // SQADDv2i32 3857*9a0e4156SSadaf Ebrahimi 265U, // SQADDv2i64 3858*9a0e4156SSadaf Ebrahimi 1545U, // SQADDv4i16 3859*9a0e4156SSadaf Ebrahimi 521U, // SQADDv4i32 3860*9a0e4156SSadaf Ebrahimi 777U, // SQADDv8i16 3861*9a0e4156SSadaf Ebrahimi 1801U, // SQADDv8i8 3862*9a0e4156SSadaf Ebrahimi 65U, // SQDMLALi16 3863*9a0e4156SSadaf Ebrahimi 65U, // SQDMLALi32 3864*9a0e4156SSadaf Ebrahimi 28945U, // SQDMLALv1i32_indexed 3865*9a0e4156SSadaf Ebrahimi 27665U, // SQDMLALv1i64_indexed 3866*9a0e4156SSadaf Ebrahimi 27665U, // SQDMLALv2i32_indexed 3867*9a0e4156SSadaf Ebrahimi 1297U, // SQDMLALv2i32_v2i64 3868*9a0e4156SSadaf Ebrahimi 28945U, // SQDMLALv4i16_indexed 3869*9a0e4156SSadaf Ebrahimi 1553U, // SQDMLALv4i16_v4i32 3870*9a0e4156SSadaf Ebrahimi 27665U, // SQDMLALv4i32_indexed 3871*9a0e4156SSadaf Ebrahimi 529U, // SQDMLALv4i32_v2i64 3872*9a0e4156SSadaf Ebrahimi 28945U, // SQDMLALv8i16_indexed 3873*9a0e4156SSadaf Ebrahimi 785U, // SQDMLALv8i16_v4i32 3874*9a0e4156SSadaf Ebrahimi 65U, // SQDMLSLi16 3875*9a0e4156SSadaf Ebrahimi 65U, // SQDMLSLi32 3876*9a0e4156SSadaf Ebrahimi 28945U, // SQDMLSLv1i32_indexed 3877*9a0e4156SSadaf Ebrahimi 27665U, // SQDMLSLv1i64_indexed 3878*9a0e4156SSadaf Ebrahimi 27665U, // SQDMLSLv2i32_indexed 3879*9a0e4156SSadaf Ebrahimi 1297U, // SQDMLSLv2i32_v2i64 3880*9a0e4156SSadaf Ebrahimi 28945U, // SQDMLSLv4i16_indexed 3881*9a0e4156SSadaf Ebrahimi 1553U, // SQDMLSLv4i16_v4i32 3882*9a0e4156SSadaf Ebrahimi 27665U, // SQDMLSLv4i32_indexed 3883*9a0e4156SSadaf Ebrahimi 529U, // SQDMLSLv4i32_v2i64 3884*9a0e4156SSadaf Ebrahimi 28945U, // SQDMLSLv8i16_indexed 3885*9a0e4156SSadaf Ebrahimi 785U, // SQDMLSLv8i16_v4i32 3886*9a0e4156SSadaf Ebrahimi 1U, // SQDMULHv1i16 3887*9a0e4156SSadaf Ebrahimi 37129U, // SQDMULHv1i16_indexed 3888*9a0e4156SSadaf Ebrahimi 1U, // SQDMULHv1i32 3889*9a0e4156SSadaf Ebrahimi 35849U, // SQDMULHv1i32_indexed 3890*9a0e4156SSadaf Ebrahimi 1289U, // SQDMULHv2i32 3891*9a0e4156SSadaf Ebrahimi 35849U, // SQDMULHv2i32_indexed 3892*9a0e4156SSadaf Ebrahimi 1545U, // SQDMULHv4i16 3893*9a0e4156SSadaf Ebrahimi 37129U, // SQDMULHv4i16_indexed 3894*9a0e4156SSadaf Ebrahimi 521U, // SQDMULHv4i32 3895*9a0e4156SSadaf Ebrahimi 35849U, // SQDMULHv4i32_indexed 3896*9a0e4156SSadaf Ebrahimi 777U, // SQDMULHv8i16 3897*9a0e4156SSadaf Ebrahimi 37129U, // SQDMULHv8i16_indexed 3898*9a0e4156SSadaf Ebrahimi 1U, // SQDMULLi16 3899*9a0e4156SSadaf Ebrahimi 1U, // SQDMULLi32 3900*9a0e4156SSadaf Ebrahimi 37129U, // SQDMULLv1i32_indexed 3901*9a0e4156SSadaf Ebrahimi 35849U, // SQDMULLv1i64_indexed 3902*9a0e4156SSadaf Ebrahimi 35849U, // SQDMULLv2i32_indexed 3903*9a0e4156SSadaf Ebrahimi 1289U, // SQDMULLv2i32_v2i64 3904*9a0e4156SSadaf Ebrahimi 37129U, // SQDMULLv4i16_indexed 3905*9a0e4156SSadaf Ebrahimi 1545U, // SQDMULLv4i16_v4i32 3906*9a0e4156SSadaf Ebrahimi 35849U, // SQDMULLv4i32_indexed 3907*9a0e4156SSadaf Ebrahimi 521U, // SQDMULLv4i32_v2i64 3908*9a0e4156SSadaf Ebrahimi 37129U, // SQDMULLv8i16_indexed 3909*9a0e4156SSadaf Ebrahimi 777U, // SQDMULLv8i16_v4i32 3910*9a0e4156SSadaf Ebrahimi 0U, // SQNEGv16i8 3911*9a0e4156SSadaf Ebrahimi 0U, // SQNEGv1i16 3912*9a0e4156SSadaf Ebrahimi 0U, // SQNEGv1i32 3913*9a0e4156SSadaf Ebrahimi 0U, // SQNEGv1i64 3914*9a0e4156SSadaf Ebrahimi 0U, // SQNEGv1i8 3915*9a0e4156SSadaf Ebrahimi 0U, // SQNEGv2i32 3916*9a0e4156SSadaf Ebrahimi 0U, // SQNEGv2i64 3917*9a0e4156SSadaf Ebrahimi 0U, // SQNEGv4i16 3918*9a0e4156SSadaf Ebrahimi 0U, // SQNEGv4i32 3919*9a0e4156SSadaf Ebrahimi 0U, // SQNEGv8i16 3920*9a0e4156SSadaf Ebrahimi 0U, // SQNEGv8i8 3921*9a0e4156SSadaf Ebrahimi 1U, // SQRDMULHv1i16 3922*9a0e4156SSadaf Ebrahimi 37129U, // SQRDMULHv1i16_indexed 3923*9a0e4156SSadaf Ebrahimi 1U, // SQRDMULHv1i32 3924*9a0e4156SSadaf Ebrahimi 35849U, // SQRDMULHv1i32_indexed 3925*9a0e4156SSadaf Ebrahimi 1289U, // SQRDMULHv2i32 3926*9a0e4156SSadaf Ebrahimi 35849U, // SQRDMULHv2i32_indexed 3927*9a0e4156SSadaf Ebrahimi 1545U, // SQRDMULHv4i16 3928*9a0e4156SSadaf Ebrahimi 37129U, // SQRDMULHv4i16_indexed 3929*9a0e4156SSadaf Ebrahimi 521U, // SQRDMULHv4i32 3930*9a0e4156SSadaf Ebrahimi 35849U, // SQRDMULHv4i32_indexed 3931*9a0e4156SSadaf Ebrahimi 777U, // SQRDMULHv8i16 3932*9a0e4156SSadaf Ebrahimi 37129U, // SQRDMULHv8i16_indexed 3933*9a0e4156SSadaf Ebrahimi 1033U, // SQRSHLv16i8 3934*9a0e4156SSadaf Ebrahimi 1U, // SQRSHLv1i16 3935*9a0e4156SSadaf Ebrahimi 1U, // SQRSHLv1i32 3936*9a0e4156SSadaf Ebrahimi 1U, // SQRSHLv1i64 3937*9a0e4156SSadaf Ebrahimi 1U, // SQRSHLv1i8 3938*9a0e4156SSadaf Ebrahimi 1289U, // SQRSHLv2i32 3939*9a0e4156SSadaf Ebrahimi 265U, // SQRSHLv2i64 3940*9a0e4156SSadaf Ebrahimi 1545U, // SQRSHLv4i16 3941*9a0e4156SSadaf Ebrahimi 521U, // SQRSHLv4i32 3942*9a0e4156SSadaf Ebrahimi 777U, // SQRSHLv8i16 3943*9a0e4156SSadaf Ebrahimi 1801U, // SQRSHLv8i8 3944*9a0e4156SSadaf Ebrahimi 1U, // SQRSHRNb 3945*9a0e4156SSadaf Ebrahimi 1U, // SQRSHRNh 3946*9a0e4156SSadaf Ebrahimi 1U, // SQRSHRNs 3947*9a0e4156SSadaf Ebrahimi 65U, // SQRSHRNv16i8_shift 3948*9a0e4156SSadaf Ebrahimi 1U, // SQRSHRNv2i32_shift 3949*9a0e4156SSadaf Ebrahimi 1U, // SQRSHRNv4i16_shift 3950*9a0e4156SSadaf Ebrahimi 65U, // SQRSHRNv4i32_shift 3951*9a0e4156SSadaf Ebrahimi 65U, // SQRSHRNv8i16_shift 3952*9a0e4156SSadaf Ebrahimi 1U, // SQRSHRNv8i8_shift 3953*9a0e4156SSadaf Ebrahimi 1U, // SQRSHRUNb 3954*9a0e4156SSadaf Ebrahimi 1U, // SQRSHRUNh 3955*9a0e4156SSadaf Ebrahimi 1U, // SQRSHRUNs 3956*9a0e4156SSadaf Ebrahimi 65U, // SQRSHRUNv16i8_shift 3957*9a0e4156SSadaf Ebrahimi 1U, // SQRSHRUNv2i32_shift 3958*9a0e4156SSadaf Ebrahimi 1U, // SQRSHRUNv4i16_shift 3959*9a0e4156SSadaf Ebrahimi 65U, // SQRSHRUNv4i32_shift 3960*9a0e4156SSadaf Ebrahimi 65U, // SQRSHRUNv8i16_shift 3961*9a0e4156SSadaf Ebrahimi 1U, // SQRSHRUNv8i8_shift 3962*9a0e4156SSadaf Ebrahimi 1U, // SQSHLUb 3963*9a0e4156SSadaf Ebrahimi 1U, // SQSHLUd 3964*9a0e4156SSadaf Ebrahimi 1U, // SQSHLUh 3965*9a0e4156SSadaf Ebrahimi 1U, // SQSHLUs 3966*9a0e4156SSadaf Ebrahimi 1U, // SQSHLUv16i8_shift 3967*9a0e4156SSadaf Ebrahimi 1U, // SQSHLUv2i32_shift 3968*9a0e4156SSadaf Ebrahimi 1U, // SQSHLUv2i64_shift 3969*9a0e4156SSadaf Ebrahimi 1U, // SQSHLUv4i16_shift 3970*9a0e4156SSadaf Ebrahimi 1U, // SQSHLUv4i32_shift 3971*9a0e4156SSadaf Ebrahimi 1U, // SQSHLUv8i16_shift 3972*9a0e4156SSadaf Ebrahimi 1U, // SQSHLUv8i8_shift 3973*9a0e4156SSadaf Ebrahimi 1U, // SQSHLb 3974*9a0e4156SSadaf Ebrahimi 1U, // SQSHLd 3975*9a0e4156SSadaf Ebrahimi 1U, // SQSHLh 3976*9a0e4156SSadaf Ebrahimi 1U, // SQSHLs 3977*9a0e4156SSadaf Ebrahimi 1033U, // SQSHLv16i8 3978*9a0e4156SSadaf Ebrahimi 1U, // SQSHLv16i8_shift 3979*9a0e4156SSadaf Ebrahimi 1U, // SQSHLv1i16 3980*9a0e4156SSadaf Ebrahimi 1U, // SQSHLv1i32 3981*9a0e4156SSadaf Ebrahimi 1U, // SQSHLv1i64 3982*9a0e4156SSadaf Ebrahimi 1U, // SQSHLv1i8 3983*9a0e4156SSadaf Ebrahimi 1289U, // SQSHLv2i32 3984*9a0e4156SSadaf Ebrahimi 1U, // SQSHLv2i32_shift 3985*9a0e4156SSadaf Ebrahimi 265U, // SQSHLv2i64 3986*9a0e4156SSadaf Ebrahimi 1U, // SQSHLv2i64_shift 3987*9a0e4156SSadaf Ebrahimi 1545U, // SQSHLv4i16 3988*9a0e4156SSadaf Ebrahimi 1U, // SQSHLv4i16_shift 3989*9a0e4156SSadaf Ebrahimi 521U, // SQSHLv4i32 3990*9a0e4156SSadaf Ebrahimi 1U, // SQSHLv4i32_shift 3991*9a0e4156SSadaf Ebrahimi 777U, // SQSHLv8i16 3992*9a0e4156SSadaf Ebrahimi 1U, // SQSHLv8i16_shift 3993*9a0e4156SSadaf Ebrahimi 1801U, // SQSHLv8i8 3994*9a0e4156SSadaf Ebrahimi 1U, // SQSHLv8i8_shift 3995*9a0e4156SSadaf Ebrahimi 1U, // SQSHRNb 3996*9a0e4156SSadaf Ebrahimi 1U, // SQSHRNh 3997*9a0e4156SSadaf Ebrahimi 1U, // SQSHRNs 3998*9a0e4156SSadaf Ebrahimi 65U, // SQSHRNv16i8_shift 3999*9a0e4156SSadaf Ebrahimi 1U, // SQSHRNv2i32_shift 4000*9a0e4156SSadaf Ebrahimi 1U, // SQSHRNv4i16_shift 4001*9a0e4156SSadaf Ebrahimi 65U, // SQSHRNv4i32_shift 4002*9a0e4156SSadaf Ebrahimi 65U, // SQSHRNv8i16_shift 4003*9a0e4156SSadaf Ebrahimi 1U, // SQSHRNv8i8_shift 4004*9a0e4156SSadaf Ebrahimi 1U, // SQSHRUNb 4005*9a0e4156SSadaf Ebrahimi 1U, // SQSHRUNh 4006*9a0e4156SSadaf Ebrahimi 1U, // SQSHRUNs 4007*9a0e4156SSadaf Ebrahimi 65U, // SQSHRUNv16i8_shift 4008*9a0e4156SSadaf Ebrahimi 1U, // SQSHRUNv2i32_shift 4009*9a0e4156SSadaf Ebrahimi 1U, // SQSHRUNv4i16_shift 4010*9a0e4156SSadaf Ebrahimi 65U, // SQSHRUNv4i32_shift 4011*9a0e4156SSadaf Ebrahimi 65U, // SQSHRUNv8i16_shift 4012*9a0e4156SSadaf Ebrahimi 1U, // SQSHRUNv8i8_shift 4013*9a0e4156SSadaf Ebrahimi 1033U, // SQSUBv16i8 4014*9a0e4156SSadaf Ebrahimi 1U, // SQSUBv1i16 4015*9a0e4156SSadaf Ebrahimi 1U, // SQSUBv1i32 4016*9a0e4156SSadaf Ebrahimi 1U, // SQSUBv1i64 4017*9a0e4156SSadaf Ebrahimi 1U, // SQSUBv1i8 4018*9a0e4156SSadaf Ebrahimi 1289U, // SQSUBv2i32 4019*9a0e4156SSadaf Ebrahimi 265U, // SQSUBv2i64 4020*9a0e4156SSadaf Ebrahimi 1545U, // SQSUBv4i16 4021*9a0e4156SSadaf Ebrahimi 521U, // SQSUBv4i32 4022*9a0e4156SSadaf Ebrahimi 777U, // SQSUBv8i16 4023*9a0e4156SSadaf Ebrahimi 1801U, // SQSUBv8i8 4024*9a0e4156SSadaf Ebrahimi 0U, // SQXTNv16i8 4025*9a0e4156SSadaf Ebrahimi 0U, // SQXTNv1i16 4026*9a0e4156SSadaf Ebrahimi 0U, // SQXTNv1i32 4027*9a0e4156SSadaf Ebrahimi 0U, // SQXTNv1i8 4028*9a0e4156SSadaf Ebrahimi 0U, // SQXTNv2i32 4029*9a0e4156SSadaf Ebrahimi 0U, // SQXTNv4i16 4030*9a0e4156SSadaf Ebrahimi 0U, // SQXTNv4i32 4031*9a0e4156SSadaf Ebrahimi 0U, // SQXTNv8i16 4032*9a0e4156SSadaf Ebrahimi 0U, // SQXTNv8i8 4033*9a0e4156SSadaf Ebrahimi 0U, // SQXTUNv16i8 4034*9a0e4156SSadaf Ebrahimi 0U, // SQXTUNv1i16 4035*9a0e4156SSadaf Ebrahimi 0U, // SQXTUNv1i32 4036*9a0e4156SSadaf Ebrahimi 0U, // SQXTUNv1i8 4037*9a0e4156SSadaf Ebrahimi 0U, // SQXTUNv2i32 4038*9a0e4156SSadaf Ebrahimi 0U, // SQXTUNv4i16 4039*9a0e4156SSadaf Ebrahimi 0U, // SQXTUNv4i32 4040*9a0e4156SSadaf Ebrahimi 0U, // SQXTUNv8i16 4041*9a0e4156SSadaf Ebrahimi 0U, // SQXTUNv8i8 4042*9a0e4156SSadaf Ebrahimi 1033U, // SRHADDv16i8 4043*9a0e4156SSadaf Ebrahimi 1289U, // SRHADDv2i32 4044*9a0e4156SSadaf Ebrahimi 1545U, // SRHADDv4i16 4045*9a0e4156SSadaf Ebrahimi 521U, // SRHADDv4i32 4046*9a0e4156SSadaf Ebrahimi 777U, // SRHADDv8i16 4047*9a0e4156SSadaf Ebrahimi 1801U, // SRHADDv8i8 4048*9a0e4156SSadaf Ebrahimi 65U, // SRId 4049*9a0e4156SSadaf Ebrahimi 65U, // SRIv16i8_shift 4050*9a0e4156SSadaf Ebrahimi 65U, // SRIv2i32_shift 4051*9a0e4156SSadaf Ebrahimi 65U, // SRIv2i64_shift 4052*9a0e4156SSadaf Ebrahimi 65U, // SRIv4i16_shift 4053*9a0e4156SSadaf Ebrahimi 65U, // SRIv4i32_shift 4054*9a0e4156SSadaf Ebrahimi 65U, // SRIv8i16_shift 4055*9a0e4156SSadaf Ebrahimi 65U, // SRIv8i8_shift 4056*9a0e4156SSadaf Ebrahimi 1033U, // SRSHLv16i8 4057*9a0e4156SSadaf Ebrahimi 1U, // SRSHLv1i64 4058*9a0e4156SSadaf Ebrahimi 1289U, // SRSHLv2i32 4059*9a0e4156SSadaf Ebrahimi 265U, // SRSHLv2i64 4060*9a0e4156SSadaf Ebrahimi 1545U, // SRSHLv4i16 4061*9a0e4156SSadaf Ebrahimi 521U, // SRSHLv4i32 4062*9a0e4156SSadaf Ebrahimi 777U, // SRSHLv8i16 4063*9a0e4156SSadaf Ebrahimi 1801U, // SRSHLv8i8 4064*9a0e4156SSadaf Ebrahimi 1U, // SRSHRd 4065*9a0e4156SSadaf Ebrahimi 1U, // SRSHRv16i8_shift 4066*9a0e4156SSadaf Ebrahimi 1U, // SRSHRv2i32_shift 4067*9a0e4156SSadaf Ebrahimi 1U, // SRSHRv2i64_shift 4068*9a0e4156SSadaf Ebrahimi 1U, // SRSHRv4i16_shift 4069*9a0e4156SSadaf Ebrahimi 1U, // SRSHRv4i32_shift 4070*9a0e4156SSadaf Ebrahimi 1U, // SRSHRv8i16_shift 4071*9a0e4156SSadaf Ebrahimi 1U, // SRSHRv8i8_shift 4072*9a0e4156SSadaf Ebrahimi 65U, // SRSRAd 4073*9a0e4156SSadaf Ebrahimi 65U, // SRSRAv16i8_shift 4074*9a0e4156SSadaf Ebrahimi 65U, // SRSRAv2i32_shift 4075*9a0e4156SSadaf Ebrahimi 65U, // SRSRAv2i64_shift 4076*9a0e4156SSadaf Ebrahimi 65U, // SRSRAv4i16_shift 4077*9a0e4156SSadaf Ebrahimi 65U, // SRSRAv4i32_shift 4078*9a0e4156SSadaf Ebrahimi 65U, // SRSRAv8i16_shift 4079*9a0e4156SSadaf Ebrahimi 65U, // SRSRAv8i8_shift 4080*9a0e4156SSadaf Ebrahimi 1U, // SSHLLv16i8_shift 4081*9a0e4156SSadaf Ebrahimi 1U, // SSHLLv2i32_shift 4082*9a0e4156SSadaf Ebrahimi 1U, // SSHLLv4i16_shift 4083*9a0e4156SSadaf Ebrahimi 1U, // SSHLLv4i32_shift 4084*9a0e4156SSadaf Ebrahimi 1U, // SSHLLv8i16_shift 4085*9a0e4156SSadaf Ebrahimi 1U, // SSHLLv8i8_shift 4086*9a0e4156SSadaf Ebrahimi 1033U, // SSHLv16i8 4087*9a0e4156SSadaf Ebrahimi 1U, // SSHLv1i64 4088*9a0e4156SSadaf Ebrahimi 1289U, // SSHLv2i32 4089*9a0e4156SSadaf Ebrahimi 265U, // SSHLv2i64 4090*9a0e4156SSadaf Ebrahimi 1545U, // SSHLv4i16 4091*9a0e4156SSadaf Ebrahimi 521U, // SSHLv4i32 4092*9a0e4156SSadaf Ebrahimi 777U, // SSHLv8i16 4093*9a0e4156SSadaf Ebrahimi 1801U, // SSHLv8i8 4094*9a0e4156SSadaf Ebrahimi 1U, // SSHRd 4095*9a0e4156SSadaf Ebrahimi 1U, // SSHRv16i8_shift 4096*9a0e4156SSadaf Ebrahimi 1U, // SSHRv2i32_shift 4097*9a0e4156SSadaf Ebrahimi 1U, // SSHRv2i64_shift 4098*9a0e4156SSadaf Ebrahimi 1U, // SSHRv4i16_shift 4099*9a0e4156SSadaf Ebrahimi 1U, // SSHRv4i32_shift 4100*9a0e4156SSadaf Ebrahimi 1U, // SSHRv8i16_shift 4101*9a0e4156SSadaf Ebrahimi 1U, // SSHRv8i8_shift 4102*9a0e4156SSadaf Ebrahimi 65U, // SSRAd 4103*9a0e4156SSadaf Ebrahimi 65U, // SSRAv16i8_shift 4104*9a0e4156SSadaf Ebrahimi 65U, // SSRAv2i32_shift 4105*9a0e4156SSadaf Ebrahimi 65U, // SSRAv2i64_shift 4106*9a0e4156SSadaf Ebrahimi 65U, // SSRAv4i16_shift 4107*9a0e4156SSadaf Ebrahimi 65U, // SSRAv4i32_shift 4108*9a0e4156SSadaf Ebrahimi 65U, // SSRAv8i16_shift 4109*9a0e4156SSadaf Ebrahimi 65U, // SSRAv8i8_shift 4110*9a0e4156SSadaf Ebrahimi 1033U, // SSUBLv16i8_v8i16 4111*9a0e4156SSadaf Ebrahimi 1289U, // SSUBLv2i32_v2i64 4112*9a0e4156SSadaf Ebrahimi 1545U, // SSUBLv4i16_v4i32 4113*9a0e4156SSadaf Ebrahimi 521U, // SSUBLv4i32_v2i64 4114*9a0e4156SSadaf Ebrahimi 777U, // SSUBLv8i16_v4i32 4115*9a0e4156SSadaf Ebrahimi 1801U, // SSUBLv8i8_v8i16 4116*9a0e4156SSadaf Ebrahimi 1033U, // SSUBWv16i8_v8i16 4117*9a0e4156SSadaf Ebrahimi 1289U, // SSUBWv2i32_v2i64 4118*9a0e4156SSadaf Ebrahimi 1545U, // SSUBWv4i16_v4i32 4119*9a0e4156SSadaf Ebrahimi 521U, // SSUBWv4i32_v2i64 4120*9a0e4156SSadaf Ebrahimi 777U, // SSUBWv8i16_v4i32 4121*9a0e4156SSadaf Ebrahimi 1801U, // SSUBWv8i8_v8i16 4122*9a0e4156SSadaf Ebrahimi 0U, // ST1Fourv16b 4123*9a0e4156SSadaf Ebrahimi 0U, // ST1Fourv16b_POST 4124*9a0e4156SSadaf Ebrahimi 0U, // ST1Fourv1d 4125*9a0e4156SSadaf Ebrahimi 0U, // ST1Fourv1d_POST 4126*9a0e4156SSadaf Ebrahimi 0U, // ST1Fourv2d 4127*9a0e4156SSadaf Ebrahimi 0U, // ST1Fourv2d_POST 4128*9a0e4156SSadaf Ebrahimi 0U, // ST1Fourv2s 4129*9a0e4156SSadaf Ebrahimi 0U, // ST1Fourv2s_POST 4130*9a0e4156SSadaf Ebrahimi 0U, // ST1Fourv4h 4131*9a0e4156SSadaf Ebrahimi 0U, // ST1Fourv4h_POST 4132*9a0e4156SSadaf Ebrahimi 0U, // ST1Fourv4s 4133*9a0e4156SSadaf Ebrahimi 0U, // ST1Fourv4s_POST 4134*9a0e4156SSadaf Ebrahimi 0U, // ST1Fourv8b 4135*9a0e4156SSadaf Ebrahimi 0U, // ST1Fourv8b_POST 4136*9a0e4156SSadaf Ebrahimi 0U, // ST1Fourv8h 4137*9a0e4156SSadaf Ebrahimi 0U, // ST1Fourv8h_POST 4138*9a0e4156SSadaf Ebrahimi 0U, // ST1Onev16b 4139*9a0e4156SSadaf Ebrahimi 0U, // ST1Onev16b_POST 4140*9a0e4156SSadaf Ebrahimi 0U, // ST1Onev1d 4141*9a0e4156SSadaf Ebrahimi 0U, // ST1Onev1d_POST 4142*9a0e4156SSadaf Ebrahimi 0U, // ST1Onev2d 4143*9a0e4156SSadaf Ebrahimi 0U, // ST1Onev2d_POST 4144*9a0e4156SSadaf Ebrahimi 0U, // ST1Onev2s 4145*9a0e4156SSadaf Ebrahimi 0U, // ST1Onev2s_POST 4146*9a0e4156SSadaf Ebrahimi 0U, // ST1Onev4h 4147*9a0e4156SSadaf Ebrahimi 0U, // ST1Onev4h_POST 4148*9a0e4156SSadaf Ebrahimi 0U, // ST1Onev4s 4149*9a0e4156SSadaf Ebrahimi 0U, // ST1Onev4s_POST 4150*9a0e4156SSadaf Ebrahimi 0U, // ST1Onev8b 4151*9a0e4156SSadaf Ebrahimi 0U, // ST1Onev8b_POST 4152*9a0e4156SSadaf Ebrahimi 0U, // ST1Onev8h 4153*9a0e4156SSadaf Ebrahimi 0U, // ST1Onev8h_POST 4154*9a0e4156SSadaf Ebrahimi 0U, // ST1Threev16b 4155*9a0e4156SSadaf Ebrahimi 0U, // ST1Threev16b_POST 4156*9a0e4156SSadaf Ebrahimi 0U, // ST1Threev1d 4157*9a0e4156SSadaf Ebrahimi 0U, // ST1Threev1d_POST 4158*9a0e4156SSadaf Ebrahimi 0U, // ST1Threev2d 4159*9a0e4156SSadaf Ebrahimi 0U, // ST1Threev2d_POST 4160*9a0e4156SSadaf Ebrahimi 0U, // ST1Threev2s 4161*9a0e4156SSadaf Ebrahimi 0U, // ST1Threev2s_POST 4162*9a0e4156SSadaf Ebrahimi 0U, // ST1Threev4h 4163*9a0e4156SSadaf Ebrahimi 0U, // ST1Threev4h_POST 4164*9a0e4156SSadaf Ebrahimi 0U, // ST1Threev4s 4165*9a0e4156SSadaf Ebrahimi 0U, // ST1Threev4s_POST 4166*9a0e4156SSadaf Ebrahimi 0U, // ST1Threev8b 4167*9a0e4156SSadaf Ebrahimi 0U, // ST1Threev8b_POST 4168*9a0e4156SSadaf Ebrahimi 0U, // ST1Threev8h 4169*9a0e4156SSadaf Ebrahimi 0U, // ST1Threev8h_POST 4170*9a0e4156SSadaf Ebrahimi 0U, // ST1Twov16b 4171*9a0e4156SSadaf Ebrahimi 0U, // ST1Twov16b_POST 4172*9a0e4156SSadaf Ebrahimi 0U, // ST1Twov1d 4173*9a0e4156SSadaf Ebrahimi 0U, // ST1Twov1d_POST 4174*9a0e4156SSadaf Ebrahimi 0U, // ST1Twov2d 4175*9a0e4156SSadaf Ebrahimi 0U, // ST1Twov2d_POST 4176*9a0e4156SSadaf Ebrahimi 0U, // ST1Twov2s 4177*9a0e4156SSadaf Ebrahimi 0U, // ST1Twov2s_POST 4178*9a0e4156SSadaf Ebrahimi 0U, // ST1Twov4h 4179*9a0e4156SSadaf Ebrahimi 0U, // ST1Twov4h_POST 4180*9a0e4156SSadaf Ebrahimi 0U, // ST1Twov4s 4181*9a0e4156SSadaf Ebrahimi 0U, // ST1Twov4s_POST 4182*9a0e4156SSadaf Ebrahimi 0U, // ST1Twov8b 4183*9a0e4156SSadaf Ebrahimi 0U, // ST1Twov8b_POST 4184*9a0e4156SSadaf Ebrahimi 0U, // ST1Twov8h 4185*9a0e4156SSadaf Ebrahimi 0U, // ST1Twov8h_POST 4186*9a0e4156SSadaf Ebrahimi 0U, // ST1i16 4187*9a0e4156SSadaf Ebrahimi 0U, // ST1i16_POST 4188*9a0e4156SSadaf Ebrahimi 0U, // ST1i32 4189*9a0e4156SSadaf Ebrahimi 0U, // ST1i32_POST 4190*9a0e4156SSadaf Ebrahimi 0U, // ST1i64 4191*9a0e4156SSadaf Ebrahimi 0U, // ST1i64_POST 4192*9a0e4156SSadaf Ebrahimi 0U, // ST1i8 4193*9a0e4156SSadaf Ebrahimi 0U, // ST1i8_POST 4194*9a0e4156SSadaf Ebrahimi 0U, // ST2Twov16b 4195*9a0e4156SSadaf Ebrahimi 0U, // ST2Twov16b_POST 4196*9a0e4156SSadaf Ebrahimi 0U, // ST2Twov2d 4197*9a0e4156SSadaf Ebrahimi 0U, // ST2Twov2d_POST 4198*9a0e4156SSadaf Ebrahimi 0U, // ST2Twov2s 4199*9a0e4156SSadaf Ebrahimi 0U, // ST2Twov2s_POST 4200*9a0e4156SSadaf Ebrahimi 0U, // ST2Twov4h 4201*9a0e4156SSadaf Ebrahimi 0U, // ST2Twov4h_POST 4202*9a0e4156SSadaf Ebrahimi 0U, // ST2Twov4s 4203*9a0e4156SSadaf Ebrahimi 0U, // ST2Twov4s_POST 4204*9a0e4156SSadaf Ebrahimi 0U, // ST2Twov8b 4205*9a0e4156SSadaf Ebrahimi 0U, // ST2Twov8b_POST 4206*9a0e4156SSadaf Ebrahimi 0U, // ST2Twov8h 4207*9a0e4156SSadaf Ebrahimi 0U, // ST2Twov8h_POST 4208*9a0e4156SSadaf Ebrahimi 0U, // ST2i16 4209*9a0e4156SSadaf Ebrahimi 0U, // ST2i16_POST 4210*9a0e4156SSadaf Ebrahimi 0U, // ST2i32 4211*9a0e4156SSadaf Ebrahimi 0U, // ST2i32_POST 4212*9a0e4156SSadaf Ebrahimi 0U, // ST2i64 4213*9a0e4156SSadaf Ebrahimi 0U, // ST2i64_POST 4214*9a0e4156SSadaf Ebrahimi 0U, // ST2i8 4215*9a0e4156SSadaf Ebrahimi 0U, // ST2i8_POST 4216*9a0e4156SSadaf Ebrahimi 0U, // ST3Threev16b 4217*9a0e4156SSadaf Ebrahimi 0U, // ST3Threev16b_POST 4218*9a0e4156SSadaf Ebrahimi 0U, // ST3Threev2d 4219*9a0e4156SSadaf Ebrahimi 0U, // ST3Threev2d_POST 4220*9a0e4156SSadaf Ebrahimi 0U, // ST3Threev2s 4221*9a0e4156SSadaf Ebrahimi 0U, // ST3Threev2s_POST 4222*9a0e4156SSadaf Ebrahimi 0U, // ST3Threev4h 4223*9a0e4156SSadaf Ebrahimi 0U, // ST3Threev4h_POST 4224*9a0e4156SSadaf Ebrahimi 0U, // ST3Threev4s 4225*9a0e4156SSadaf Ebrahimi 0U, // ST3Threev4s_POST 4226*9a0e4156SSadaf Ebrahimi 0U, // ST3Threev8b 4227*9a0e4156SSadaf Ebrahimi 0U, // ST3Threev8b_POST 4228*9a0e4156SSadaf Ebrahimi 0U, // ST3Threev8h 4229*9a0e4156SSadaf Ebrahimi 0U, // ST3Threev8h_POST 4230*9a0e4156SSadaf Ebrahimi 0U, // ST3i16 4231*9a0e4156SSadaf Ebrahimi 0U, // ST3i16_POST 4232*9a0e4156SSadaf Ebrahimi 0U, // ST3i32 4233*9a0e4156SSadaf Ebrahimi 0U, // ST3i32_POST 4234*9a0e4156SSadaf Ebrahimi 0U, // ST3i64 4235*9a0e4156SSadaf Ebrahimi 0U, // ST3i64_POST 4236*9a0e4156SSadaf Ebrahimi 0U, // ST3i8 4237*9a0e4156SSadaf Ebrahimi 0U, // ST3i8_POST 4238*9a0e4156SSadaf Ebrahimi 0U, // ST4Fourv16b 4239*9a0e4156SSadaf Ebrahimi 0U, // ST4Fourv16b_POST 4240*9a0e4156SSadaf Ebrahimi 0U, // ST4Fourv2d 4241*9a0e4156SSadaf Ebrahimi 0U, // ST4Fourv2d_POST 4242*9a0e4156SSadaf Ebrahimi 0U, // ST4Fourv2s 4243*9a0e4156SSadaf Ebrahimi 0U, // ST4Fourv2s_POST 4244*9a0e4156SSadaf Ebrahimi 0U, // ST4Fourv4h 4245*9a0e4156SSadaf Ebrahimi 0U, // ST4Fourv4h_POST 4246*9a0e4156SSadaf Ebrahimi 0U, // ST4Fourv4s 4247*9a0e4156SSadaf Ebrahimi 0U, // ST4Fourv4s_POST 4248*9a0e4156SSadaf Ebrahimi 0U, // ST4Fourv8b 4249*9a0e4156SSadaf Ebrahimi 0U, // ST4Fourv8b_POST 4250*9a0e4156SSadaf Ebrahimi 0U, // ST4Fourv8h 4251*9a0e4156SSadaf Ebrahimi 0U, // ST4Fourv8h_POST 4252*9a0e4156SSadaf Ebrahimi 0U, // ST4i16 4253*9a0e4156SSadaf Ebrahimi 0U, // ST4i16_POST 4254*9a0e4156SSadaf Ebrahimi 0U, // ST4i32 4255*9a0e4156SSadaf Ebrahimi 0U, // ST4i32_POST 4256*9a0e4156SSadaf Ebrahimi 0U, // ST4i64 4257*9a0e4156SSadaf Ebrahimi 0U, // ST4i64_POST 4258*9a0e4156SSadaf Ebrahimi 0U, // ST4i8 4259*9a0e4156SSadaf Ebrahimi 0U, // ST4i8_POST 4260*9a0e4156SSadaf Ebrahimi 4U, // STLRB 4261*9a0e4156SSadaf Ebrahimi 4U, // STLRH 4262*9a0e4156SSadaf Ebrahimi 4U, // STLRW 4263*9a0e4156SSadaf Ebrahimi 4U, // STLRX 4264*9a0e4156SSadaf Ebrahimi 4609U, // STLXPW 4265*9a0e4156SSadaf Ebrahimi 4609U, // STLXPX 4266*9a0e4156SSadaf Ebrahimi 3588U, // STLXRB 4267*9a0e4156SSadaf Ebrahimi 3588U, // STLXRH 4268*9a0e4156SSadaf Ebrahimi 3588U, // STLXRW 4269*9a0e4156SSadaf Ebrahimi 3588U, // STLXRX 4270*9a0e4156SSadaf Ebrahimi 43268U, // STNPDi 4271*9a0e4156SSadaf Ebrahimi 51460U, // STNPQi 4272*9a0e4156SSadaf Ebrahimi 59652U, // STNPSi 4273*9a0e4156SSadaf Ebrahimi 59652U, // STNPWi 4274*9a0e4156SSadaf Ebrahimi 43268U, // STNPXi 4275*9a0e4156SSadaf Ebrahimi 43268U, // STPDi 4276*9a0e4156SSadaf Ebrahimi 69444U, // STPDpost 4277*9a0e4156SSadaf Ebrahimi 330052U, // STPDpre 4278*9a0e4156SSadaf Ebrahimi 51460U, // STPQi 4279*9a0e4156SSadaf Ebrahimi 77636U, // STPQpost 4280*9a0e4156SSadaf Ebrahimi 338244U, // STPQpre 4281*9a0e4156SSadaf Ebrahimi 59652U, // STPSi 4282*9a0e4156SSadaf Ebrahimi 85828U, // STPSpost 4283*9a0e4156SSadaf Ebrahimi 346436U, // STPSpre 4284*9a0e4156SSadaf Ebrahimi 59652U, // STPWi 4285*9a0e4156SSadaf Ebrahimi 85828U, // STPWpost 4286*9a0e4156SSadaf Ebrahimi 346436U, // STPWpre 4287*9a0e4156SSadaf Ebrahimi 43268U, // STPXi 4288*9a0e4156SSadaf Ebrahimi 69444U, // STPXpost 4289*9a0e4156SSadaf Ebrahimi 330052U, // STPXpre 4290*9a0e4156SSadaf Ebrahimi 4U, // STRBBpost 4291*9a0e4156SSadaf Ebrahimi 4161U, // STRBBpre 4292*9a0e4156SSadaf Ebrahimi 92417U, // STRBBroW 4293*9a0e4156SSadaf Ebrahimi 100609U, // STRBBroX 4294*9a0e4156SSadaf Ebrahimi 89U, // STRBBui 4295*9a0e4156SSadaf Ebrahimi 4U, // STRBpost 4296*9a0e4156SSadaf Ebrahimi 4161U, // STRBpre 4297*9a0e4156SSadaf Ebrahimi 92417U, // STRBroW 4298*9a0e4156SSadaf Ebrahimi 100609U, // STRBroX 4299*9a0e4156SSadaf Ebrahimi 89U, // STRBui 4300*9a0e4156SSadaf Ebrahimi 4U, // STRDpost 4301*9a0e4156SSadaf Ebrahimi 4161U, // STRDpre 4302*9a0e4156SSadaf Ebrahimi 108801U, // STRDroW 4303*9a0e4156SSadaf Ebrahimi 116993U, // STRDroX 4304*9a0e4156SSadaf Ebrahimi 97U, // STRDui 4305*9a0e4156SSadaf Ebrahimi 4U, // STRHHpost 4306*9a0e4156SSadaf Ebrahimi 4161U, // STRHHpre 4307*9a0e4156SSadaf Ebrahimi 125185U, // STRHHroW 4308*9a0e4156SSadaf Ebrahimi 133377U, // STRHHroX 4309*9a0e4156SSadaf Ebrahimi 105U, // STRHHui 4310*9a0e4156SSadaf Ebrahimi 4U, // STRHpost 4311*9a0e4156SSadaf Ebrahimi 4161U, // STRHpre 4312*9a0e4156SSadaf Ebrahimi 125185U, // STRHroW 4313*9a0e4156SSadaf Ebrahimi 133377U, // STRHroX 4314*9a0e4156SSadaf Ebrahimi 105U, // STRHui 4315*9a0e4156SSadaf Ebrahimi 4U, // STRQpost 4316*9a0e4156SSadaf Ebrahimi 4161U, // STRQpre 4317*9a0e4156SSadaf Ebrahimi 141569U, // STRQroW 4318*9a0e4156SSadaf Ebrahimi 149761U, // STRQroX 4319*9a0e4156SSadaf Ebrahimi 113U, // STRQui 4320*9a0e4156SSadaf Ebrahimi 4U, // STRSpost 4321*9a0e4156SSadaf Ebrahimi 4161U, // STRSpre 4322*9a0e4156SSadaf Ebrahimi 157953U, // STRSroW 4323*9a0e4156SSadaf Ebrahimi 166145U, // STRSroX 4324*9a0e4156SSadaf Ebrahimi 121U, // STRSui 4325*9a0e4156SSadaf Ebrahimi 4U, // STRWpost 4326*9a0e4156SSadaf Ebrahimi 4161U, // STRWpre 4327*9a0e4156SSadaf Ebrahimi 157953U, // STRWroW 4328*9a0e4156SSadaf Ebrahimi 166145U, // STRWroX 4329*9a0e4156SSadaf Ebrahimi 121U, // STRWui 4330*9a0e4156SSadaf Ebrahimi 4U, // STRXpost 4331*9a0e4156SSadaf Ebrahimi 4161U, // STRXpre 4332*9a0e4156SSadaf Ebrahimi 108801U, // STRXroW 4333*9a0e4156SSadaf Ebrahimi 116993U, // STRXroX 4334*9a0e4156SSadaf Ebrahimi 97U, // STRXui 4335*9a0e4156SSadaf Ebrahimi 3585U, // STTRBi 4336*9a0e4156SSadaf Ebrahimi 3585U, // STTRHi 4337*9a0e4156SSadaf Ebrahimi 3585U, // STTRWi 4338*9a0e4156SSadaf Ebrahimi 3585U, // STTRXi 4339*9a0e4156SSadaf Ebrahimi 3585U, // STURBBi 4340*9a0e4156SSadaf Ebrahimi 3585U, // STURBi 4341*9a0e4156SSadaf Ebrahimi 3585U, // STURDi 4342*9a0e4156SSadaf Ebrahimi 3585U, // STURHHi 4343*9a0e4156SSadaf Ebrahimi 3585U, // STURHi 4344*9a0e4156SSadaf Ebrahimi 3585U, // STURQi 4345*9a0e4156SSadaf Ebrahimi 3585U, // STURSi 4346*9a0e4156SSadaf Ebrahimi 3585U, // STURWi 4347*9a0e4156SSadaf Ebrahimi 3585U, // STURXi 4348*9a0e4156SSadaf Ebrahimi 4609U, // STXPW 4349*9a0e4156SSadaf Ebrahimi 4609U, // STXPX 4350*9a0e4156SSadaf Ebrahimi 3588U, // STXRB 4351*9a0e4156SSadaf Ebrahimi 3588U, // STXRH 4352*9a0e4156SSadaf Ebrahimi 3588U, // STXRW 4353*9a0e4156SSadaf Ebrahimi 3588U, // STXRX 4354*9a0e4156SSadaf Ebrahimi 265U, // SUBHNv2i64_v2i32 4355*9a0e4156SSadaf Ebrahimi 273U, // SUBHNv2i64_v4i32 4356*9a0e4156SSadaf Ebrahimi 521U, // SUBHNv4i32_v4i16 4357*9a0e4156SSadaf Ebrahimi 529U, // SUBHNv4i32_v8i16 4358*9a0e4156SSadaf Ebrahimi 785U, // SUBHNv8i16_v16i8 4359*9a0e4156SSadaf Ebrahimi 777U, // SUBHNv8i16_v8i8 4360*9a0e4156SSadaf Ebrahimi 25U, // SUBSWri 4361*9a0e4156SSadaf Ebrahimi 0U, // SUBSWrr 4362*9a0e4156SSadaf Ebrahimi 33U, // SUBSWrs 4363*9a0e4156SSadaf Ebrahimi 41U, // SUBSWrx 4364*9a0e4156SSadaf Ebrahimi 25U, // SUBSXri 4365*9a0e4156SSadaf Ebrahimi 0U, // SUBSXrr 4366*9a0e4156SSadaf Ebrahimi 33U, // SUBSXrs 4367*9a0e4156SSadaf Ebrahimi 41U, // SUBSXrx 4368*9a0e4156SSadaf Ebrahimi 2049U, // SUBSXrx64 4369*9a0e4156SSadaf Ebrahimi 25U, // SUBWri 4370*9a0e4156SSadaf Ebrahimi 0U, // SUBWrr 4371*9a0e4156SSadaf Ebrahimi 33U, // SUBWrs 4372*9a0e4156SSadaf Ebrahimi 41U, // SUBWrx 4373*9a0e4156SSadaf Ebrahimi 25U, // SUBXri 4374*9a0e4156SSadaf Ebrahimi 0U, // SUBXrr 4375*9a0e4156SSadaf Ebrahimi 33U, // SUBXrs 4376*9a0e4156SSadaf Ebrahimi 41U, // SUBXrx 4377*9a0e4156SSadaf Ebrahimi 2049U, // SUBXrx64 4378*9a0e4156SSadaf Ebrahimi 1033U, // SUBv16i8 4379*9a0e4156SSadaf Ebrahimi 1U, // SUBv1i64 4380*9a0e4156SSadaf Ebrahimi 1289U, // SUBv2i32 4381*9a0e4156SSadaf Ebrahimi 265U, // SUBv2i64 4382*9a0e4156SSadaf Ebrahimi 1545U, // SUBv4i16 4383*9a0e4156SSadaf Ebrahimi 521U, // SUBv4i32 4384*9a0e4156SSadaf Ebrahimi 777U, // SUBv8i16 4385*9a0e4156SSadaf Ebrahimi 1801U, // SUBv8i8 4386*9a0e4156SSadaf Ebrahimi 0U, // SUQADDv16i8 4387*9a0e4156SSadaf Ebrahimi 0U, // SUQADDv1i16 4388*9a0e4156SSadaf Ebrahimi 0U, // SUQADDv1i32 4389*9a0e4156SSadaf Ebrahimi 0U, // SUQADDv1i64 4390*9a0e4156SSadaf Ebrahimi 0U, // SUQADDv1i8 4391*9a0e4156SSadaf Ebrahimi 0U, // SUQADDv2i32 4392*9a0e4156SSadaf Ebrahimi 0U, // SUQADDv2i64 4393*9a0e4156SSadaf Ebrahimi 0U, // SUQADDv4i16 4394*9a0e4156SSadaf Ebrahimi 0U, // SUQADDv4i32 4395*9a0e4156SSadaf Ebrahimi 0U, // SUQADDv8i16 4396*9a0e4156SSadaf Ebrahimi 0U, // SUQADDv8i8 4397*9a0e4156SSadaf Ebrahimi 0U, // SVC 4398*9a0e4156SSadaf Ebrahimi 129U, // SYSLxt 4399*9a0e4156SSadaf Ebrahimi 0U, // SYSxt 4400*9a0e4156SSadaf Ebrahimi 0U, // TBLv16i8Four 4401*9a0e4156SSadaf Ebrahimi 0U, // TBLv16i8One 4402*9a0e4156SSadaf Ebrahimi 0U, // TBLv16i8Three 4403*9a0e4156SSadaf Ebrahimi 0U, // TBLv16i8Two 4404*9a0e4156SSadaf Ebrahimi 0U, // TBLv8i8Four 4405*9a0e4156SSadaf Ebrahimi 0U, // TBLv8i8One 4406*9a0e4156SSadaf Ebrahimi 0U, // TBLv8i8Three 4407*9a0e4156SSadaf Ebrahimi 0U, // TBLv8i8Two 4408*9a0e4156SSadaf Ebrahimi 137U, // TBNZW 4409*9a0e4156SSadaf Ebrahimi 137U, // TBNZX 4410*9a0e4156SSadaf Ebrahimi 0U, // TBXv16i8Four 4411*9a0e4156SSadaf Ebrahimi 0U, // TBXv16i8One 4412*9a0e4156SSadaf Ebrahimi 0U, // TBXv16i8Three 4413*9a0e4156SSadaf Ebrahimi 0U, // TBXv16i8Two 4414*9a0e4156SSadaf Ebrahimi 0U, // TBXv8i8Four 4415*9a0e4156SSadaf Ebrahimi 0U, // TBXv8i8One 4416*9a0e4156SSadaf Ebrahimi 0U, // TBXv8i8Three 4417*9a0e4156SSadaf Ebrahimi 0U, // TBXv8i8Two 4418*9a0e4156SSadaf Ebrahimi 137U, // TBZW 4419*9a0e4156SSadaf Ebrahimi 137U, // TBZX 4420*9a0e4156SSadaf Ebrahimi 0U, // TCRETURNdi 4421*9a0e4156SSadaf Ebrahimi 0U, // TCRETURNri 4422*9a0e4156SSadaf Ebrahimi 0U, // TLSDESCCALL 4423*9a0e4156SSadaf Ebrahimi 0U, // TLSDESC_BLR 4424*9a0e4156SSadaf Ebrahimi 1033U, // TRN1v16i8 4425*9a0e4156SSadaf Ebrahimi 1289U, // TRN1v2i32 4426*9a0e4156SSadaf Ebrahimi 265U, // TRN1v2i64 4427*9a0e4156SSadaf Ebrahimi 1545U, // TRN1v4i16 4428*9a0e4156SSadaf Ebrahimi 521U, // TRN1v4i32 4429*9a0e4156SSadaf Ebrahimi 777U, // TRN1v8i16 4430*9a0e4156SSadaf Ebrahimi 1801U, // TRN1v8i8 4431*9a0e4156SSadaf Ebrahimi 1033U, // TRN2v16i8 4432*9a0e4156SSadaf Ebrahimi 1289U, // TRN2v2i32 4433*9a0e4156SSadaf Ebrahimi 265U, // TRN2v2i64 4434*9a0e4156SSadaf Ebrahimi 1545U, // TRN2v4i16 4435*9a0e4156SSadaf Ebrahimi 521U, // TRN2v4i32 4436*9a0e4156SSadaf Ebrahimi 777U, // TRN2v8i16 4437*9a0e4156SSadaf Ebrahimi 1801U, // TRN2v8i8 4438*9a0e4156SSadaf Ebrahimi 1041U, // UABALv16i8_v8i16 4439*9a0e4156SSadaf Ebrahimi 1297U, // UABALv2i32_v2i64 4440*9a0e4156SSadaf Ebrahimi 1553U, // UABALv4i16_v4i32 4441*9a0e4156SSadaf Ebrahimi 529U, // UABALv4i32_v2i64 4442*9a0e4156SSadaf Ebrahimi 785U, // UABALv8i16_v4i32 4443*9a0e4156SSadaf Ebrahimi 1809U, // UABALv8i8_v8i16 4444*9a0e4156SSadaf Ebrahimi 1041U, // UABAv16i8 4445*9a0e4156SSadaf Ebrahimi 1297U, // UABAv2i32 4446*9a0e4156SSadaf Ebrahimi 1553U, // UABAv4i16 4447*9a0e4156SSadaf Ebrahimi 529U, // UABAv4i32 4448*9a0e4156SSadaf Ebrahimi 785U, // UABAv8i16 4449*9a0e4156SSadaf Ebrahimi 1809U, // UABAv8i8 4450*9a0e4156SSadaf Ebrahimi 1033U, // UABDLv16i8_v8i16 4451*9a0e4156SSadaf Ebrahimi 1289U, // UABDLv2i32_v2i64 4452*9a0e4156SSadaf Ebrahimi 1545U, // UABDLv4i16_v4i32 4453*9a0e4156SSadaf Ebrahimi 521U, // UABDLv4i32_v2i64 4454*9a0e4156SSadaf Ebrahimi 777U, // UABDLv8i16_v4i32 4455*9a0e4156SSadaf Ebrahimi 1801U, // UABDLv8i8_v8i16 4456*9a0e4156SSadaf Ebrahimi 1033U, // UABDv16i8 4457*9a0e4156SSadaf Ebrahimi 1289U, // UABDv2i32 4458*9a0e4156SSadaf Ebrahimi 1545U, // UABDv4i16 4459*9a0e4156SSadaf Ebrahimi 521U, // UABDv4i32 4460*9a0e4156SSadaf Ebrahimi 777U, // UABDv8i16 4461*9a0e4156SSadaf Ebrahimi 1801U, // UABDv8i8 4462*9a0e4156SSadaf Ebrahimi 0U, // UADALPv16i8_v8i16 4463*9a0e4156SSadaf Ebrahimi 0U, // UADALPv2i32_v1i64 4464*9a0e4156SSadaf Ebrahimi 0U, // UADALPv4i16_v2i32 4465*9a0e4156SSadaf Ebrahimi 0U, // UADALPv4i32_v2i64 4466*9a0e4156SSadaf Ebrahimi 0U, // UADALPv8i16_v4i32 4467*9a0e4156SSadaf Ebrahimi 0U, // UADALPv8i8_v4i16 4468*9a0e4156SSadaf Ebrahimi 0U, // UADDLPv16i8_v8i16 4469*9a0e4156SSadaf Ebrahimi 0U, // UADDLPv2i32_v1i64 4470*9a0e4156SSadaf Ebrahimi 0U, // UADDLPv4i16_v2i32 4471*9a0e4156SSadaf Ebrahimi 0U, // UADDLPv4i32_v2i64 4472*9a0e4156SSadaf Ebrahimi 0U, // UADDLPv8i16_v4i32 4473*9a0e4156SSadaf Ebrahimi 0U, // UADDLPv8i8_v4i16 4474*9a0e4156SSadaf Ebrahimi 0U, // UADDLVv16i8v 4475*9a0e4156SSadaf Ebrahimi 0U, // UADDLVv4i16v 4476*9a0e4156SSadaf Ebrahimi 0U, // UADDLVv4i32v 4477*9a0e4156SSadaf Ebrahimi 0U, // UADDLVv8i16v 4478*9a0e4156SSadaf Ebrahimi 0U, // UADDLVv8i8v 4479*9a0e4156SSadaf Ebrahimi 1033U, // UADDLv16i8_v8i16 4480*9a0e4156SSadaf Ebrahimi 1289U, // UADDLv2i32_v2i64 4481*9a0e4156SSadaf Ebrahimi 1545U, // UADDLv4i16_v4i32 4482*9a0e4156SSadaf Ebrahimi 521U, // UADDLv4i32_v2i64 4483*9a0e4156SSadaf Ebrahimi 777U, // UADDLv8i16_v4i32 4484*9a0e4156SSadaf Ebrahimi 1801U, // UADDLv8i8_v8i16 4485*9a0e4156SSadaf Ebrahimi 1033U, // UADDWv16i8_v8i16 4486*9a0e4156SSadaf Ebrahimi 1289U, // UADDWv2i32_v2i64 4487*9a0e4156SSadaf Ebrahimi 1545U, // UADDWv4i16_v4i32 4488*9a0e4156SSadaf Ebrahimi 521U, // UADDWv4i32_v2i64 4489*9a0e4156SSadaf Ebrahimi 777U, // UADDWv8i16_v4i32 4490*9a0e4156SSadaf Ebrahimi 1801U, // UADDWv8i8_v8i16 4491*9a0e4156SSadaf Ebrahimi 18689U, // UBFMWri 4492*9a0e4156SSadaf Ebrahimi 18689U, // UBFMXri 4493*9a0e4156SSadaf Ebrahimi 1U, // UCVTFSWDri 4494*9a0e4156SSadaf Ebrahimi 1U, // UCVTFSWSri 4495*9a0e4156SSadaf Ebrahimi 1U, // UCVTFSXDri 4496*9a0e4156SSadaf Ebrahimi 1U, // UCVTFSXSri 4497*9a0e4156SSadaf Ebrahimi 0U, // UCVTFUWDri 4498*9a0e4156SSadaf Ebrahimi 0U, // UCVTFUWSri 4499*9a0e4156SSadaf Ebrahimi 0U, // UCVTFUXDri 4500*9a0e4156SSadaf Ebrahimi 0U, // UCVTFUXSri 4501*9a0e4156SSadaf Ebrahimi 1U, // UCVTFd 4502*9a0e4156SSadaf Ebrahimi 1U, // UCVTFs 4503*9a0e4156SSadaf Ebrahimi 0U, // UCVTFv1i32 4504*9a0e4156SSadaf Ebrahimi 0U, // UCVTFv1i64 4505*9a0e4156SSadaf Ebrahimi 0U, // UCVTFv2f32 4506*9a0e4156SSadaf Ebrahimi 0U, // UCVTFv2f64 4507*9a0e4156SSadaf Ebrahimi 1U, // UCVTFv2i32_shift 4508*9a0e4156SSadaf Ebrahimi 1U, // UCVTFv2i64_shift 4509*9a0e4156SSadaf Ebrahimi 0U, // UCVTFv4f32 4510*9a0e4156SSadaf Ebrahimi 1U, // UCVTFv4i32_shift 4511*9a0e4156SSadaf Ebrahimi 1U, // UDIVWr 4512*9a0e4156SSadaf Ebrahimi 1U, // UDIVXr 4513*9a0e4156SSadaf Ebrahimi 1U, // UDIV_IntWr 4514*9a0e4156SSadaf Ebrahimi 1U, // UDIV_IntXr 4515*9a0e4156SSadaf Ebrahimi 1033U, // UHADDv16i8 4516*9a0e4156SSadaf Ebrahimi 1289U, // UHADDv2i32 4517*9a0e4156SSadaf Ebrahimi 1545U, // UHADDv4i16 4518*9a0e4156SSadaf Ebrahimi 521U, // UHADDv4i32 4519*9a0e4156SSadaf Ebrahimi 777U, // UHADDv8i16 4520*9a0e4156SSadaf Ebrahimi 1801U, // UHADDv8i8 4521*9a0e4156SSadaf Ebrahimi 1033U, // UHSUBv16i8 4522*9a0e4156SSadaf Ebrahimi 1289U, // UHSUBv2i32 4523*9a0e4156SSadaf Ebrahimi 1545U, // UHSUBv4i16 4524*9a0e4156SSadaf Ebrahimi 521U, // UHSUBv4i32 4525*9a0e4156SSadaf Ebrahimi 777U, // UHSUBv8i16 4526*9a0e4156SSadaf Ebrahimi 1801U, // UHSUBv8i8 4527*9a0e4156SSadaf Ebrahimi 18689U, // UMADDLrrr 4528*9a0e4156SSadaf Ebrahimi 1033U, // UMAXPv16i8 4529*9a0e4156SSadaf Ebrahimi 1289U, // UMAXPv2i32 4530*9a0e4156SSadaf Ebrahimi 1545U, // UMAXPv4i16 4531*9a0e4156SSadaf Ebrahimi 521U, // UMAXPv4i32 4532*9a0e4156SSadaf Ebrahimi 777U, // UMAXPv8i16 4533*9a0e4156SSadaf Ebrahimi 1801U, // UMAXPv8i8 4534*9a0e4156SSadaf Ebrahimi 0U, // UMAXVv16i8v 4535*9a0e4156SSadaf Ebrahimi 0U, // UMAXVv4i16v 4536*9a0e4156SSadaf Ebrahimi 0U, // UMAXVv4i32v 4537*9a0e4156SSadaf Ebrahimi 0U, // UMAXVv8i16v 4538*9a0e4156SSadaf Ebrahimi 0U, // UMAXVv8i8v 4539*9a0e4156SSadaf Ebrahimi 1033U, // UMAXv16i8 4540*9a0e4156SSadaf Ebrahimi 1289U, // UMAXv2i32 4541*9a0e4156SSadaf Ebrahimi 1545U, // UMAXv4i16 4542*9a0e4156SSadaf Ebrahimi 521U, // UMAXv4i32 4543*9a0e4156SSadaf Ebrahimi 777U, // UMAXv8i16 4544*9a0e4156SSadaf Ebrahimi 1801U, // UMAXv8i8 4545*9a0e4156SSadaf Ebrahimi 1033U, // UMINPv16i8 4546*9a0e4156SSadaf Ebrahimi 1289U, // UMINPv2i32 4547*9a0e4156SSadaf Ebrahimi 1545U, // UMINPv4i16 4548*9a0e4156SSadaf Ebrahimi 521U, // UMINPv4i32 4549*9a0e4156SSadaf Ebrahimi 777U, // UMINPv8i16 4550*9a0e4156SSadaf Ebrahimi 1801U, // UMINPv8i8 4551*9a0e4156SSadaf Ebrahimi 0U, // UMINVv16i8v 4552*9a0e4156SSadaf Ebrahimi 0U, // UMINVv4i16v 4553*9a0e4156SSadaf Ebrahimi 0U, // UMINVv4i32v 4554*9a0e4156SSadaf Ebrahimi 0U, // UMINVv8i16v 4555*9a0e4156SSadaf Ebrahimi 0U, // UMINVv8i8v 4556*9a0e4156SSadaf Ebrahimi 1033U, // UMINv16i8 4557*9a0e4156SSadaf Ebrahimi 1289U, // UMINv2i32 4558*9a0e4156SSadaf Ebrahimi 1545U, // UMINv4i16 4559*9a0e4156SSadaf Ebrahimi 521U, // UMINv4i32 4560*9a0e4156SSadaf Ebrahimi 777U, // UMINv8i16 4561*9a0e4156SSadaf Ebrahimi 1801U, // UMINv8i8 4562*9a0e4156SSadaf Ebrahimi 1041U, // UMLALv16i8_v8i16 4563*9a0e4156SSadaf Ebrahimi 27665U, // UMLALv2i32_indexed 4564*9a0e4156SSadaf Ebrahimi 1297U, // UMLALv2i32_v2i64 4565*9a0e4156SSadaf Ebrahimi 28945U, // UMLALv4i16_indexed 4566*9a0e4156SSadaf Ebrahimi 1553U, // UMLALv4i16_v4i32 4567*9a0e4156SSadaf Ebrahimi 27665U, // UMLALv4i32_indexed 4568*9a0e4156SSadaf Ebrahimi 529U, // UMLALv4i32_v2i64 4569*9a0e4156SSadaf Ebrahimi 28945U, // UMLALv8i16_indexed 4570*9a0e4156SSadaf Ebrahimi 785U, // UMLALv8i16_v4i32 4571*9a0e4156SSadaf Ebrahimi 1809U, // UMLALv8i8_v8i16 4572*9a0e4156SSadaf Ebrahimi 1041U, // UMLSLv16i8_v8i16 4573*9a0e4156SSadaf Ebrahimi 27665U, // UMLSLv2i32_indexed 4574*9a0e4156SSadaf Ebrahimi 1297U, // UMLSLv2i32_v2i64 4575*9a0e4156SSadaf Ebrahimi 28945U, // UMLSLv4i16_indexed 4576*9a0e4156SSadaf Ebrahimi 1553U, // UMLSLv4i16_v4i32 4577*9a0e4156SSadaf Ebrahimi 27665U, // UMLSLv4i32_indexed 4578*9a0e4156SSadaf Ebrahimi 529U, // UMLSLv4i32_v2i64 4579*9a0e4156SSadaf Ebrahimi 28945U, // UMLSLv8i16_indexed 4580*9a0e4156SSadaf Ebrahimi 785U, // UMLSLv8i16_v4i32 4581*9a0e4156SSadaf Ebrahimi 1809U, // UMLSLv8i8_v8i16 4582*9a0e4156SSadaf Ebrahimi 75U, // UMOVvi16 4583*9a0e4156SSadaf Ebrahimi 75U, // UMOVvi32 4584*9a0e4156SSadaf Ebrahimi 75U, // UMOVvi64 4585*9a0e4156SSadaf Ebrahimi 75U, // UMOVvi8 4586*9a0e4156SSadaf Ebrahimi 18689U, // UMSUBLrrr 4587*9a0e4156SSadaf Ebrahimi 1U, // UMULHrr 4588*9a0e4156SSadaf Ebrahimi 1033U, // UMULLv16i8_v8i16 4589*9a0e4156SSadaf Ebrahimi 35849U, // UMULLv2i32_indexed 4590*9a0e4156SSadaf Ebrahimi 1289U, // UMULLv2i32_v2i64 4591*9a0e4156SSadaf Ebrahimi 37129U, // UMULLv4i16_indexed 4592*9a0e4156SSadaf Ebrahimi 1545U, // UMULLv4i16_v4i32 4593*9a0e4156SSadaf Ebrahimi 35849U, // UMULLv4i32_indexed 4594*9a0e4156SSadaf Ebrahimi 521U, // UMULLv4i32_v2i64 4595*9a0e4156SSadaf Ebrahimi 37129U, // UMULLv8i16_indexed 4596*9a0e4156SSadaf Ebrahimi 777U, // UMULLv8i16_v4i32 4597*9a0e4156SSadaf Ebrahimi 1801U, // UMULLv8i8_v8i16 4598*9a0e4156SSadaf Ebrahimi 1033U, // UQADDv16i8 4599*9a0e4156SSadaf Ebrahimi 1U, // UQADDv1i16 4600*9a0e4156SSadaf Ebrahimi 1U, // UQADDv1i32 4601*9a0e4156SSadaf Ebrahimi 1U, // UQADDv1i64 4602*9a0e4156SSadaf Ebrahimi 1U, // UQADDv1i8 4603*9a0e4156SSadaf Ebrahimi 1289U, // UQADDv2i32 4604*9a0e4156SSadaf Ebrahimi 265U, // UQADDv2i64 4605*9a0e4156SSadaf Ebrahimi 1545U, // UQADDv4i16 4606*9a0e4156SSadaf Ebrahimi 521U, // UQADDv4i32 4607*9a0e4156SSadaf Ebrahimi 777U, // UQADDv8i16 4608*9a0e4156SSadaf Ebrahimi 1801U, // UQADDv8i8 4609*9a0e4156SSadaf Ebrahimi 1033U, // UQRSHLv16i8 4610*9a0e4156SSadaf Ebrahimi 1U, // UQRSHLv1i16 4611*9a0e4156SSadaf Ebrahimi 1U, // UQRSHLv1i32 4612*9a0e4156SSadaf Ebrahimi 1U, // UQRSHLv1i64 4613*9a0e4156SSadaf Ebrahimi 1U, // UQRSHLv1i8 4614*9a0e4156SSadaf Ebrahimi 1289U, // UQRSHLv2i32 4615*9a0e4156SSadaf Ebrahimi 265U, // UQRSHLv2i64 4616*9a0e4156SSadaf Ebrahimi 1545U, // UQRSHLv4i16 4617*9a0e4156SSadaf Ebrahimi 521U, // UQRSHLv4i32 4618*9a0e4156SSadaf Ebrahimi 777U, // UQRSHLv8i16 4619*9a0e4156SSadaf Ebrahimi 1801U, // UQRSHLv8i8 4620*9a0e4156SSadaf Ebrahimi 1U, // UQRSHRNb 4621*9a0e4156SSadaf Ebrahimi 1U, // UQRSHRNh 4622*9a0e4156SSadaf Ebrahimi 1U, // UQRSHRNs 4623*9a0e4156SSadaf Ebrahimi 65U, // UQRSHRNv16i8_shift 4624*9a0e4156SSadaf Ebrahimi 1U, // UQRSHRNv2i32_shift 4625*9a0e4156SSadaf Ebrahimi 1U, // UQRSHRNv4i16_shift 4626*9a0e4156SSadaf Ebrahimi 65U, // UQRSHRNv4i32_shift 4627*9a0e4156SSadaf Ebrahimi 65U, // UQRSHRNv8i16_shift 4628*9a0e4156SSadaf Ebrahimi 1U, // UQRSHRNv8i8_shift 4629*9a0e4156SSadaf Ebrahimi 1U, // UQSHLb 4630*9a0e4156SSadaf Ebrahimi 1U, // UQSHLd 4631*9a0e4156SSadaf Ebrahimi 1U, // UQSHLh 4632*9a0e4156SSadaf Ebrahimi 1U, // UQSHLs 4633*9a0e4156SSadaf Ebrahimi 1033U, // UQSHLv16i8 4634*9a0e4156SSadaf Ebrahimi 1U, // UQSHLv16i8_shift 4635*9a0e4156SSadaf Ebrahimi 1U, // UQSHLv1i16 4636*9a0e4156SSadaf Ebrahimi 1U, // UQSHLv1i32 4637*9a0e4156SSadaf Ebrahimi 1U, // UQSHLv1i64 4638*9a0e4156SSadaf Ebrahimi 1U, // UQSHLv1i8 4639*9a0e4156SSadaf Ebrahimi 1289U, // UQSHLv2i32 4640*9a0e4156SSadaf Ebrahimi 1U, // UQSHLv2i32_shift 4641*9a0e4156SSadaf Ebrahimi 265U, // UQSHLv2i64 4642*9a0e4156SSadaf Ebrahimi 1U, // UQSHLv2i64_shift 4643*9a0e4156SSadaf Ebrahimi 1545U, // UQSHLv4i16 4644*9a0e4156SSadaf Ebrahimi 1U, // UQSHLv4i16_shift 4645*9a0e4156SSadaf Ebrahimi 521U, // UQSHLv4i32 4646*9a0e4156SSadaf Ebrahimi 1U, // UQSHLv4i32_shift 4647*9a0e4156SSadaf Ebrahimi 777U, // UQSHLv8i16 4648*9a0e4156SSadaf Ebrahimi 1U, // UQSHLv8i16_shift 4649*9a0e4156SSadaf Ebrahimi 1801U, // UQSHLv8i8 4650*9a0e4156SSadaf Ebrahimi 1U, // UQSHLv8i8_shift 4651*9a0e4156SSadaf Ebrahimi 1U, // UQSHRNb 4652*9a0e4156SSadaf Ebrahimi 1U, // UQSHRNh 4653*9a0e4156SSadaf Ebrahimi 1U, // UQSHRNs 4654*9a0e4156SSadaf Ebrahimi 65U, // UQSHRNv16i8_shift 4655*9a0e4156SSadaf Ebrahimi 1U, // UQSHRNv2i32_shift 4656*9a0e4156SSadaf Ebrahimi 1U, // UQSHRNv4i16_shift 4657*9a0e4156SSadaf Ebrahimi 65U, // UQSHRNv4i32_shift 4658*9a0e4156SSadaf Ebrahimi 65U, // UQSHRNv8i16_shift 4659*9a0e4156SSadaf Ebrahimi 1U, // UQSHRNv8i8_shift 4660*9a0e4156SSadaf Ebrahimi 1033U, // UQSUBv16i8 4661*9a0e4156SSadaf Ebrahimi 1U, // UQSUBv1i16 4662*9a0e4156SSadaf Ebrahimi 1U, // UQSUBv1i32 4663*9a0e4156SSadaf Ebrahimi 1U, // UQSUBv1i64 4664*9a0e4156SSadaf Ebrahimi 1U, // UQSUBv1i8 4665*9a0e4156SSadaf Ebrahimi 1289U, // UQSUBv2i32 4666*9a0e4156SSadaf Ebrahimi 265U, // UQSUBv2i64 4667*9a0e4156SSadaf Ebrahimi 1545U, // UQSUBv4i16 4668*9a0e4156SSadaf Ebrahimi 521U, // UQSUBv4i32 4669*9a0e4156SSadaf Ebrahimi 777U, // UQSUBv8i16 4670*9a0e4156SSadaf Ebrahimi 1801U, // UQSUBv8i8 4671*9a0e4156SSadaf Ebrahimi 0U, // UQXTNv16i8 4672*9a0e4156SSadaf Ebrahimi 0U, // UQXTNv1i16 4673*9a0e4156SSadaf Ebrahimi 0U, // UQXTNv1i32 4674*9a0e4156SSadaf Ebrahimi 0U, // UQXTNv1i8 4675*9a0e4156SSadaf Ebrahimi 0U, // UQXTNv2i32 4676*9a0e4156SSadaf Ebrahimi 0U, // UQXTNv4i16 4677*9a0e4156SSadaf Ebrahimi 0U, // UQXTNv4i32 4678*9a0e4156SSadaf Ebrahimi 0U, // UQXTNv8i16 4679*9a0e4156SSadaf Ebrahimi 0U, // UQXTNv8i8 4680*9a0e4156SSadaf Ebrahimi 0U, // URECPEv2i32 4681*9a0e4156SSadaf Ebrahimi 0U, // URECPEv4i32 4682*9a0e4156SSadaf Ebrahimi 1033U, // URHADDv16i8 4683*9a0e4156SSadaf Ebrahimi 1289U, // URHADDv2i32 4684*9a0e4156SSadaf Ebrahimi 1545U, // URHADDv4i16 4685*9a0e4156SSadaf Ebrahimi 521U, // URHADDv4i32 4686*9a0e4156SSadaf Ebrahimi 777U, // URHADDv8i16 4687*9a0e4156SSadaf Ebrahimi 1801U, // URHADDv8i8 4688*9a0e4156SSadaf Ebrahimi 1033U, // URSHLv16i8 4689*9a0e4156SSadaf Ebrahimi 1U, // URSHLv1i64 4690*9a0e4156SSadaf Ebrahimi 1289U, // URSHLv2i32 4691*9a0e4156SSadaf Ebrahimi 265U, // URSHLv2i64 4692*9a0e4156SSadaf Ebrahimi 1545U, // URSHLv4i16 4693*9a0e4156SSadaf Ebrahimi 521U, // URSHLv4i32 4694*9a0e4156SSadaf Ebrahimi 777U, // URSHLv8i16 4695*9a0e4156SSadaf Ebrahimi 1801U, // URSHLv8i8 4696*9a0e4156SSadaf Ebrahimi 1U, // URSHRd 4697*9a0e4156SSadaf Ebrahimi 1U, // URSHRv16i8_shift 4698*9a0e4156SSadaf Ebrahimi 1U, // URSHRv2i32_shift 4699*9a0e4156SSadaf Ebrahimi 1U, // URSHRv2i64_shift 4700*9a0e4156SSadaf Ebrahimi 1U, // URSHRv4i16_shift 4701*9a0e4156SSadaf Ebrahimi 1U, // URSHRv4i32_shift 4702*9a0e4156SSadaf Ebrahimi 1U, // URSHRv8i16_shift 4703*9a0e4156SSadaf Ebrahimi 1U, // URSHRv8i8_shift 4704*9a0e4156SSadaf Ebrahimi 0U, // URSQRTEv2i32 4705*9a0e4156SSadaf Ebrahimi 0U, // URSQRTEv4i32 4706*9a0e4156SSadaf Ebrahimi 65U, // URSRAd 4707*9a0e4156SSadaf Ebrahimi 65U, // URSRAv16i8_shift 4708*9a0e4156SSadaf Ebrahimi 65U, // URSRAv2i32_shift 4709*9a0e4156SSadaf Ebrahimi 65U, // URSRAv2i64_shift 4710*9a0e4156SSadaf Ebrahimi 65U, // URSRAv4i16_shift 4711*9a0e4156SSadaf Ebrahimi 65U, // URSRAv4i32_shift 4712*9a0e4156SSadaf Ebrahimi 65U, // URSRAv8i16_shift 4713*9a0e4156SSadaf Ebrahimi 65U, // URSRAv8i8_shift 4714*9a0e4156SSadaf Ebrahimi 1U, // USHLLv16i8_shift 4715*9a0e4156SSadaf Ebrahimi 1U, // USHLLv2i32_shift 4716*9a0e4156SSadaf Ebrahimi 1U, // USHLLv4i16_shift 4717*9a0e4156SSadaf Ebrahimi 1U, // USHLLv4i32_shift 4718*9a0e4156SSadaf Ebrahimi 1U, // USHLLv8i16_shift 4719*9a0e4156SSadaf Ebrahimi 1U, // USHLLv8i8_shift 4720*9a0e4156SSadaf Ebrahimi 1033U, // USHLv16i8 4721*9a0e4156SSadaf Ebrahimi 1U, // USHLv1i64 4722*9a0e4156SSadaf Ebrahimi 1289U, // USHLv2i32 4723*9a0e4156SSadaf Ebrahimi 265U, // USHLv2i64 4724*9a0e4156SSadaf Ebrahimi 1545U, // USHLv4i16 4725*9a0e4156SSadaf Ebrahimi 521U, // USHLv4i32 4726*9a0e4156SSadaf Ebrahimi 777U, // USHLv8i16 4727*9a0e4156SSadaf Ebrahimi 1801U, // USHLv8i8 4728*9a0e4156SSadaf Ebrahimi 1U, // USHRd 4729*9a0e4156SSadaf Ebrahimi 1U, // USHRv16i8_shift 4730*9a0e4156SSadaf Ebrahimi 1U, // USHRv2i32_shift 4731*9a0e4156SSadaf Ebrahimi 1U, // USHRv2i64_shift 4732*9a0e4156SSadaf Ebrahimi 1U, // USHRv4i16_shift 4733*9a0e4156SSadaf Ebrahimi 1U, // USHRv4i32_shift 4734*9a0e4156SSadaf Ebrahimi 1U, // USHRv8i16_shift 4735*9a0e4156SSadaf Ebrahimi 1U, // USHRv8i8_shift 4736*9a0e4156SSadaf Ebrahimi 0U, // USQADDv16i8 4737*9a0e4156SSadaf Ebrahimi 0U, // USQADDv1i16 4738*9a0e4156SSadaf Ebrahimi 0U, // USQADDv1i32 4739*9a0e4156SSadaf Ebrahimi 0U, // USQADDv1i64 4740*9a0e4156SSadaf Ebrahimi 0U, // USQADDv1i8 4741*9a0e4156SSadaf Ebrahimi 0U, // USQADDv2i32 4742*9a0e4156SSadaf Ebrahimi 0U, // USQADDv2i64 4743*9a0e4156SSadaf Ebrahimi 0U, // USQADDv4i16 4744*9a0e4156SSadaf Ebrahimi 0U, // USQADDv4i32 4745*9a0e4156SSadaf Ebrahimi 0U, // USQADDv8i16 4746*9a0e4156SSadaf Ebrahimi 0U, // USQADDv8i8 4747*9a0e4156SSadaf Ebrahimi 65U, // USRAd 4748*9a0e4156SSadaf Ebrahimi 65U, // USRAv16i8_shift 4749*9a0e4156SSadaf Ebrahimi 65U, // USRAv2i32_shift 4750*9a0e4156SSadaf Ebrahimi 65U, // USRAv2i64_shift 4751*9a0e4156SSadaf Ebrahimi 65U, // USRAv4i16_shift 4752*9a0e4156SSadaf Ebrahimi 65U, // USRAv4i32_shift 4753*9a0e4156SSadaf Ebrahimi 65U, // USRAv8i16_shift 4754*9a0e4156SSadaf Ebrahimi 65U, // USRAv8i8_shift 4755*9a0e4156SSadaf Ebrahimi 1033U, // USUBLv16i8_v8i16 4756*9a0e4156SSadaf Ebrahimi 1289U, // USUBLv2i32_v2i64 4757*9a0e4156SSadaf Ebrahimi 1545U, // USUBLv4i16_v4i32 4758*9a0e4156SSadaf Ebrahimi 521U, // USUBLv4i32_v2i64 4759*9a0e4156SSadaf Ebrahimi 777U, // USUBLv8i16_v4i32 4760*9a0e4156SSadaf Ebrahimi 1801U, // USUBLv8i8_v8i16 4761*9a0e4156SSadaf Ebrahimi 1033U, // USUBWv16i8_v8i16 4762*9a0e4156SSadaf Ebrahimi 1289U, // USUBWv2i32_v2i64 4763*9a0e4156SSadaf Ebrahimi 1545U, // USUBWv4i16_v4i32 4764*9a0e4156SSadaf Ebrahimi 521U, // USUBWv4i32_v2i64 4765*9a0e4156SSadaf Ebrahimi 777U, // USUBWv8i16_v4i32 4766*9a0e4156SSadaf Ebrahimi 1801U, // USUBWv8i8_v8i16 4767*9a0e4156SSadaf Ebrahimi 1033U, // UZP1v16i8 4768*9a0e4156SSadaf Ebrahimi 1289U, // UZP1v2i32 4769*9a0e4156SSadaf Ebrahimi 265U, // UZP1v2i64 4770*9a0e4156SSadaf Ebrahimi 1545U, // UZP1v4i16 4771*9a0e4156SSadaf Ebrahimi 521U, // UZP1v4i32 4772*9a0e4156SSadaf Ebrahimi 777U, // UZP1v8i16 4773*9a0e4156SSadaf Ebrahimi 1801U, // UZP1v8i8 4774*9a0e4156SSadaf Ebrahimi 1033U, // UZP2v16i8 4775*9a0e4156SSadaf Ebrahimi 1289U, // UZP2v2i32 4776*9a0e4156SSadaf Ebrahimi 265U, // UZP2v2i64 4777*9a0e4156SSadaf Ebrahimi 1545U, // UZP2v4i16 4778*9a0e4156SSadaf Ebrahimi 521U, // UZP2v4i32 4779*9a0e4156SSadaf Ebrahimi 777U, // UZP2v8i16 4780*9a0e4156SSadaf Ebrahimi 1801U, // UZP2v8i8 4781*9a0e4156SSadaf Ebrahimi 0U, // XTNv16i8 4782*9a0e4156SSadaf Ebrahimi 0U, // XTNv2i32 4783*9a0e4156SSadaf Ebrahimi 0U, // XTNv4i16 4784*9a0e4156SSadaf Ebrahimi 0U, // XTNv4i32 4785*9a0e4156SSadaf Ebrahimi 0U, // XTNv8i16 4786*9a0e4156SSadaf Ebrahimi 0U, // XTNv8i8 4787*9a0e4156SSadaf Ebrahimi 1033U, // ZIP1v16i8 4788*9a0e4156SSadaf Ebrahimi 1289U, // ZIP1v2i32 4789*9a0e4156SSadaf Ebrahimi 265U, // ZIP1v2i64 4790*9a0e4156SSadaf Ebrahimi 1545U, // ZIP1v4i16 4791*9a0e4156SSadaf Ebrahimi 521U, // ZIP1v4i32 4792*9a0e4156SSadaf Ebrahimi 777U, // ZIP1v8i16 4793*9a0e4156SSadaf Ebrahimi 1801U, // ZIP1v8i8 4794*9a0e4156SSadaf Ebrahimi 1033U, // ZIP2v16i8 4795*9a0e4156SSadaf Ebrahimi 1289U, // ZIP2v2i32 4796*9a0e4156SSadaf Ebrahimi 265U, // ZIP2v2i64 4797*9a0e4156SSadaf Ebrahimi 1545U, // ZIP2v4i16 4798*9a0e4156SSadaf Ebrahimi 521U, // ZIP2v4i32 4799*9a0e4156SSadaf Ebrahimi 777U, // ZIP2v8i16 4800*9a0e4156SSadaf Ebrahimi 1801U, // ZIP2v8i8 4801*9a0e4156SSadaf Ebrahimi 0U 4802*9a0e4156SSadaf Ebrahimi }; 4803*9a0e4156SSadaf Ebrahimi 4804*9a0e4156SSadaf Ebrahimi#ifndef CAPSTONE_DIET 4805*9a0e4156SSadaf Ebrahimi static const char AsmStrs[] = { 4806*9a0e4156SSadaf Ebrahimi /* 0 */ 's', 'h', 'a', '1', 's', 'u', '0', 9, 0, 4807*9a0e4156SSadaf Ebrahimi /* 9 */ 's', 'h', 'a', '2', '5', '6', 's', 'u', '0', 9, 0, 4808*9a0e4156SSadaf Ebrahimi /* 20 */ 'l', 'd', '1', 9, 0, 4809*9a0e4156SSadaf Ebrahimi /* 25 */ 't', 'r', 'n', '1', 9, 0, 4810*9a0e4156SSadaf Ebrahimi /* 31 */ 'z', 'i', 'p', '1', 9, 0, 4811*9a0e4156SSadaf Ebrahimi /* 37 */ 'u', 'z', 'p', '1', 9, 0, 4812*9a0e4156SSadaf Ebrahimi /* 43 */ 'd', 'c', 'p', 's', '1', 9, 0, 4813*9a0e4156SSadaf Ebrahimi /* 50 */ 's', 't', '1', 9, 0, 4814*9a0e4156SSadaf Ebrahimi /* 55 */ 's', 'h', 'a', '1', 's', 'u', '1', 9, 0, 4815*9a0e4156SSadaf Ebrahimi /* 64 */ 's', 'h', 'a', '2', '5', '6', 's', 'u', '1', 9, 0, 4816*9a0e4156SSadaf Ebrahimi /* 75 */ 'r', 'e', 'v', '3', '2', 9, 0, 4817*9a0e4156SSadaf Ebrahimi /* 82 */ 'l', 'd', '2', 9, 0, 4818*9a0e4156SSadaf Ebrahimi /* 87 */ 's', 'h', 'a', '2', '5', '6', 'h', '2', 9, 0, 4819*9a0e4156SSadaf Ebrahimi /* 97 */ 's', 'a', 'b', 'a', 'l', '2', 9, 0, 4820*9a0e4156SSadaf Ebrahimi /* 105 */ 'u', 'a', 'b', 'a', 'l', '2', 9, 0, 4821*9a0e4156SSadaf Ebrahimi /* 113 */ 's', 'q', 'd', 'm', 'l', 'a', 'l', '2', 9, 0, 4822*9a0e4156SSadaf Ebrahimi /* 123 */ 's', 'm', 'l', 'a', 'l', '2', 9, 0, 4823*9a0e4156SSadaf Ebrahimi /* 131 */ 'u', 'm', 'l', 'a', 'l', '2', 9, 0, 4824*9a0e4156SSadaf Ebrahimi /* 139 */ 's', 's', 'u', 'b', 'l', '2', 9, 0, 4825*9a0e4156SSadaf Ebrahimi /* 147 */ 'u', 's', 'u', 'b', 'l', '2', 9, 0, 4826*9a0e4156SSadaf Ebrahimi /* 155 */ 's', 'a', 'b', 'd', 'l', '2', 9, 0, 4827*9a0e4156SSadaf Ebrahimi /* 163 */ 'u', 'a', 'b', 'd', 'l', '2', 9, 0, 4828*9a0e4156SSadaf Ebrahimi /* 171 */ 's', 'a', 'd', 'd', 'l', '2', 9, 0, 4829*9a0e4156SSadaf Ebrahimi /* 179 */ 'u', 'a', 'd', 'd', 'l', '2', 9, 0, 4830*9a0e4156SSadaf Ebrahimi /* 187 */ 's', 's', 'h', 'l', 'l', '2', 9, 0, 4831*9a0e4156SSadaf Ebrahimi /* 195 */ 'u', 's', 'h', 'l', 'l', '2', 9, 0, 4832*9a0e4156SSadaf Ebrahimi /* 203 */ 's', 'q', 'd', 'm', 'u', 'l', 'l', '2', 9, 0, 4833*9a0e4156SSadaf Ebrahimi /* 213 */ 'p', 'm', 'u', 'l', 'l', '2', 9, 0, 4834*9a0e4156SSadaf Ebrahimi /* 221 */ 's', 'm', 'u', 'l', 'l', '2', 9, 0, 4835*9a0e4156SSadaf Ebrahimi /* 229 */ 'u', 'm', 'u', 'l', 'l', '2', 9, 0, 4836*9a0e4156SSadaf Ebrahimi /* 237 */ 's', 'q', 'd', 'm', 'l', 's', 'l', '2', 9, 0, 4837*9a0e4156SSadaf Ebrahimi /* 247 */ 's', 'm', 'l', 's', 'l', '2', 9, 0, 4838*9a0e4156SSadaf Ebrahimi /* 255 */ 'u', 'm', 'l', 's', 'l', '2', 9, 0, 4839*9a0e4156SSadaf Ebrahimi /* 263 */ 'f', 'c', 'v', 't', 'l', '2', 9, 0, 4840*9a0e4156SSadaf Ebrahimi /* 271 */ 'r', 's', 'u', 'b', 'h', 'n', '2', 9, 0, 4841*9a0e4156SSadaf Ebrahimi /* 280 */ 'r', 'a', 'd', 'd', 'h', 'n', '2', 9, 0, 4842*9a0e4156SSadaf Ebrahimi /* 289 */ 's', 'q', 's', 'h', 'r', 'n', '2', 9, 0, 4843*9a0e4156SSadaf Ebrahimi /* 298 */ 'u', 'q', 's', 'h', 'r', 'n', '2', 9, 0, 4844*9a0e4156SSadaf Ebrahimi /* 307 */ 's', 'q', 'r', 's', 'h', 'r', 'n', '2', 9, 0, 4845*9a0e4156SSadaf Ebrahimi /* 317 */ 'u', 'q', 'r', 's', 'h', 'r', 'n', '2', 9, 0, 4846*9a0e4156SSadaf Ebrahimi /* 327 */ 't', 'r', 'n', '2', 9, 0, 4847*9a0e4156SSadaf Ebrahimi /* 333 */ 'f', 'c', 'v', 't', 'n', '2', 9, 0, 4848*9a0e4156SSadaf Ebrahimi /* 341 */ 's', 'q', 'x', 't', 'n', '2', 9, 0, 4849*9a0e4156SSadaf Ebrahimi /* 349 */ 'u', 'q', 'x', 't', 'n', '2', 9, 0, 4850*9a0e4156SSadaf Ebrahimi /* 357 */ 's', 'q', 's', 'h', 'r', 'u', 'n', '2', 9, 0, 4851*9a0e4156SSadaf Ebrahimi /* 367 */ 's', 'q', 'r', 's', 'h', 'r', 'u', 'n', '2', 9, 0, 4852*9a0e4156SSadaf Ebrahimi /* 378 */ 's', 'q', 'x', 't', 'u', 'n', '2', 9, 0, 4853*9a0e4156SSadaf Ebrahimi /* 387 */ 'f', 'c', 'v', 't', 'x', 'n', '2', 9, 0, 4854*9a0e4156SSadaf Ebrahimi /* 396 */ 'z', 'i', 'p', '2', 9, 0, 4855*9a0e4156SSadaf Ebrahimi /* 402 */ 'u', 'z', 'p', '2', 9, 0, 4856*9a0e4156SSadaf Ebrahimi /* 408 */ 'd', 'c', 'p', 's', '2', 9, 0, 4857*9a0e4156SSadaf Ebrahimi /* 415 */ 's', 't', '2', 9, 0, 4858*9a0e4156SSadaf Ebrahimi /* 420 */ 's', 's', 'u', 'b', 'w', '2', 9, 0, 4859*9a0e4156SSadaf Ebrahimi /* 428 */ 'u', 's', 'u', 'b', 'w', '2', 9, 0, 4860*9a0e4156SSadaf Ebrahimi /* 436 */ 's', 'a', 'd', 'd', 'w', '2', 9, 0, 4861*9a0e4156SSadaf Ebrahimi /* 444 */ 'u', 'a', 'd', 'd', 'w', '2', 9, 0, 4862*9a0e4156SSadaf Ebrahimi /* 452 */ 'l', 'd', '3', 9, 0, 4863*9a0e4156SSadaf Ebrahimi /* 457 */ 'd', 'c', 'p', 's', '3', 9, 0, 4864*9a0e4156SSadaf Ebrahimi /* 464 */ 's', 't', '3', 9, 0, 4865*9a0e4156SSadaf Ebrahimi /* 469 */ 'r', 'e', 'v', '6', '4', 9, 0, 4866*9a0e4156SSadaf Ebrahimi /* 476 */ 'l', 'd', '4', 9, 0, 4867*9a0e4156SSadaf Ebrahimi /* 481 */ 's', 't', '4', 9, 0, 4868*9a0e4156SSadaf Ebrahimi /* 486 */ 'r', 'e', 'v', '1', '6', 9, 0, 4869*9a0e4156SSadaf Ebrahimi /* 493 */ 's', 'a', 'b', 'a', 9, 0, 4870*9a0e4156SSadaf Ebrahimi /* 499 */ 'u', 'a', 'b', 'a', 9, 0, 4871*9a0e4156SSadaf Ebrahimi /* 505 */ 'f', 'm', 'l', 'a', 9, 0, 4872*9a0e4156SSadaf Ebrahimi /* 511 */ 's', 'r', 's', 'r', 'a', 9, 0, 4873*9a0e4156SSadaf Ebrahimi /* 518 */ 'u', 'r', 's', 'r', 'a', 9, 0, 4874*9a0e4156SSadaf Ebrahimi /* 525 */ 's', 's', 'r', 'a', 9, 0, 4875*9a0e4156SSadaf Ebrahimi /* 531 */ 'u', 's', 'r', 'a', 9, 0, 4876*9a0e4156SSadaf Ebrahimi /* 537 */ 'f', 'r', 'i', 'n', 't', 'a', 9, 0, 4877*9a0e4156SSadaf Ebrahimi /* 545 */ 'c', 'r', 'c', '3', '2', 'b', 9, 0, 4878*9a0e4156SSadaf Ebrahimi /* 553 */ 'c', 'r', 'c', '3', '2', 'c', 'b', 9, 0, 4879*9a0e4156SSadaf Ebrahimi /* 562 */ 'd', 'm', 'b', 9, 0, 4880*9a0e4156SSadaf Ebrahimi /* 567 */ 'l', 'd', 'a', 'r', 'b', 9, 0, 4881*9a0e4156SSadaf Ebrahimi /* 574 */ 'l', 'd', 'r', 'b', 9, 0, 4882*9a0e4156SSadaf Ebrahimi /* 580 */ 's', 't', 'l', 'r', 'b', 9, 0, 4883*9a0e4156SSadaf Ebrahimi /* 587 */ 'l', 'd', 't', 'r', 'b', 9, 0, 4884*9a0e4156SSadaf Ebrahimi /* 594 */ 's', 't', 'r', 'b', 9, 0, 4885*9a0e4156SSadaf Ebrahimi /* 600 */ 's', 't', 't', 'r', 'b', 9, 0, 4886*9a0e4156SSadaf Ebrahimi /* 607 */ 'l', 'd', 'u', 'r', 'b', 9, 0, 4887*9a0e4156SSadaf Ebrahimi /* 614 */ 's', 't', 'u', 'r', 'b', 9, 0, 4888*9a0e4156SSadaf Ebrahimi /* 621 */ 'l', 'd', 'a', 'x', 'r', 'b', 9, 0, 4889*9a0e4156SSadaf Ebrahimi /* 629 */ 'l', 'd', 'x', 'r', 'b', 9, 0, 4890*9a0e4156SSadaf Ebrahimi /* 636 */ 's', 't', 'l', 'x', 'r', 'b', 9, 0, 4891*9a0e4156SSadaf Ebrahimi /* 644 */ 's', 't', 'x', 'r', 'b', 9, 0, 4892*9a0e4156SSadaf Ebrahimi /* 651 */ 'd', 's', 'b', 9, 0, 4893*9a0e4156SSadaf Ebrahimi /* 656 */ 'i', 's', 'b', 9, 0, 4894*9a0e4156SSadaf Ebrahimi /* 661 */ 'l', 'd', 'r', 's', 'b', 9, 0, 4895*9a0e4156SSadaf Ebrahimi /* 668 */ 'l', 'd', 't', 'r', 's', 'b', 9, 0, 4896*9a0e4156SSadaf Ebrahimi /* 676 */ 'l', 'd', 'u', 'r', 's', 'b', 9, 0, 4897*9a0e4156SSadaf Ebrahimi /* 684 */ 'f', 's', 'u', 'b', 9, 0, 4898*9a0e4156SSadaf Ebrahimi /* 690 */ 's', 'h', 's', 'u', 'b', 9, 0, 4899*9a0e4156SSadaf Ebrahimi /* 697 */ 'u', 'h', 's', 'u', 'b', 9, 0, 4900*9a0e4156SSadaf Ebrahimi /* 704 */ 'f', 'm', 's', 'u', 'b', 9, 0, 4901*9a0e4156SSadaf Ebrahimi /* 711 */ 'f', 'n', 'm', 's', 'u', 'b', 9, 0, 4902*9a0e4156SSadaf Ebrahimi /* 719 */ 's', 'q', 's', 'u', 'b', 9, 0, 4903*9a0e4156SSadaf Ebrahimi /* 726 */ 'u', 'q', 's', 'u', 'b', 9, 0, 4904*9a0e4156SSadaf Ebrahimi /* 733 */ 's', 'h', 'a', '1', 'c', 9, 0, 4905*9a0e4156SSadaf Ebrahimi /* 740 */ 's', 'b', 'c', 9, 0, 4906*9a0e4156SSadaf Ebrahimi /* 745 */ 'a', 'd', 'c', 9, 0, 4907*9a0e4156SSadaf Ebrahimi /* 750 */ 'b', 'i', 'c', 9, 0, 4908*9a0e4156SSadaf Ebrahimi /* 755 */ 'a', 'e', 's', 'i', 'm', 'c', 9, 0, 4909*9a0e4156SSadaf Ebrahimi /* 763 */ 'a', 'e', 's', 'm', 'c', 9, 0, 4910*9a0e4156SSadaf Ebrahimi /* 770 */ 'c', 's', 'i', 'n', 'c', 9, 0, 4911*9a0e4156SSadaf Ebrahimi /* 777 */ 'h', 'v', 'c', 9, 0, 4912*9a0e4156SSadaf Ebrahimi /* 782 */ 's', 'v', 'c', 9, 0, 4913*9a0e4156SSadaf Ebrahimi /* 787 */ 'f', 'a', 'b', 'd', 9, 0, 4914*9a0e4156SSadaf Ebrahimi /* 793 */ 's', 'a', 'b', 'd', 9, 0, 4915*9a0e4156SSadaf Ebrahimi /* 799 */ 'u', 'a', 'b', 'd', 9, 0, 4916*9a0e4156SSadaf Ebrahimi /* 805 */ 'f', 'a', 'd', 'd', 9, 0, 4917*9a0e4156SSadaf Ebrahimi /* 811 */ 's', 'r', 'h', 'a', 'd', 'd', 9, 0, 4918*9a0e4156SSadaf Ebrahimi /* 819 */ 'u', 'r', 'h', 'a', 'd', 'd', 9, 0, 4919*9a0e4156SSadaf Ebrahimi /* 827 */ 's', 'h', 'a', 'd', 'd', 9, 0, 4920*9a0e4156SSadaf Ebrahimi /* 834 */ 'u', 'h', 'a', 'd', 'd', 9, 0, 4921*9a0e4156SSadaf Ebrahimi /* 841 */ 'f', 'm', 'a', 'd', 'd', 9, 0, 4922*9a0e4156SSadaf Ebrahimi /* 848 */ 'f', 'n', 'm', 'a', 'd', 'd', 9, 0, 4923*9a0e4156SSadaf Ebrahimi /* 856 */ 'u', 's', 'q', 'a', 'd', 'd', 9, 0, 4924*9a0e4156SSadaf Ebrahimi /* 864 */ 's', 'u', 'q', 'a', 'd', 'd', 9, 0, 4925*9a0e4156SSadaf Ebrahimi /* 872 */ 'a', 'n', 'd', 9, 0, 4926*9a0e4156SSadaf Ebrahimi /* 877 */ 'a', 'e', 's', 'd', 9, 0, 4927*9a0e4156SSadaf Ebrahimi /* 883 */ 'f', 'a', 'c', 'g', 'e', 9, 0, 4928*9a0e4156SSadaf Ebrahimi /* 890 */ 'f', 'c', 'm', 'g', 'e', 9, 0, 4929*9a0e4156SSadaf Ebrahimi /* 897 */ 'f', 'c', 'm', 'l', 'e', 9, 0, 4930*9a0e4156SSadaf Ebrahimi /* 904 */ 'f', 'r', 'e', 'c', 'p', 'e', 9, 0, 4931*9a0e4156SSadaf Ebrahimi /* 912 */ 'u', 'r', 'e', 'c', 'p', 'e', 9, 0, 4932*9a0e4156SSadaf Ebrahimi /* 920 */ 'f', 'c', 'c', 'm', 'p', 'e', 9, 0, 4933*9a0e4156SSadaf Ebrahimi /* 928 */ 'f', 'c', 'm', 'p', 'e', 9, 0, 4934*9a0e4156SSadaf Ebrahimi /* 935 */ 'a', 'e', 's', 'e', 9, 0, 4935*9a0e4156SSadaf Ebrahimi /* 941 */ 'f', 'r', 's', 'q', 'r', 't', 'e', 9, 0, 4936*9a0e4156SSadaf Ebrahimi /* 950 */ 'u', 'r', 's', 'q', 'r', 't', 'e', 9, 0, 4937*9a0e4156SSadaf Ebrahimi /* 959 */ 'b', 'i', 'f', 9, 0, 4938*9a0e4156SSadaf Ebrahimi /* 964 */ 's', 'c', 'v', 't', 'f', 9, 0, 4939*9a0e4156SSadaf Ebrahimi /* 971 */ 'u', 'c', 'v', 't', 'f', 9, 0, 4940*9a0e4156SSadaf Ebrahimi /* 978 */ 'f', 'n', 'e', 'g', 9, 0, 4941*9a0e4156SSadaf Ebrahimi /* 984 */ 's', 'q', 'n', 'e', 'g', 9, 0, 4942*9a0e4156SSadaf Ebrahimi /* 991 */ 'c', 's', 'n', 'e', 'g', 9, 0, 4943*9a0e4156SSadaf Ebrahimi /* 998 */ 's', 'h', 'a', '1', 'h', 9, 0, 4944*9a0e4156SSadaf Ebrahimi /* 1005 */ 'c', 'r', 'c', '3', '2', 'h', 9, 0, 4945*9a0e4156SSadaf Ebrahimi /* 1013 */ 's', 'h', 'a', '2', '5', '6', 'h', 9, 0, 4946*9a0e4156SSadaf Ebrahimi /* 1022 */ 'c', 'r', 'c', '3', '2', 'c', 'h', 9, 0, 4947*9a0e4156SSadaf Ebrahimi /* 1031 */ 's', 'q', 'd', 'm', 'u', 'l', 'h', 9, 0, 4948*9a0e4156SSadaf Ebrahimi /* 1040 */ 's', 'q', 'r', 'd', 'm', 'u', 'l', 'h', 9, 0, 4949*9a0e4156SSadaf Ebrahimi /* 1050 */ 's', 'm', 'u', 'l', 'h', 9, 0, 4950*9a0e4156SSadaf Ebrahimi /* 1057 */ 'u', 'm', 'u', 'l', 'h', 9, 0, 4951*9a0e4156SSadaf Ebrahimi /* 1064 */ 'l', 'd', 'a', 'r', 'h', 9, 0, 4952*9a0e4156SSadaf Ebrahimi /* 1071 */ 'l', 'd', 'r', 'h', 9, 0, 4953*9a0e4156SSadaf Ebrahimi /* 1077 */ 's', 't', 'l', 'r', 'h', 9, 0, 4954*9a0e4156SSadaf Ebrahimi /* 1084 */ 'l', 'd', 't', 'r', 'h', 9, 0, 4955*9a0e4156SSadaf Ebrahimi /* 1091 */ 's', 't', 'r', 'h', 9, 0, 4956*9a0e4156SSadaf Ebrahimi /* 1097 */ 's', 't', 't', 'r', 'h', 9, 0, 4957*9a0e4156SSadaf Ebrahimi /* 1104 */ 'l', 'd', 'u', 'r', 'h', 9, 0, 4958*9a0e4156SSadaf Ebrahimi /* 1111 */ 's', 't', 'u', 'r', 'h', 9, 0, 4959*9a0e4156SSadaf Ebrahimi /* 1118 */ 'l', 'd', 'a', 'x', 'r', 'h', 9, 0, 4960*9a0e4156SSadaf Ebrahimi /* 1126 */ 'l', 'd', 'x', 'r', 'h', 9, 0, 4961*9a0e4156SSadaf Ebrahimi /* 1133 */ 's', 't', 'l', 'x', 'r', 'h', 9, 0, 4962*9a0e4156SSadaf Ebrahimi /* 1141 */ 's', 't', 'x', 'r', 'h', 9, 0, 4963*9a0e4156SSadaf Ebrahimi /* 1148 */ 'l', 'd', 'r', 's', 'h', 9, 0, 4964*9a0e4156SSadaf Ebrahimi /* 1155 */ 'l', 'd', 't', 'r', 's', 'h', 9, 0, 4965*9a0e4156SSadaf Ebrahimi /* 1163 */ 'l', 'd', 'u', 'r', 's', 'h', 9, 0, 4966*9a0e4156SSadaf Ebrahimi /* 1171 */ 'c', 'm', 'h', 'i', 9, 0, 4967*9a0e4156SSadaf Ebrahimi /* 1177 */ 's', 'l', 'i', 9, 0, 4968*9a0e4156SSadaf Ebrahimi /* 1182 */ 'm', 'v', 'n', 'i', 9, 0, 4969*9a0e4156SSadaf Ebrahimi /* 1188 */ 's', 'r', 'i', 9, 0, 4970*9a0e4156SSadaf Ebrahimi /* 1193 */ 'f', 'r', 'i', 'n', 't', 'i', 9, 0, 4971*9a0e4156SSadaf Ebrahimi /* 1201 */ 'm', 'o', 'v', 'i', 9, 0, 4972*9a0e4156SSadaf Ebrahimi /* 1207 */ 'b', 'r', 'k', 9, 0, 4973*9a0e4156SSadaf Ebrahimi /* 1212 */ 'm', 'o', 'v', 'k', 9, 0, 4974*9a0e4156SSadaf Ebrahimi /* 1218 */ 's', 'a', 'b', 'a', 'l', 9, 0, 4975*9a0e4156SSadaf Ebrahimi /* 1225 */ 'u', 'a', 'b', 'a', 'l', 9, 0, 4976*9a0e4156SSadaf Ebrahimi /* 1232 */ 's', 'q', 'd', 'm', 'l', 'a', 'l', 9, 0, 4977*9a0e4156SSadaf Ebrahimi /* 1241 */ 's', 'm', 'l', 'a', 'l', 9, 0, 4978*9a0e4156SSadaf Ebrahimi /* 1248 */ 'u', 'm', 'l', 'a', 'l', 9, 0, 4979*9a0e4156SSadaf Ebrahimi /* 1255 */ 't', 'b', 'l', 9, 0, 4980*9a0e4156SSadaf Ebrahimi /* 1260 */ 's', 'm', 's', 'u', 'b', 'l', 9, 0, 4981*9a0e4156SSadaf Ebrahimi /* 1268 */ 'u', 'm', 's', 'u', 'b', 'l', 9, 0, 4982*9a0e4156SSadaf Ebrahimi /* 1276 */ 's', 's', 'u', 'b', 'l', 9, 0, 4983*9a0e4156SSadaf Ebrahimi /* 1283 */ 'u', 's', 'u', 'b', 'l', 9, 0, 4984*9a0e4156SSadaf Ebrahimi /* 1290 */ 's', 'a', 'b', 'd', 'l', 9, 0, 4985*9a0e4156SSadaf Ebrahimi /* 1297 */ 'u', 'a', 'b', 'd', 'l', 9, 0, 4986*9a0e4156SSadaf Ebrahimi /* 1304 */ 's', 'm', 'a', 'd', 'd', 'l', 9, 0, 4987*9a0e4156SSadaf Ebrahimi /* 1312 */ 'u', 'm', 'a', 'd', 'd', 'l', 9, 0, 4988*9a0e4156SSadaf Ebrahimi /* 1320 */ 's', 'a', 'd', 'd', 'l', 9, 0, 4989*9a0e4156SSadaf Ebrahimi /* 1327 */ 'u', 'a', 'd', 'd', 'l', 9, 0, 4990*9a0e4156SSadaf Ebrahimi /* 1334 */ 'f', 'c', 's', 'e', 'l', 9, 0, 4991*9a0e4156SSadaf Ebrahimi /* 1341 */ 's', 'q', 's', 'h', 'l', 9, 0, 4992*9a0e4156SSadaf Ebrahimi /* 1348 */ 'u', 'q', 's', 'h', 'l', 9, 0, 4993*9a0e4156SSadaf Ebrahimi /* 1355 */ 's', 'q', 'r', 's', 'h', 'l', 9, 0, 4994*9a0e4156SSadaf Ebrahimi /* 1363 */ 'u', 'q', 'r', 's', 'h', 'l', 9, 0, 4995*9a0e4156SSadaf Ebrahimi /* 1371 */ 's', 'r', 's', 'h', 'l', 9, 0, 4996*9a0e4156SSadaf Ebrahimi /* 1378 */ 'u', 'r', 's', 'h', 'l', 9, 0, 4997*9a0e4156SSadaf Ebrahimi /* 1385 */ 's', 's', 'h', 'l', 9, 0, 4998*9a0e4156SSadaf Ebrahimi /* 1391 */ 'u', 's', 'h', 'l', 9, 0, 4999*9a0e4156SSadaf Ebrahimi /* 1397 */ 's', 's', 'h', 'l', 'l', 9, 0, 5000*9a0e4156SSadaf Ebrahimi /* 1404 */ 'u', 's', 'h', 'l', 'l', 9, 0, 5001*9a0e4156SSadaf Ebrahimi /* 1411 */ 's', 'q', 'd', 'm', 'u', 'l', 'l', 9, 0, 5002*9a0e4156SSadaf Ebrahimi /* 1420 */ 'p', 'm', 'u', 'l', 'l', 9, 0, 5003*9a0e4156SSadaf Ebrahimi /* 1427 */ 's', 'm', 'u', 'l', 'l', 9, 0, 5004*9a0e4156SSadaf Ebrahimi /* 1434 */ 'u', 'm', 'u', 'l', 'l', 9, 0, 5005*9a0e4156SSadaf Ebrahimi /* 1441 */ 'b', 's', 'l', 9, 0, 5006*9a0e4156SSadaf Ebrahimi /* 1446 */ 's', 'q', 'd', 'm', 'l', 's', 'l', 9, 0, 5007*9a0e4156SSadaf Ebrahimi /* 1455 */ 's', 'm', 'l', 's', 'l', 9, 0, 5008*9a0e4156SSadaf Ebrahimi /* 1462 */ 'u', 'm', 'l', 's', 'l', 9, 0, 5009*9a0e4156SSadaf Ebrahimi /* 1469 */ 's', 'y', 's', 'l', 9, 0, 5010*9a0e4156SSadaf Ebrahimi /* 1475 */ 'f', 'c', 'v', 't', 'l', 9, 0, 5011*9a0e4156SSadaf Ebrahimi /* 1482 */ 'f', 'm', 'u', 'l', 9, 0, 5012*9a0e4156SSadaf Ebrahimi /* 1488 */ 'f', 'n', 'm', 'u', 'l', 9, 0, 5013*9a0e4156SSadaf Ebrahimi /* 1495 */ 'p', 'm', 'u', 'l', 9, 0, 5014*9a0e4156SSadaf Ebrahimi /* 1501 */ 's', 'h', 'a', '1', 'm', 9, 0, 5015*9a0e4156SSadaf Ebrahimi /* 1508 */ 's', 'b', 'f', 'm', 9, 0, 5016*9a0e4156SSadaf Ebrahimi /* 1514 */ 'u', 'b', 'f', 'm', 9, 0, 5017*9a0e4156SSadaf Ebrahimi /* 1520 */ 'p', 'r', 'f', 'm', 9, 0, 5018*9a0e4156SSadaf Ebrahimi /* 1526 */ 'f', 'm', 'i', 'n', 'n', 'm', 9, 0, 5019*9a0e4156SSadaf Ebrahimi /* 1534 */ 'f', 'm', 'a', 'x', 'n', 'm', 9, 0, 5020*9a0e4156SSadaf Ebrahimi /* 1542 */ 'f', 'r', 'i', 'n', 't', 'm', 9, 0, 5021*9a0e4156SSadaf Ebrahimi /* 1550 */ 'p', 'r', 'f', 'u', 'm', 9, 0, 5022*9a0e4156SSadaf Ebrahimi /* 1557 */ 'r', 's', 'u', 'b', 'h', 'n', 9, 0, 5023*9a0e4156SSadaf Ebrahimi /* 1565 */ 'r', 'a', 'd', 'd', 'h', 'n', 9, 0, 5024*9a0e4156SSadaf Ebrahimi /* 1573 */ 'f', 'm', 'i', 'n', 9, 0, 5025*9a0e4156SSadaf Ebrahimi /* 1579 */ 's', 'm', 'i', 'n', 9, 0, 5026*9a0e4156SSadaf Ebrahimi /* 1585 */ 'u', 'm', 'i', 'n', 9, 0, 5027*9a0e4156SSadaf Ebrahimi /* 1591 */ 'c', 'c', 'm', 'n', 9, 0, 5028*9a0e4156SSadaf Ebrahimi /* 1597 */ 'e', 'o', 'n', 9, 0, 5029*9a0e4156SSadaf Ebrahimi /* 1602 */ 's', 'q', 's', 'h', 'r', 'n', 9, 0, 5030*9a0e4156SSadaf Ebrahimi /* 1610 */ 'u', 'q', 's', 'h', 'r', 'n', 9, 0, 5031*9a0e4156SSadaf Ebrahimi /* 1618 */ 's', 'q', 'r', 's', 'h', 'r', 'n', 9, 0, 5032*9a0e4156SSadaf Ebrahimi /* 1627 */ 'u', 'q', 'r', 's', 'h', 'r', 'n', 9, 0, 5033*9a0e4156SSadaf Ebrahimi /* 1636 */ 'o', 'r', 'n', 9, 0, 5034*9a0e4156SSadaf Ebrahimi /* 1641 */ 'f', 'r', 'i', 'n', 't', 'n', 9, 0, 5035*9a0e4156SSadaf Ebrahimi /* 1649 */ 'f', 'c', 'v', 't', 'n', 9, 0, 5036*9a0e4156SSadaf Ebrahimi /* 1656 */ 's', 'q', 'x', 't', 'n', 9, 0, 5037*9a0e4156SSadaf Ebrahimi /* 1663 */ 'u', 'q', 'x', 't', 'n', 9, 0, 5038*9a0e4156SSadaf Ebrahimi /* 1670 */ 's', 'q', 's', 'h', 'r', 'u', 'n', 9, 0, 5039*9a0e4156SSadaf Ebrahimi /* 1679 */ 's', 'q', 'r', 's', 'h', 'r', 'u', 'n', 9, 0, 5040*9a0e4156SSadaf Ebrahimi /* 1689 */ 's', 'q', 'x', 't', 'u', 'n', 9, 0, 5041*9a0e4156SSadaf Ebrahimi /* 1697 */ 'm', 'o', 'v', 'n', 9, 0, 5042*9a0e4156SSadaf Ebrahimi /* 1703 */ 'f', 'c', 'v', 't', 'x', 'n', 9, 0, 5043*9a0e4156SSadaf Ebrahimi /* 1711 */ 's', 'h', 'a', '1', 'p', 9, 0, 5044*9a0e4156SSadaf Ebrahimi /* 1718 */ 'f', 'a', 'd', 'd', 'p', 9, 0, 5045*9a0e4156SSadaf Ebrahimi /* 1725 */ 'l', 'd', 'p', 9, 0, 5046*9a0e4156SSadaf Ebrahimi /* 1730 */ 's', 'a', 'd', 'a', 'l', 'p', 9, 0, 5047*9a0e4156SSadaf Ebrahimi /* 1738 */ 'u', 'a', 'd', 'a', 'l', 'p', 9, 0, 5048*9a0e4156SSadaf Ebrahimi /* 1746 */ 's', 'a', 'd', 'd', 'l', 'p', 9, 0, 5049*9a0e4156SSadaf Ebrahimi /* 1754 */ 'u', 'a', 'd', 'd', 'l', 'p', 9, 0, 5050*9a0e4156SSadaf Ebrahimi /* 1762 */ 'f', 'c', 'c', 'm', 'p', 9, 0, 5051*9a0e4156SSadaf Ebrahimi /* 1769 */ 'f', 'c', 'm', 'p', 9, 0, 5052*9a0e4156SSadaf Ebrahimi /* 1775 */ 'f', 'm', 'i', 'n', 'n', 'm', 'p', 9, 0, 5053*9a0e4156SSadaf Ebrahimi /* 1784 */ 'f', 'm', 'a', 'x', 'n', 'm', 'p', 9, 0, 5054*9a0e4156SSadaf Ebrahimi /* 1793 */ 'l', 'd', 'n', 'p', 9, 0, 5055*9a0e4156SSadaf Ebrahimi /* 1799 */ 'f', 'm', 'i', 'n', 'p', 9, 0, 5056*9a0e4156SSadaf Ebrahimi /* 1806 */ 's', 'm', 'i', 'n', 'p', 9, 0, 5057*9a0e4156SSadaf Ebrahimi /* 1813 */ 'u', 'm', 'i', 'n', 'p', 9, 0, 5058*9a0e4156SSadaf Ebrahimi /* 1820 */ 's', 't', 'n', 'p', 9, 0, 5059*9a0e4156SSadaf Ebrahimi /* 1826 */ 'a', 'd', 'r', 'p', 9, 0, 5060*9a0e4156SSadaf Ebrahimi /* 1832 */ 'f', 'r', 'i', 'n', 't', 'p', 9, 0, 5061*9a0e4156SSadaf Ebrahimi /* 1840 */ 's', 't', 'p', 9, 0, 5062*9a0e4156SSadaf Ebrahimi /* 1845 */ 'd', 'u', 'p', 9, 0, 5063*9a0e4156SSadaf Ebrahimi /* 1850 */ 'l', 'd', 'a', 'x', 'p', 9, 0, 5064*9a0e4156SSadaf Ebrahimi /* 1857 */ 'f', 'm', 'a', 'x', 'p', 9, 0, 5065*9a0e4156SSadaf Ebrahimi /* 1864 */ 's', 'm', 'a', 'x', 'p', 9, 0, 5066*9a0e4156SSadaf Ebrahimi /* 1871 */ 'u', 'm', 'a', 'x', 'p', 9, 0, 5067*9a0e4156SSadaf Ebrahimi /* 1878 */ 'l', 'd', 'x', 'p', 9, 0, 5068*9a0e4156SSadaf Ebrahimi /* 1884 */ 's', 't', 'l', 'x', 'p', 9, 0, 5069*9a0e4156SSadaf Ebrahimi /* 1891 */ 's', 't', 'x', 'p', 9, 0, 5070*9a0e4156SSadaf Ebrahimi /* 1897 */ 'f', 'c', 'm', 'e', 'q', 9, 0, 5071*9a0e4156SSadaf Ebrahimi /* 1904 */ 'l', 'd', '1', 'r', 9, 0, 5072*9a0e4156SSadaf Ebrahimi /* 1910 */ 'l', 'd', '2', 'r', 9, 0, 5073*9a0e4156SSadaf Ebrahimi /* 1916 */ 'l', 'd', '3', 'r', 9, 0, 5074*9a0e4156SSadaf Ebrahimi /* 1922 */ 'l', 'd', '4', 'r', 9, 0, 5075*9a0e4156SSadaf Ebrahimi /* 1928 */ 'l', 'd', 'a', 'r', 9, 0, 5076*9a0e4156SSadaf Ebrahimi /* 1934 */ 'b', 'r', 9, 0, 5077*9a0e4156SSadaf Ebrahimi /* 1938 */ 'a', 'd', 'r', 9, 0, 5078*9a0e4156SSadaf Ebrahimi /* 1943 */ 'l', 'd', 'r', 9, 0, 5079*9a0e4156SSadaf Ebrahimi /* 1948 */ 's', 'r', 's', 'h', 'r', 9, 0, 5080*9a0e4156SSadaf Ebrahimi /* 1955 */ 'u', 'r', 's', 'h', 'r', 9, 0, 5081*9a0e4156SSadaf Ebrahimi /* 1962 */ 's', 's', 'h', 'r', 9, 0, 5082*9a0e4156SSadaf Ebrahimi /* 1968 */ 'u', 's', 'h', 'r', 9, 0, 5083*9a0e4156SSadaf Ebrahimi /* 1974 */ 'b', 'l', 'r', 9, 0, 5084*9a0e4156SSadaf Ebrahimi /* 1979 */ 's', 't', 'l', 'r', 9, 0, 5085*9a0e4156SSadaf Ebrahimi /* 1985 */ 'e', 'o', 'r', 9, 0, 5086*9a0e4156SSadaf Ebrahimi /* 1990 */ 'r', 'o', 'r', 9, 0, 5087*9a0e4156SSadaf Ebrahimi /* 1995 */ 'o', 'r', 'r', 9, 0, 5088*9a0e4156SSadaf Ebrahimi /* 2000 */ 'a', 's', 'r', 9, 0, 5089*9a0e4156SSadaf Ebrahimi /* 2005 */ 'l', 's', 'r', 9, 0, 5090*9a0e4156SSadaf Ebrahimi /* 2010 */ 'm', 's', 'r', 9, 0, 5091*9a0e4156SSadaf Ebrahimi /* 2015 */ 'l', 'd', 't', 'r', 9, 0, 5092*9a0e4156SSadaf Ebrahimi /* 2021 */ 's', 't', 'r', 9, 0, 5093*9a0e4156SSadaf Ebrahimi /* 2026 */ 's', 't', 't', 'r', 9, 0, 5094*9a0e4156SSadaf Ebrahimi /* 2032 */ 'e', 'x', 't', 'r', 9, 0, 5095*9a0e4156SSadaf Ebrahimi /* 2038 */ 'l', 'd', 'u', 'r', 9, 0, 5096*9a0e4156SSadaf Ebrahimi /* 2044 */ 's', 't', 'u', 'r', 9, 0, 5097*9a0e4156SSadaf Ebrahimi /* 2050 */ 'l', 'd', 'a', 'x', 'r', 9, 0, 5098*9a0e4156SSadaf Ebrahimi /* 2057 */ 'l', 'd', 'x', 'r', 9, 0, 5099*9a0e4156SSadaf Ebrahimi /* 2063 */ 's', 't', 'l', 'x', 'r', 9, 0, 5100*9a0e4156SSadaf Ebrahimi /* 2070 */ 's', 't', 'x', 'r', 9, 0, 5101*9a0e4156SSadaf Ebrahimi /* 2076 */ 'f', 'c', 'v', 't', 'a', 's', 9, 0, 5102*9a0e4156SSadaf Ebrahimi /* 2084 */ 'f', 'a', 'b', 's', 9, 0, 5103*9a0e4156SSadaf Ebrahimi /* 2090 */ 's', 'q', 'a', 'b', 's', 9, 0, 5104*9a0e4156SSadaf Ebrahimi /* 2097 */ 's', 'u', 'b', 's', 9, 0, 5105*9a0e4156SSadaf Ebrahimi /* 2103 */ 's', 'b', 'c', 's', 9, 0, 5106*9a0e4156SSadaf Ebrahimi /* 2109 */ 'a', 'd', 'c', 's', 9, 0, 5107*9a0e4156SSadaf Ebrahimi /* 2115 */ 'b', 'i', 'c', 's', 9, 0, 5108*9a0e4156SSadaf Ebrahimi /* 2121 */ 'a', 'd', 'd', 's', 9, 0, 5109*9a0e4156SSadaf Ebrahimi /* 2127 */ 'a', 'n', 'd', 's', 9, 0, 5110*9a0e4156SSadaf Ebrahimi /* 2133 */ 'c', 'm', 'h', 's', 9, 0, 5111*9a0e4156SSadaf Ebrahimi /* 2139 */ 'c', 'l', 's', 9, 0, 5112*9a0e4156SSadaf Ebrahimi /* 2144 */ 'f', 'm', 'l', 's', 9, 0, 5113*9a0e4156SSadaf Ebrahimi /* 2150 */ 'f', 'c', 'v', 't', 'm', 's', 9, 0, 5114*9a0e4156SSadaf Ebrahimi /* 2158 */ 'i', 'n', 's', 9, 0, 5115*9a0e4156SSadaf Ebrahimi /* 2163 */ 'f', 'c', 'v', 't', 'n', 's', 9, 0, 5116*9a0e4156SSadaf Ebrahimi /* 2171 */ 'f', 'r', 'e', 'c', 'p', 's', 9, 0, 5117*9a0e4156SSadaf Ebrahimi /* 2179 */ 'f', 'c', 'v', 't', 'p', 's', 9, 0, 5118*9a0e4156SSadaf Ebrahimi /* 2187 */ 'm', 'r', 's', 9, 0, 5119*9a0e4156SSadaf Ebrahimi /* 2192 */ 'f', 'r', 's', 'q', 'r', 't', 's', 9, 0, 5120*9a0e4156SSadaf Ebrahimi /* 2201 */ 's', 'y', 's', 9, 0, 5121*9a0e4156SSadaf Ebrahimi /* 2206 */ 'f', 'c', 'v', 't', 'z', 's', 9, 0, 5122*9a0e4156SSadaf Ebrahimi /* 2214 */ 'r', 'e', 't', 9, 0, 5123*9a0e4156SSadaf Ebrahimi /* 2219 */ 'f', 'a', 'c', 'g', 't', 9, 0, 5124*9a0e4156SSadaf Ebrahimi /* 2226 */ 'f', 'c', 'm', 'g', 't', 9, 0, 5125*9a0e4156SSadaf Ebrahimi /* 2233 */ 'r', 'b', 'i', 't', 9, 0, 5126*9a0e4156SSadaf Ebrahimi /* 2239 */ 'h', 'l', 't', 9, 0, 5127*9a0e4156SSadaf Ebrahimi /* 2244 */ 'f', 'c', 'm', 'l', 't', 9, 0, 5128*9a0e4156SSadaf Ebrahimi /* 2251 */ 'c', 'n', 't', 9, 0, 5129*9a0e4156SSadaf Ebrahimi /* 2256 */ 'n', 'o', 't', 9, 0, 5130*9a0e4156SSadaf Ebrahimi /* 2261 */ 'f', 's', 'q', 'r', 't', 9, 0, 5131*9a0e4156SSadaf Ebrahimi /* 2268 */ 'c', 'm', 't', 's', 't', 9, 0, 5132*9a0e4156SSadaf Ebrahimi /* 2275 */ 'f', 'c', 'v', 't', 9, 0, 5133*9a0e4156SSadaf Ebrahimi /* 2281 */ 'e', 'x', 't', 9, 0, 5134*9a0e4156SSadaf Ebrahimi /* 2286 */ 'f', 'c', 'v', 't', 'a', 'u', 9, 0, 5135*9a0e4156SSadaf Ebrahimi /* 2294 */ 's', 'q', 's', 'h', 'l', 'u', 9, 0, 5136*9a0e4156SSadaf Ebrahimi /* 2302 */ 'f', 'c', 'v', 't', 'm', 'u', 9, 0, 5137*9a0e4156SSadaf Ebrahimi /* 2310 */ 'f', 'c', 'v', 't', 'n', 'u', 9, 0, 5138*9a0e4156SSadaf Ebrahimi /* 2318 */ 'f', 'c', 'v', 't', 'p', 'u', 9, 0, 5139*9a0e4156SSadaf Ebrahimi /* 2326 */ 'f', 'c', 'v', 't', 'z', 'u', 9, 0, 5140*9a0e4156SSadaf Ebrahimi /* 2334 */ 'a', 'd', 'd', 'v', 9, 0, 5141*9a0e4156SSadaf Ebrahimi /* 2340 */ 'r', 'e', 'v', 9, 0, 5142*9a0e4156SSadaf Ebrahimi /* 2345 */ 'f', 'd', 'i', 'v', 9, 0, 5143*9a0e4156SSadaf Ebrahimi /* 2351 */ 's', 'd', 'i', 'v', 9, 0, 5144*9a0e4156SSadaf Ebrahimi /* 2357 */ 'u', 'd', 'i', 'v', 9, 0, 5145*9a0e4156SSadaf Ebrahimi /* 2363 */ 's', 'a', 'd', 'd', 'l', 'v', 9, 0, 5146*9a0e4156SSadaf Ebrahimi /* 2371 */ 'u', 'a', 'd', 'd', 'l', 'v', 9, 0, 5147*9a0e4156SSadaf Ebrahimi /* 2379 */ 'f', 'm', 'i', 'n', 'n', 'm', 'v', 9, 0, 5148*9a0e4156SSadaf Ebrahimi /* 2388 */ 'f', 'm', 'a', 'x', 'n', 'm', 'v', 9, 0, 5149*9a0e4156SSadaf Ebrahimi /* 2397 */ 'f', 'm', 'i', 'n', 'v', 9, 0, 5150*9a0e4156SSadaf Ebrahimi /* 2404 */ 's', 'm', 'i', 'n', 'v', 9, 0, 5151*9a0e4156SSadaf Ebrahimi /* 2411 */ 'u', 'm', 'i', 'n', 'v', 9, 0, 5152*9a0e4156SSadaf Ebrahimi /* 2418 */ 'c', 's', 'i', 'n', 'v', 9, 0, 5153*9a0e4156SSadaf Ebrahimi /* 2425 */ 'f', 'm', 'o', 'v', 9, 0, 5154*9a0e4156SSadaf Ebrahimi /* 2431 */ 's', 'm', 'o', 'v', 9, 0, 5155*9a0e4156SSadaf Ebrahimi /* 2437 */ 'u', 'm', 'o', 'v', 9, 0, 5156*9a0e4156SSadaf Ebrahimi /* 2443 */ 'f', 'm', 'a', 'x', 'v', 9, 0, 5157*9a0e4156SSadaf Ebrahimi /* 2450 */ 's', 'm', 'a', 'x', 'v', 9, 0, 5158*9a0e4156SSadaf Ebrahimi /* 2457 */ 'u', 'm', 'a', 'x', 'v', 9, 0, 5159*9a0e4156SSadaf Ebrahimi /* 2464 */ 'c', 'r', 'c', '3', '2', 'w', 9, 0, 5160*9a0e4156SSadaf Ebrahimi /* 2472 */ 's', 's', 'u', 'b', 'w', 9, 0, 5161*9a0e4156SSadaf Ebrahimi /* 2479 */ 'u', 's', 'u', 'b', 'w', 9, 0, 5162*9a0e4156SSadaf Ebrahimi /* 2486 */ 'c', 'r', 'c', '3', '2', 'c', 'w', 9, 0, 5163*9a0e4156SSadaf Ebrahimi /* 2495 */ 's', 'a', 'd', 'd', 'w', 9, 0, 5164*9a0e4156SSadaf Ebrahimi /* 2502 */ 'u', 'a', 'd', 'd', 'w', 9, 0, 5165*9a0e4156SSadaf Ebrahimi /* 2509 */ 'l', 'd', 'p', 's', 'w', 9, 0, 5166*9a0e4156SSadaf Ebrahimi /* 2516 */ 'l', 'd', 'r', 's', 'w', 9, 0, 5167*9a0e4156SSadaf Ebrahimi /* 2523 */ 'l', 'd', 't', 'r', 's', 'w', 9, 0, 5168*9a0e4156SSadaf Ebrahimi /* 2531 */ 'l', 'd', 'u', 'r', 's', 'w', 9, 0, 5169*9a0e4156SSadaf Ebrahimi /* 2539 */ 'c', 'r', 'c', '3', '2', 'x', 9, 0, 5170*9a0e4156SSadaf Ebrahimi /* 2547 */ 'f', 'm', 'a', 'x', 9, 0, 5171*9a0e4156SSadaf Ebrahimi /* 2553 */ 's', 'm', 'a', 'x', 9, 0, 5172*9a0e4156SSadaf Ebrahimi /* 2559 */ 'u', 'm', 'a', 'x', 9, 0, 5173*9a0e4156SSadaf Ebrahimi /* 2565 */ 't', 'b', 'x', 9, 0, 5174*9a0e4156SSadaf Ebrahimi /* 2570 */ 'c', 'r', 'c', '3', '2', 'c', 'x', 9, 0, 5175*9a0e4156SSadaf Ebrahimi /* 2579 */ 'c', 'l', 'r', 'e', 'x', 9, 0, 5176*9a0e4156SSadaf Ebrahimi /* 2586 */ 'f', 'm', 'u', 'l', 'x', 9, 0, 5177*9a0e4156SSadaf Ebrahimi /* 2593 */ 'f', 'r', 'e', 'c', 'p', 'x', 9, 0, 5178*9a0e4156SSadaf Ebrahimi /* 2601 */ 'f', 'r', 'i', 'n', 't', 'x', 9, 0, 5179*9a0e4156SSadaf Ebrahimi /* 2609 */ 'c', 'b', 'z', 9, 0, 5180*9a0e4156SSadaf Ebrahimi /* 2614 */ 't', 'b', 'z', 9, 0, 5181*9a0e4156SSadaf Ebrahimi /* 2619 */ 'c', 'l', 'z', 9, 0, 5182*9a0e4156SSadaf Ebrahimi /* 2624 */ 'c', 'b', 'n', 'z', 9, 0, 5183*9a0e4156SSadaf Ebrahimi /* 2630 */ 't', 'b', 'n', 'z', 9, 0, 5184*9a0e4156SSadaf Ebrahimi /* 2636 */ 'f', 'r', 'i', 'n', 't', 'z', 9, 0, 5185*9a0e4156SSadaf Ebrahimi /* 2644 */ 'm', 'o', 'v', 'z', 9, 0, 5186*9a0e4156SSadaf Ebrahimi /* 2650 */ '.', 't', 'l', 's', 'd', 'e', 's', 'c', 'c', 'a', 'l', 'l', 32, 0, 5187*9a0e4156SSadaf Ebrahimi /* 2664 */ 'h', 'i', 'n', 't', 32, 0, 5188*9a0e4156SSadaf Ebrahimi /* 2670 */ 'b', '.', 0, 5189*9a0e4156SSadaf Ebrahimi /* 2673 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'E', 'N', 'D', 0, 5190*9a0e4156SSadaf Ebrahimi /* 2686 */ 'B', 'U', 'N', 'D', 'L', 'E', 0, 5191*9a0e4156SSadaf Ebrahimi /* 2693 */ 'D', 'B', 'G', '_', 'V', 'A', 'L', 'U', 'E', 0, 5192*9a0e4156SSadaf Ebrahimi /* 2703 */ 'L', 'I', 'F', 'E', 'T', 'I', 'M', 'E', '_', 'S', 'T', 'A', 'R', 'T', 0, 5193*9a0e4156SSadaf Ebrahimi /* 2718 */ 'd', 'r', 'p', 's', 0, 5194*9a0e4156SSadaf Ebrahimi /* 2723 */ 'e', 'r', 'e', 't', 0, 5195*9a0e4156SSadaf Ebrahimi }; 5196*9a0e4156SSadaf Ebrahimi#endif 5197*9a0e4156SSadaf Ebrahimi 5198*9a0e4156SSadaf Ebrahimi // Emit the opcode for the instruction. 5199*9a0e4156SSadaf Ebrahimi uint64_t Bits1 = OpInfo[MCInst_getOpcode(MI)]; 5200*9a0e4156SSadaf Ebrahimi uint64_t Bits2 = OpInfo2[MCInst_getOpcode(MI)]; 5201*9a0e4156SSadaf Ebrahimi uint64_t Bits = (Bits2 << 32) | Bits1; 5202*9a0e4156SSadaf Ebrahimi // assert(Bits != 0 && "Cannot print this instruction."); 5203*9a0e4156SSadaf Ebrahimi#ifndef CAPSTONE_DIET 5204*9a0e4156SSadaf Ebrahimi SStream_concat0(O, AsmStrs+(Bits & 4095)-1); 5205*9a0e4156SSadaf Ebrahimi#endif 5206*9a0e4156SSadaf Ebrahimi 5207*9a0e4156SSadaf Ebrahimi 5208*9a0e4156SSadaf Ebrahimi // Fragment 0 encoded into 6 bits for 40 unique commands. 5209*9a0e4156SSadaf Ebrahimi //printf("Frag-0: %"PRIu64"\n", (Bits >> 12) & 63); 5210*9a0e4156SSadaf Ebrahimi switch ((Bits >> 12) & 63) { 5211*9a0e4156SSadaf Ebrahimi default: // unreachable. 5212*9a0e4156SSadaf Ebrahimi case 0: 5213*9a0e4156SSadaf Ebrahimi // DBG_VALUE, BUNDLE, LIFETIME_START, LIFETIME_END, DRPS, ERET 5214*9a0e4156SSadaf Ebrahimi return; 5215*9a0e4156SSadaf Ebrahimi break; 5216*9a0e4156SSadaf Ebrahimi case 1: 5217*9a0e4156SSadaf Ebrahimi // ABSv16i8, ABSv2i32, ABSv2i64, ABSv4i16, ABSv4i32, ABSv8i16, ABSv8i8, A... 5218*9a0e4156SSadaf Ebrahimi printVRegOperand(MI, 0, O); 5219*9a0e4156SSadaf Ebrahimi break; 5220*9a0e4156SSadaf Ebrahimi case 2: 5221*9a0e4156SSadaf Ebrahimi // ABSv1i64, ADCSWr, ADCSXr, ADCWr, ADCXr, ADDPv2i64p, ADDSWri, ADDSWrs, ... 5222*9a0e4156SSadaf Ebrahimi printOperand(MI, 0, O); 5223*9a0e4156SSadaf Ebrahimi break; 5224*9a0e4156SSadaf Ebrahimi case 3: 5225*9a0e4156SSadaf Ebrahimi // ADDHNv2i64_v4i32, ADDHNv4i32_v8i16, ADDHNv8i16_v16i8, AESDrr, AESErr, ... 5226*9a0e4156SSadaf Ebrahimi printVRegOperand(MI, 1, O); 5227*9a0e4156SSadaf Ebrahimi break; 5228*9a0e4156SSadaf Ebrahimi case 4: 5229*9a0e4156SSadaf Ebrahimi // B, BL 5230*9a0e4156SSadaf Ebrahimi printAlignedLabel(MI, 0, O); 5231*9a0e4156SSadaf Ebrahimi return; 5232*9a0e4156SSadaf Ebrahimi break; 5233*9a0e4156SSadaf Ebrahimi case 5: 5234*9a0e4156SSadaf Ebrahimi // BRK, DCPS1, DCPS2, DCPS3, HINT, HLT, HVC, SMC, SVC 5235*9a0e4156SSadaf Ebrahimi printHexImm(MI, 0, O); 5236*9a0e4156SSadaf Ebrahimi return; 5237*9a0e4156SSadaf Ebrahimi break; 5238*9a0e4156SSadaf Ebrahimi case 6: 5239*9a0e4156SSadaf Ebrahimi // Bcc 5240*9a0e4156SSadaf Ebrahimi printCondCode(MI, 0, O); 5241*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "\t"); 5242*9a0e4156SSadaf Ebrahimi printAlignedLabel(MI, 1, O); 5243*9a0e4156SSadaf Ebrahimi return; 5244*9a0e4156SSadaf Ebrahimi break; 5245*9a0e4156SSadaf Ebrahimi case 7: 5246*9a0e4156SSadaf Ebrahimi // DMB, DSB, ISB 5247*9a0e4156SSadaf Ebrahimi printBarrierOption(MI, 0, O); 5248*9a0e4156SSadaf Ebrahimi return; 5249*9a0e4156SSadaf Ebrahimi break; 5250*9a0e4156SSadaf Ebrahimi case 8: 5251*9a0e4156SSadaf Ebrahimi // FMLAv1i32_indexed, FMLAv1i64_indexed, FMLSv1i32_indexed, FMLSv1i64_ind... 5252*9a0e4156SSadaf Ebrahimi printOperand(MI, 1, O); 5253*9a0e4156SSadaf Ebrahimi break; 5254*9a0e4156SSadaf Ebrahimi case 9: 5255*9a0e4156SSadaf Ebrahimi // LD1Fourv16b, LD1Onev16b, LD1Rv16b, LD1Threev16b, LD1Twov16b, LD2Rv16b,... 5256*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 0, O, 16, 'b', MRI); 5257*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5258*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5259*9a0e4156SSadaf Ebrahimi printOperand(MI, 1, O); 5260*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 5261*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5262*9a0e4156SSadaf Ebrahimi return; 5263*9a0e4156SSadaf Ebrahimi break; 5264*9a0e4156SSadaf Ebrahimi case 10: 5265*9a0e4156SSadaf Ebrahimi // LD1Fourv16b_POST, LD1Onev16b_POST, LD1Rv16b_POST, LD1Threev16b_POST, L... 5266*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 1, O, 16, 'b', MRI); 5267*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5268*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5269*9a0e4156SSadaf Ebrahimi printOperand(MI, 2, O); 5270*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "], "); 5271*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5272*9a0e4156SSadaf Ebrahimi break; 5273*9a0e4156SSadaf Ebrahimi case 11: 5274*9a0e4156SSadaf Ebrahimi // LD1Fourv1d, LD1Onev1d, LD1Rv1d, LD1Threev1d, LD1Twov1d, LD2Rv1d, LD3Rv... 5275*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 0, O, 1, 'd', MRI); 5276*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5277*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5278*9a0e4156SSadaf Ebrahimi printOperand(MI, 1, O); 5279*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 5280*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5281*9a0e4156SSadaf Ebrahimi return; 5282*9a0e4156SSadaf Ebrahimi break; 5283*9a0e4156SSadaf Ebrahimi case 12: 5284*9a0e4156SSadaf Ebrahimi // LD1Fourv1d_POST, LD1Onev1d_POST, LD1Rv1d_POST, LD1Threev1d_POST, LD1Tw... 5285*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 1, O, 1, 'd', MRI); 5286*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5287*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5288*9a0e4156SSadaf Ebrahimi printOperand(MI, 2, O); 5289*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "], "); 5290*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5291*9a0e4156SSadaf Ebrahimi break; 5292*9a0e4156SSadaf Ebrahimi case 13: 5293*9a0e4156SSadaf Ebrahimi // LD1Fourv2d, LD1Onev2d, LD1Rv2d, LD1Threev2d, LD1Twov2d, LD2Rv2d, LD2Tw... 5294*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 0, O, 2, 'd', MRI); 5295*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5296*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5297*9a0e4156SSadaf Ebrahimi printOperand(MI, 1, O); 5298*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 5299*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5300*9a0e4156SSadaf Ebrahimi return; 5301*9a0e4156SSadaf Ebrahimi break; 5302*9a0e4156SSadaf Ebrahimi case 14: 5303*9a0e4156SSadaf Ebrahimi // LD1Fourv2d_POST, LD1Onev2d_POST, LD1Rv2d_POST, LD1Threev2d_POST, LD1Tw... 5304*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 1, O, 2, 'd', MRI); 5305*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5306*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5307*9a0e4156SSadaf Ebrahimi printOperand(MI, 2, O); 5308*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "], "); 5309*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5310*9a0e4156SSadaf Ebrahimi break; 5311*9a0e4156SSadaf Ebrahimi case 15: 5312*9a0e4156SSadaf Ebrahimi // LD1Fourv2s, LD1Onev2s, LD1Rv2s, LD1Threev2s, LD1Twov2s, LD2Rv2s, LD2Tw... 5313*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 0, O, 2, 's', MRI); 5314*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5315*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5316*9a0e4156SSadaf Ebrahimi printOperand(MI, 1, O); 5317*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 5318*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5319*9a0e4156SSadaf Ebrahimi return; 5320*9a0e4156SSadaf Ebrahimi break; 5321*9a0e4156SSadaf Ebrahimi case 16: 5322*9a0e4156SSadaf Ebrahimi // LD1Fourv2s_POST, LD1Onev2s_POST, LD1Rv2s_POST, LD1Threev2s_POST, LD1Tw... 5323*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 1, O, 2, 's', MRI); 5324*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5325*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5326*9a0e4156SSadaf Ebrahimi printOperand(MI, 2, O); 5327*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "], "); 5328*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5329*9a0e4156SSadaf Ebrahimi break; 5330*9a0e4156SSadaf Ebrahimi case 17: 5331*9a0e4156SSadaf Ebrahimi // LD1Fourv4h, LD1Onev4h, LD1Rv4h, LD1Threev4h, LD1Twov4h, LD2Rv4h, LD2Tw... 5332*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 0, O, 4, 'h', MRI); 5333*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5334*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5335*9a0e4156SSadaf Ebrahimi printOperand(MI, 1, O); 5336*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 5337*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5338*9a0e4156SSadaf Ebrahimi return; 5339*9a0e4156SSadaf Ebrahimi break; 5340*9a0e4156SSadaf Ebrahimi case 18: 5341*9a0e4156SSadaf Ebrahimi // LD1Fourv4h_POST, LD1Onev4h_POST, LD1Rv4h_POST, LD1Threev4h_POST, LD1Tw... 5342*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 1, O, 4, 'h', MRI); 5343*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5344*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5345*9a0e4156SSadaf Ebrahimi printOperand(MI, 2, O); 5346*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "], "); 5347*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5348*9a0e4156SSadaf Ebrahimi break; 5349*9a0e4156SSadaf Ebrahimi case 19: 5350*9a0e4156SSadaf Ebrahimi // LD1Fourv4s, LD1Onev4s, LD1Rv4s, LD1Threev4s, LD1Twov4s, LD2Rv4s, LD2Tw... 5351*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 0, O, 4, 's', MRI); 5352*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5353*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5354*9a0e4156SSadaf Ebrahimi printOperand(MI, 1, O); 5355*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 5356*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5357*9a0e4156SSadaf Ebrahimi return; 5358*9a0e4156SSadaf Ebrahimi break; 5359*9a0e4156SSadaf Ebrahimi case 20: 5360*9a0e4156SSadaf Ebrahimi // LD1Fourv4s_POST, LD1Onev4s_POST, LD1Rv4s_POST, LD1Threev4s_POST, LD1Tw... 5361*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 1, O, 4, 's', MRI); 5362*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5363*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5364*9a0e4156SSadaf Ebrahimi printOperand(MI, 2, O); 5365*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "], "); 5366*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5367*9a0e4156SSadaf Ebrahimi break; 5368*9a0e4156SSadaf Ebrahimi case 21: 5369*9a0e4156SSadaf Ebrahimi // LD1Fourv8b, LD1Onev8b, LD1Rv8b, LD1Threev8b, LD1Twov8b, LD2Rv8b, LD2Tw... 5370*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 0, O, 8, 'b', MRI); 5371*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5372*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5373*9a0e4156SSadaf Ebrahimi printOperand(MI, 1, O); 5374*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 5375*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5376*9a0e4156SSadaf Ebrahimi return; 5377*9a0e4156SSadaf Ebrahimi break; 5378*9a0e4156SSadaf Ebrahimi case 22: 5379*9a0e4156SSadaf Ebrahimi // LD1Fourv8b_POST, LD1Onev8b_POST, LD1Rv8b_POST, LD1Threev8b_POST, LD1Tw... 5380*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 1, O, 8, 'b', MRI); 5381*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5382*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5383*9a0e4156SSadaf Ebrahimi printOperand(MI, 2, O); 5384*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "], "); 5385*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5386*9a0e4156SSadaf Ebrahimi break; 5387*9a0e4156SSadaf Ebrahimi case 23: 5388*9a0e4156SSadaf Ebrahimi // LD1Fourv8h, LD1Onev8h, LD1Rv8h, LD1Threev8h, LD1Twov8h, LD2Rv8h, LD2Tw... 5389*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 0, O, 8, 'h', MRI); 5390*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5391*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5392*9a0e4156SSadaf Ebrahimi printOperand(MI, 1, O); 5393*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 5394*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5395*9a0e4156SSadaf Ebrahimi return; 5396*9a0e4156SSadaf Ebrahimi break; 5397*9a0e4156SSadaf Ebrahimi case 24: 5398*9a0e4156SSadaf Ebrahimi // LD1Fourv8h_POST, LD1Onev8h_POST, LD1Rv8h_POST, LD1Threev8h_POST, LD1Tw... 5399*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 1, O, 8, 'h', MRI); 5400*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5401*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5402*9a0e4156SSadaf Ebrahimi printOperand(MI, 2, O); 5403*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "], "); 5404*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5405*9a0e4156SSadaf Ebrahimi break; 5406*9a0e4156SSadaf Ebrahimi case 25: 5407*9a0e4156SSadaf Ebrahimi // LD1i16, LD2i16, LD3i16, LD4i16, ST1i16_POST, ST2i16_POST, ST3i16_POST,... 5408*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 1, O, 0, 'h', MRI); 5409*9a0e4156SSadaf Ebrahimi printVectorIndex(MI, 2, O); 5410*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5411*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5412*9a0e4156SSadaf Ebrahimi printOperand(MI, 3, O); 5413*9a0e4156SSadaf Ebrahimi break; 5414*9a0e4156SSadaf Ebrahimi case 26: 5415*9a0e4156SSadaf Ebrahimi // LD1i16_POST, LD2i16_POST, LD3i16_POST, LD4i16_POST 5416*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 2, O, 0, 'h', MRI); 5417*9a0e4156SSadaf Ebrahimi printVectorIndex(MI, 3, O); 5418*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5419*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5420*9a0e4156SSadaf Ebrahimi printOperand(MI, 4, O); 5421*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "], "); 5422*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5423*9a0e4156SSadaf Ebrahimi break; 5424*9a0e4156SSadaf Ebrahimi case 27: 5425*9a0e4156SSadaf Ebrahimi // LD1i32, LD2i32, LD3i32, LD4i32, ST1i32_POST, ST2i32_POST, ST3i32_POST,... 5426*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 1, O, 0, 's', MRI); 5427*9a0e4156SSadaf Ebrahimi printVectorIndex(MI, 2, O); 5428*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5429*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5430*9a0e4156SSadaf Ebrahimi printOperand(MI, 3, O); 5431*9a0e4156SSadaf Ebrahimi break; 5432*9a0e4156SSadaf Ebrahimi case 28: 5433*9a0e4156SSadaf Ebrahimi // LD1i32_POST, LD2i32_POST, LD3i32_POST, LD4i32_POST 5434*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 2, O, 0, 's', MRI); 5435*9a0e4156SSadaf Ebrahimi printVectorIndex(MI, 3, O); 5436*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5437*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5438*9a0e4156SSadaf Ebrahimi printOperand(MI, 4, O); 5439*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "], "); 5440*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5441*9a0e4156SSadaf Ebrahimi break; 5442*9a0e4156SSadaf Ebrahimi case 29: 5443*9a0e4156SSadaf Ebrahimi // LD1i64, LD2i64, LD3i64, LD4i64, ST1i64_POST, ST2i64_POST, ST3i64_POST,... 5444*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 1, O, 0, 'd', MRI); 5445*9a0e4156SSadaf Ebrahimi printVectorIndex(MI, 2, O); 5446*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5447*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5448*9a0e4156SSadaf Ebrahimi printOperand(MI, 3, O); 5449*9a0e4156SSadaf Ebrahimi break; 5450*9a0e4156SSadaf Ebrahimi case 30: 5451*9a0e4156SSadaf Ebrahimi // LD1i64_POST, LD2i64_POST, LD3i64_POST, LD4i64_POST 5452*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 2, O, 0, 'd', MRI); 5453*9a0e4156SSadaf Ebrahimi printVectorIndex(MI, 3, O); 5454*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5455*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5456*9a0e4156SSadaf Ebrahimi printOperand(MI, 4, O); 5457*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "], "); 5458*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5459*9a0e4156SSadaf Ebrahimi break; 5460*9a0e4156SSadaf Ebrahimi case 31: 5461*9a0e4156SSadaf Ebrahimi // LD1i8, LD2i8, LD3i8, LD4i8, ST1i8_POST, ST2i8_POST, ST3i8_POST, ST4i8_... 5462*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 1, O, 0, 'b', MRI); 5463*9a0e4156SSadaf Ebrahimi printVectorIndex(MI, 2, O); 5464*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5465*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5466*9a0e4156SSadaf Ebrahimi printOperand(MI, 3, O); 5467*9a0e4156SSadaf Ebrahimi break; 5468*9a0e4156SSadaf Ebrahimi case 32: 5469*9a0e4156SSadaf Ebrahimi // LD1i8_POST, LD2i8_POST, LD3i8_POST, LD4i8_POST 5470*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 2, O, 0, 'b', MRI); 5471*9a0e4156SSadaf Ebrahimi printVectorIndex(MI, 3, O); 5472*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5473*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5474*9a0e4156SSadaf Ebrahimi printOperand(MI, 4, O); 5475*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "], "); 5476*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5477*9a0e4156SSadaf Ebrahimi break; 5478*9a0e4156SSadaf Ebrahimi case 33: 5479*9a0e4156SSadaf Ebrahimi // MSR 5480*9a0e4156SSadaf Ebrahimi printMSRSystemRegister(MI, 0, O); 5481*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", "); 5482*9a0e4156SSadaf Ebrahimi printOperand(MI, 1, O); 5483*9a0e4156SSadaf Ebrahimi return; 5484*9a0e4156SSadaf Ebrahimi break; 5485*9a0e4156SSadaf Ebrahimi case 34: 5486*9a0e4156SSadaf Ebrahimi // MSRpstate 5487*9a0e4156SSadaf Ebrahimi printSystemPStateField(MI, 0, O); 5488*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", "); 5489*9a0e4156SSadaf Ebrahimi printOperand(MI, 1, O); 5490*9a0e4156SSadaf Ebrahimi return; 5491*9a0e4156SSadaf Ebrahimi break; 5492*9a0e4156SSadaf Ebrahimi case 35: 5493*9a0e4156SSadaf Ebrahimi // PRFMl, PRFMroW, PRFMroX, PRFMui, PRFUMi 5494*9a0e4156SSadaf Ebrahimi printPrefetchOp(MI, 0, O); 5495*9a0e4156SSadaf Ebrahimi break; 5496*9a0e4156SSadaf Ebrahimi case 36: 5497*9a0e4156SSadaf Ebrahimi // ST1i16, ST2i16, ST3i16, ST4i16 5498*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 0, O, 0, 'h', MRI); 5499*9a0e4156SSadaf Ebrahimi printVectorIndex(MI, 1, O); 5500*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5501*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5502*9a0e4156SSadaf Ebrahimi printOperand(MI, 2, O); 5503*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 5504*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5505*9a0e4156SSadaf Ebrahimi return; 5506*9a0e4156SSadaf Ebrahimi break; 5507*9a0e4156SSadaf Ebrahimi case 37: 5508*9a0e4156SSadaf Ebrahimi // ST1i32, ST2i32, ST3i32, ST4i32 5509*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 0, O, 0, 's', MRI); 5510*9a0e4156SSadaf Ebrahimi printVectorIndex(MI, 1, O); 5511*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5512*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5513*9a0e4156SSadaf Ebrahimi printOperand(MI, 2, O); 5514*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 5515*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5516*9a0e4156SSadaf Ebrahimi return; 5517*9a0e4156SSadaf Ebrahimi break; 5518*9a0e4156SSadaf Ebrahimi case 38: 5519*9a0e4156SSadaf Ebrahimi // ST1i64, ST2i64, ST3i64, ST4i64 5520*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 0, O, 0, 'd', MRI); 5521*9a0e4156SSadaf Ebrahimi printVectorIndex(MI, 1, O); 5522*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5523*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5524*9a0e4156SSadaf Ebrahimi printOperand(MI, 2, O); 5525*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 5526*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5527*9a0e4156SSadaf Ebrahimi return; 5528*9a0e4156SSadaf Ebrahimi break; 5529*9a0e4156SSadaf Ebrahimi case 39: 5530*9a0e4156SSadaf Ebrahimi // ST1i8, ST2i8, ST3i8, ST4i8 5531*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 0, O, 0, 'b', MRI); 5532*9a0e4156SSadaf Ebrahimi printVectorIndex(MI, 1, O); 5533*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5534*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5535*9a0e4156SSadaf Ebrahimi printOperand(MI, 2, O); 5536*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 5537*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5538*9a0e4156SSadaf Ebrahimi return; 5539*9a0e4156SSadaf Ebrahimi break; 5540*9a0e4156SSadaf Ebrahimi } 5541*9a0e4156SSadaf Ebrahimi 5542*9a0e4156SSadaf Ebrahimi 5543*9a0e4156SSadaf Ebrahimi // Fragment 1 encoded into 6 bits for 41 unique commands. 5544*9a0e4156SSadaf Ebrahimi //printf("Frag-1: %"PRIu64"\n", (Bits >> 18) & 63); 5545*9a0e4156SSadaf Ebrahimi switch ((Bits >> 18) & 63) { 5546*9a0e4156SSadaf Ebrahimi default: // unreachable. 5547*9a0e4156SSadaf Ebrahimi case 0: 5548*9a0e4156SSadaf Ebrahimi // ABSv16i8, ADDHNv8i16_v16i8, ADDPv16i8, ADDv16i8, AESDrr, AESErr, AESIM... 5549*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".16b, "); 5550*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B); 5551*9a0e4156SSadaf Ebrahimi break; 5552*9a0e4156SSadaf Ebrahimi case 1: 5553*9a0e4156SSadaf Ebrahimi // ABSv1i64, ADCSWr, ADCSXr, ADCWr, ADCXr, ADDPv2i64p, ADDSWri, ADDSWrs, ... 5554*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", "); 5555*9a0e4156SSadaf Ebrahimi break; 5556*9a0e4156SSadaf Ebrahimi case 2: 5557*9a0e4156SSadaf Ebrahimi // ABSv2i32, ADDHNv2i64_v2i32, ADDPv2i32, ADDv2i32, BICv2i32, CLSv2i32, C... 5558*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".2s, "); 5559*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S); 5560*9a0e4156SSadaf Ebrahimi break; 5561*9a0e4156SSadaf Ebrahimi case 3: 5562*9a0e4156SSadaf Ebrahimi // ABSv2i64, ADDPv2i64, ADDv2i64, CMEQv2i64, CMEQv2i64rz, CMGEv2i64, CMGE... 5563*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".2d, "); 5564*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); 5565*9a0e4156SSadaf Ebrahimi break; 5566*9a0e4156SSadaf Ebrahimi case 4: 5567*9a0e4156SSadaf Ebrahimi // ABSv4i16, ADDHNv4i32_v4i16, ADDPv4i16, ADDv4i16, BICv4i16, CLSv4i16, C... 5568*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".4h, "); 5569*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H); 5570*9a0e4156SSadaf Ebrahimi break; 5571*9a0e4156SSadaf Ebrahimi case 5: 5572*9a0e4156SSadaf Ebrahimi // ABSv4i32, ADDHNv2i64_v4i32, ADDPv4i32, ADDv4i32, BICv4i32, CLSv4i32, C... 5573*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".4s, "); 5574*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); 5575*9a0e4156SSadaf Ebrahimi break; 5576*9a0e4156SSadaf Ebrahimi case 6: 5577*9a0e4156SSadaf Ebrahimi // ABSv8i16, ADDHNv4i32_v8i16, ADDPv8i16, ADDv8i16, BICv8i16, CLSv8i16, C... 5578*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".8h, "); 5579*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H); 5580*9a0e4156SSadaf Ebrahimi break; 5581*9a0e4156SSadaf Ebrahimi case 7: 5582*9a0e4156SSadaf Ebrahimi // ABSv8i8, ADDHNv8i16_v8i8, ADDPv8i8, ADDv8i8, ANDv8i8, BICv8i8, BIFv8i8... 5583*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".8b, "); 5584*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B); 5585*9a0e4156SSadaf Ebrahimi break; 5586*9a0e4156SSadaf Ebrahimi case 8: 5587*9a0e4156SSadaf Ebrahimi // BLR, BR, CLREX, RET, TLSDESCCALL 5588*9a0e4156SSadaf Ebrahimi return; 5589*9a0e4156SSadaf Ebrahimi break; 5590*9a0e4156SSadaf Ebrahimi case 9: 5591*9a0e4156SSadaf Ebrahimi // FCMPDri, FCMPEDri, FCMPESri, FCMPSri 5592*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", #0.0"); 5593*9a0e4156SSadaf Ebrahimi arm64_op_addFP(MI, 0.0); 5594*9a0e4156SSadaf Ebrahimi return; 5595*9a0e4156SSadaf Ebrahimi break; 5596*9a0e4156SSadaf Ebrahimi case 10: 5597*9a0e4156SSadaf Ebrahimi // FMOVXDHighr, INSvi64gpr, INSvi64lane 5598*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".d"); 5599*9a0e4156SSadaf Ebrahimi arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_D); 5600*9a0e4156SSadaf Ebrahimi printVectorIndex(MI, 2, O); 5601*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", "); 5602*9a0e4156SSadaf Ebrahimi break; 5603*9a0e4156SSadaf Ebrahimi case 11: 5604*9a0e4156SSadaf Ebrahimi // INSvi16gpr, INSvi16lane 5605*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".h"); 5606*9a0e4156SSadaf Ebrahimi arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_H); 5607*9a0e4156SSadaf Ebrahimi printVectorIndex(MI, 2, O); 5608*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", "); 5609*9a0e4156SSadaf Ebrahimi break; 5610*9a0e4156SSadaf Ebrahimi case 12: 5611*9a0e4156SSadaf Ebrahimi // INSvi32gpr, INSvi32lane 5612*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".s"); 5613*9a0e4156SSadaf Ebrahimi arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_S); 5614*9a0e4156SSadaf Ebrahimi printVectorIndex(MI, 2, O); 5615*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", "); 5616*9a0e4156SSadaf Ebrahimi break; 5617*9a0e4156SSadaf Ebrahimi case 13: 5618*9a0e4156SSadaf Ebrahimi // INSvi8gpr, INSvi8lane 5619*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".b"); 5620*9a0e4156SSadaf Ebrahimi arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_B); 5621*9a0e4156SSadaf Ebrahimi printVectorIndex(MI, 2, O); 5622*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", "); 5623*9a0e4156SSadaf Ebrahimi break; 5624*9a0e4156SSadaf Ebrahimi case 14: 5625*9a0e4156SSadaf Ebrahimi // LD1Fourv16b_POST, LD1Fourv2d_POST, LD1Fourv4s_POST, LD1Fourv8h_POST, L... 5626*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 3, O, 64); 5627*9a0e4156SSadaf Ebrahimi return; 5628*9a0e4156SSadaf Ebrahimi break; 5629*9a0e4156SSadaf Ebrahimi case 15: 5630*9a0e4156SSadaf Ebrahimi // LD1Fourv1d_POST, LD1Fourv2s_POST, LD1Fourv4h_POST, LD1Fourv8b_POST, LD... 5631*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 3, O, 32); 5632*9a0e4156SSadaf Ebrahimi return; 5633*9a0e4156SSadaf Ebrahimi break; 5634*9a0e4156SSadaf Ebrahimi case 16: 5635*9a0e4156SSadaf Ebrahimi // LD1Onev16b_POST, LD1Onev2d_POST, LD1Onev4s_POST, LD1Onev8h_POST, LD1Tw... 5636*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 3, O, 16); 5637*9a0e4156SSadaf Ebrahimi return; 5638*9a0e4156SSadaf Ebrahimi break; 5639*9a0e4156SSadaf Ebrahimi case 17: 5640*9a0e4156SSadaf Ebrahimi // LD1Onev1d_POST, LD1Onev2s_POST, LD1Onev4h_POST, LD1Onev8b_POST, LD1Rv1... 5641*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 3, O, 8); 5642*9a0e4156SSadaf Ebrahimi return; 5643*9a0e4156SSadaf Ebrahimi break; 5644*9a0e4156SSadaf Ebrahimi case 18: 5645*9a0e4156SSadaf Ebrahimi // LD1Rv16b_POST, LD1Rv8b_POST 5646*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 3, O, 1); 5647*9a0e4156SSadaf Ebrahimi return; 5648*9a0e4156SSadaf Ebrahimi break; 5649*9a0e4156SSadaf Ebrahimi case 19: 5650*9a0e4156SSadaf Ebrahimi // LD1Rv2s_POST, LD1Rv4s_POST, LD2Rv4h_POST, LD2Rv8h_POST, LD4Rv16b_POST,... 5651*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 3, O, 4); 5652*9a0e4156SSadaf Ebrahimi return; 5653*9a0e4156SSadaf Ebrahimi break; 5654*9a0e4156SSadaf Ebrahimi case 20: 5655*9a0e4156SSadaf Ebrahimi // LD1Rv4h_POST, LD1Rv8h_POST, LD2Rv16b_POST, LD2Rv8b_POST 5656*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 3, O, 2); 5657*9a0e4156SSadaf Ebrahimi return; 5658*9a0e4156SSadaf Ebrahimi break; 5659*9a0e4156SSadaf Ebrahimi case 21: 5660*9a0e4156SSadaf Ebrahimi // LD1Threev16b_POST, LD1Threev2d_POST, LD1Threev4s_POST, LD1Threev8h_POS... 5661*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 3, O, 48); 5662*9a0e4156SSadaf Ebrahimi return; 5663*9a0e4156SSadaf Ebrahimi break; 5664*9a0e4156SSadaf Ebrahimi case 22: 5665*9a0e4156SSadaf Ebrahimi // LD1Threev1d_POST, LD1Threev2s_POST, LD1Threev4h_POST, LD1Threev8b_POST... 5666*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 3, O, 24); 5667*9a0e4156SSadaf Ebrahimi return; 5668*9a0e4156SSadaf Ebrahimi break; 5669*9a0e4156SSadaf Ebrahimi case 23: 5670*9a0e4156SSadaf Ebrahimi // LD1i16, LD1i32, LD1i64, LD1i8, LD2i16, LD2i32, LD2i64, LD2i8, LD3i16, ... 5671*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 5672*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5673*9a0e4156SSadaf Ebrahimi return; 5674*9a0e4156SSadaf Ebrahimi break; 5675*9a0e4156SSadaf Ebrahimi case 24: 5676*9a0e4156SSadaf Ebrahimi // LD1i16_POST, LD2i8_POST 5677*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 5, O, 2); 5678*9a0e4156SSadaf Ebrahimi return; 5679*9a0e4156SSadaf Ebrahimi break; 5680*9a0e4156SSadaf Ebrahimi case 25: 5681*9a0e4156SSadaf Ebrahimi // LD1i32_POST, LD2i16_POST, LD4i8_POST 5682*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 5, O, 4); 5683*9a0e4156SSadaf Ebrahimi return; 5684*9a0e4156SSadaf Ebrahimi break; 5685*9a0e4156SSadaf Ebrahimi case 26: 5686*9a0e4156SSadaf Ebrahimi // LD1i64_POST, LD2i32_POST, LD4i16_POST 5687*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 5, O, 8); 5688*9a0e4156SSadaf Ebrahimi return; 5689*9a0e4156SSadaf Ebrahimi break; 5690*9a0e4156SSadaf Ebrahimi case 27: 5691*9a0e4156SSadaf Ebrahimi // LD1i8_POST 5692*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 5, O, 1); 5693*9a0e4156SSadaf Ebrahimi return; 5694*9a0e4156SSadaf Ebrahimi break; 5695*9a0e4156SSadaf Ebrahimi case 28: 5696*9a0e4156SSadaf Ebrahimi // LD2i64_POST, LD4i32_POST 5697*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 5, O, 16); 5698*9a0e4156SSadaf Ebrahimi return; 5699*9a0e4156SSadaf Ebrahimi break; 5700*9a0e4156SSadaf Ebrahimi case 29: 5701*9a0e4156SSadaf Ebrahimi // LD3Rv16b_POST, LD3Rv8b_POST 5702*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 3, O, 3); 5703*9a0e4156SSadaf Ebrahimi return; 5704*9a0e4156SSadaf Ebrahimi break; 5705*9a0e4156SSadaf Ebrahimi case 30: 5706*9a0e4156SSadaf Ebrahimi // LD3Rv2s_POST, LD3Rv4s_POST 5707*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 3, O, 12); 5708*9a0e4156SSadaf Ebrahimi return; 5709*9a0e4156SSadaf Ebrahimi break; 5710*9a0e4156SSadaf Ebrahimi case 31: 5711*9a0e4156SSadaf Ebrahimi // LD3Rv4h_POST, LD3Rv8h_POST 5712*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 3, O, 6); 5713*9a0e4156SSadaf Ebrahimi return; 5714*9a0e4156SSadaf Ebrahimi break; 5715*9a0e4156SSadaf Ebrahimi case 32: 5716*9a0e4156SSadaf Ebrahimi // LD3i16_POST 5717*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 5, O, 6); 5718*9a0e4156SSadaf Ebrahimi return; 5719*9a0e4156SSadaf Ebrahimi break; 5720*9a0e4156SSadaf Ebrahimi case 33: 5721*9a0e4156SSadaf Ebrahimi // LD3i32_POST 5722*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 5, O, 12); 5723*9a0e4156SSadaf Ebrahimi return; 5724*9a0e4156SSadaf Ebrahimi break; 5725*9a0e4156SSadaf Ebrahimi case 34: 5726*9a0e4156SSadaf Ebrahimi // LD3i64_POST 5727*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 5, O, 24); 5728*9a0e4156SSadaf Ebrahimi return; 5729*9a0e4156SSadaf Ebrahimi break; 5730*9a0e4156SSadaf Ebrahimi case 35: 5731*9a0e4156SSadaf Ebrahimi // LD3i8_POST 5732*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 5, O, 3); 5733*9a0e4156SSadaf Ebrahimi return; 5734*9a0e4156SSadaf Ebrahimi break; 5735*9a0e4156SSadaf Ebrahimi case 36: 5736*9a0e4156SSadaf Ebrahimi // LD4i64_POST 5737*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 5, O, 32); 5738*9a0e4156SSadaf Ebrahimi return; 5739*9a0e4156SSadaf Ebrahimi break; 5740*9a0e4156SSadaf Ebrahimi case 37: 5741*9a0e4156SSadaf Ebrahimi // LDARB, LDARH, LDARW, LDARX, LDAXRB, LDAXRH, LDAXRW, LDAXRX, LDRBBpost,... 5742*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 5743*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 5744*9a0e4156SSadaf Ebrahimi break; 5745*9a0e4156SSadaf Ebrahimi case 38: 5746*9a0e4156SSadaf Ebrahimi // PMULLv1i64, PMULLv2i64 5747*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".1q, "); 5748*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1Q); 5749*9a0e4156SSadaf Ebrahimi printVRegOperand(MI, 1, O); 5750*9a0e4156SSadaf Ebrahimi break; 5751*9a0e4156SSadaf Ebrahimi case 39: 5752*9a0e4156SSadaf Ebrahimi // SADALPv2i32_v1i64, SADDLPv2i32_v1i64, UADALPv2i32_v1i64, UADDLPv2i32_v... 5753*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".1d, "); 5754*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1D); 5755*9a0e4156SSadaf Ebrahimi break; 5756*9a0e4156SSadaf Ebrahimi case 40: 5757*9a0e4156SSadaf Ebrahimi // ST1i16_POST, ST1i32_POST, ST1i64_POST, ST1i8_POST, ST2i16_POST, ST2i32... 5758*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "], "); 5759*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 5760*9a0e4156SSadaf Ebrahimi break; 5761*9a0e4156SSadaf Ebrahimi } 5762*9a0e4156SSadaf Ebrahimi 5763*9a0e4156SSadaf Ebrahimi 5764*9a0e4156SSadaf Ebrahimi // Fragment 2 encoded into 5 bits for 28 unique commands. 5765*9a0e4156SSadaf Ebrahimi //printf("Frag-2: %"PRIu64"\n", (Bits >> 24) & 31); 5766*9a0e4156SSadaf Ebrahimi switch ((Bits >> 24) & 31) { 5767*9a0e4156SSadaf Ebrahimi default: // unreachable. 5768*9a0e4156SSadaf Ebrahimi case 0: 5769*9a0e4156SSadaf Ebrahimi // ABSv16i8, ABSv2i32, ABSv2i64, ABSv4i16, ABSv4i32, ABSv8i16, ABSv8i8, A... 5770*9a0e4156SSadaf Ebrahimi printVRegOperand(MI, 1, O); 5771*9a0e4156SSadaf Ebrahimi break; 5772*9a0e4156SSadaf Ebrahimi case 1: 5773*9a0e4156SSadaf Ebrahimi // ABSv1i64, ADCSWr, ADCSXr, ADCWr, ADCXr, ADDSWri, ADDSWrs, ADDSWrx, ADD... 5774*9a0e4156SSadaf Ebrahimi printOperand(MI, 1, O); 5775*9a0e4156SSadaf Ebrahimi break; 5776*9a0e4156SSadaf Ebrahimi case 2: 5777*9a0e4156SSadaf Ebrahimi // ADDHNv2i64_v4i32, ADDHNv4i32_v8i16, ADDHNv8i16_v16i8, AESDrr, AESErr, ... 5778*9a0e4156SSadaf Ebrahimi printVRegOperand(MI, 2, O); 5779*9a0e4156SSadaf Ebrahimi break; 5780*9a0e4156SSadaf Ebrahimi case 3: 5781*9a0e4156SSadaf Ebrahimi // ADRP 5782*9a0e4156SSadaf Ebrahimi printAdrpLabel(MI, 1, O); 5783*9a0e4156SSadaf Ebrahimi return; 5784*9a0e4156SSadaf Ebrahimi break; 5785*9a0e4156SSadaf Ebrahimi case 4: 5786*9a0e4156SSadaf Ebrahimi // BFMWri, BFMXri, FMLAv1i32_indexed, FMLAv1i64_indexed, FMLSv1i32_indexe... 5787*9a0e4156SSadaf Ebrahimi printOperand(MI, 2, O); 5788*9a0e4156SSadaf Ebrahimi break; 5789*9a0e4156SSadaf Ebrahimi case 5: 5790*9a0e4156SSadaf Ebrahimi // BICv2i32, BICv4i16, BICv4i32, BICv8i16, MOVKWi, MOVKXi, ORRv2i32, ORRv... 5791*9a0e4156SSadaf Ebrahimi printHexImm(MI, 2, O); 5792*9a0e4156SSadaf Ebrahimi printShifter(MI, 3, O); 5793*9a0e4156SSadaf Ebrahimi return; 5794*9a0e4156SSadaf Ebrahimi break; 5795*9a0e4156SSadaf Ebrahimi case 6: 5796*9a0e4156SSadaf Ebrahimi // CBNZW, CBNZX, CBZW, CBZX, LDRDl, LDRQl, LDRSWl, LDRSl, LDRWl, LDRXl, P... 5797*9a0e4156SSadaf Ebrahimi printAlignedLabel(MI, 1, O); 5798*9a0e4156SSadaf Ebrahimi return; 5799*9a0e4156SSadaf Ebrahimi break; 5800*9a0e4156SSadaf Ebrahimi case 7: 5801*9a0e4156SSadaf Ebrahimi // FMOVDi, FMOVSi, FMOVv2f32_ns, FMOVv2f64_ns, FMOVv4f32_ns 5802*9a0e4156SSadaf Ebrahimi printFPImmOperand(MI, 1, O); 5803*9a0e4156SSadaf Ebrahimi return; 5804*9a0e4156SSadaf Ebrahimi break; 5805*9a0e4156SSadaf Ebrahimi case 8: 5806*9a0e4156SSadaf Ebrahimi // INSvi16gpr, INSvi32gpr, INSvi64gpr, INSvi8gpr 5807*9a0e4156SSadaf Ebrahimi printOperand(MI, 3, O); 5808*9a0e4156SSadaf Ebrahimi return; 5809*9a0e4156SSadaf Ebrahimi break; 5810*9a0e4156SSadaf Ebrahimi case 9: 5811*9a0e4156SSadaf Ebrahimi // INSvi16lane, INSvi32lane, INSvi64lane, INSvi8lane 5812*9a0e4156SSadaf Ebrahimi printVRegOperand(MI, 3, O); 5813*9a0e4156SSadaf Ebrahimi break; 5814*9a0e4156SSadaf Ebrahimi case 10: 5815*9a0e4156SSadaf Ebrahimi // MOVID, MOVIv2d_ns 5816*9a0e4156SSadaf Ebrahimi printSIMDType10Operand(MI, 1, O); 5817*9a0e4156SSadaf Ebrahimi return; 5818*9a0e4156SSadaf Ebrahimi break; 5819*9a0e4156SSadaf Ebrahimi case 11: 5820*9a0e4156SSadaf Ebrahimi // MOVIv16b_ns, MOVIv2i32, MOVIv2s_msl, MOVIv4i16, MOVIv4i32, MOVIv4s_msl... 5821*9a0e4156SSadaf Ebrahimi printHexImm(MI, 1, O); 5822*9a0e4156SSadaf Ebrahimi break; 5823*9a0e4156SSadaf Ebrahimi case 12: 5824*9a0e4156SSadaf Ebrahimi // MRS 5825*9a0e4156SSadaf Ebrahimi printMRSSystemRegister(MI, 1, O); 5826*9a0e4156SSadaf Ebrahimi return; 5827*9a0e4156SSadaf Ebrahimi break; 5828*9a0e4156SSadaf Ebrahimi case 13: 5829*9a0e4156SSadaf Ebrahimi // PMULLv1i64 5830*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".1d, "); 5831*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1D); 5832*9a0e4156SSadaf Ebrahimi printVRegOperand(MI, 2, O); 5833*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".1d"); 5834*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_1D); 5835*9a0e4156SSadaf Ebrahimi return; 5836*9a0e4156SSadaf Ebrahimi break; 5837*9a0e4156SSadaf Ebrahimi case 14: 5838*9a0e4156SSadaf Ebrahimi // PMULLv2i64 5839*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".2d, "); 5840*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); 5841*9a0e4156SSadaf Ebrahimi printVRegOperand(MI, 2, O); 5842*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".2d"); 5843*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); 5844*9a0e4156SSadaf Ebrahimi return; 5845*9a0e4156SSadaf Ebrahimi break; 5846*9a0e4156SSadaf Ebrahimi case 15: 5847*9a0e4156SSadaf Ebrahimi // ST1i16_POST, ST2i8_POST 5848*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 4, O, 2); 5849*9a0e4156SSadaf Ebrahimi return; 5850*9a0e4156SSadaf Ebrahimi break; 5851*9a0e4156SSadaf Ebrahimi case 16: 5852*9a0e4156SSadaf Ebrahimi // ST1i32_POST, ST2i16_POST, ST4i8_POST 5853*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 4, O, 4); 5854*9a0e4156SSadaf Ebrahimi return; 5855*9a0e4156SSadaf Ebrahimi break; 5856*9a0e4156SSadaf Ebrahimi case 17: 5857*9a0e4156SSadaf Ebrahimi // ST1i64_POST, ST2i32_POST, ST4i16_POST 5858*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 4, O, 8); 5859*9a0e4156SSadaf Ebrahimi return; 5860*9a0e4156SSadaf Ebrahimi break; 5861*9a0e4156SSadaf Ebrahimi case 18: 5862*9a0e4156SSadaf Ebrahimi // ST1i8_POST 5863*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 4, O, 1); 5864*9a0e4156SSadaf Ebrahimi return; 5865*9a0e4156SSadaf Ebrahimi break; 5866*9a0e4156SSadaf Ebrahimi case 19: 5867*9a0e4156SSadaf Ebrahimi // ST2i64_POST, ST4i32_POST 5868*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 4, O, 16); 5869*9a0e4156SSadaf Ebrahimi return; 5870*9a0e4156SSadaf Ebrahimi break; 5871*9a0e4156SSadaf Ebrahimi case 20: 5872*9a0e4156SSadaf Ebrahimi // ST3i16_POST 5873*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 4, O, 6); 5874*9a0e4156SSadaf Ebrahimi return; 5875*9a0e4156SSadaf Ebrahimi break; 5876*9a0e4156SSadaf Ebrahimi case 21: 5877*9a0e4156SSadaf Ebrahimi // ST3i32_POST 5878*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 4, O, 12); 5879*9a0e4156SSadaf Ebrahimi return; 5880*9a0e4156SSadaf Ebrahimi break; 5881*9a0e4156SSadaf Ebrahimi case 22: 5882*9a0e4156SSadaf Ebrahimi // ST3i64_POST 5883*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 4, O, 24); 5884*9a0e4156SSadaf Ebrahimi return; 5885*9a0e4156SSadaf Ebrahimi break; 5886*9a0e4156SSadaf Ebrahimi case 23: 5887*9a0e4156SSadaf Ebrahimi // ST3i8_POST 5888*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 4, O, 3); 5889*9a0e4156SSadaf Ebrahimi return; 5890*9a0e4156SSadaf Ebrahimi break; 5891*9a0e4156SSadaf Ebrahimi case 24: 5892*9a0e4156SSadaf Ebrahimi // ST4i64_POST 5893*9a0e4156SSadaf Ebrahimi printPostIncOperand2(MI, 4, O, 32); 5894*9a0e4156SSadaf Ebrahimi return; 5895*9a0e4156SSadaf Ebrahimi break; 5896*9a0e4156SSadaf Ebrahimi case 25: 5897*9a0e4156SSadaf Ebrahimi // SYSxt 5898*9a0e4156SSadaf Ebrahimi printSysCROperand(MI, 1, O); 5899*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", "); 5900*9a0e4156SSadaf Ebrahimi printSysCROperand(MI, 2, O); 5901*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", "); 5902*9a0e4156SSadaf Ebrahimi printOperand(MI, 3, O); 5903*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", "); 5904*9a0e4156SSadaf Ebrahimi printOperand(MI, 4, O); 5905*9a0e4156SSadaf Ebrahimi return; 5906*9a0e4156SSadaf Ebrahimi break; 5907*9a0e4156SSadaf Ebrahimi case 26: 5908*9a0e4156SSadaf Ebrahimi // TBLv16i8Four, TBLv16i8One, TBLv16i8Three, TBLv16i8Two, TBLv8i8Four, TB... 5909*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 1, O, 16, 'b', MRI); 5910*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", "); 5911*9a0e4156SSadaf Ebrahimi printVRegOperand(MI, 2, O); 5912*9a0e4156SSadaf Ebrahimi break; 5913*9a0e4156SSadaf Ebrahimi case 27: 5914*9a0e4156SSadaf Ebrahimi // TBXv16i8Four, TBXv16i8One, TBXv16i8Three, TBXv16i8Two, TBXv8i8Four, TB... 5915*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, 2, O, 16, 'b', MRI); 5916*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", "); 5917*9a0e4156SSadaf Ebrahimi printVRegOperand(MI, 3, O); 5918*9a0e4156SSadaf Ebrahimi break; 5919*9a0e4156SSadaf Ebrahimi } 5920*9a0e4156SSadaf Ebrahimi 5921*9a0e4156SSadaf Ebrahimi 5922*9a0e4156SSadaf Ebrahimi // Fragment 3 encoded into 6 bits for 42 unique commands. 5923*9a0e4156SSadaf Ebrahimi //printf("Frag-3: %"PRIu64"\n", (Bits >> 29) & 63); 5924*9a0e4156SSadaf Ebrahimi switch ((Bits >> 29) & 63) { 5925*9a0e4156SSadaf Ebrahimi default: // unreachable. 5926*9a0e4156SSadaf Ebrahimi case 0: 5927*9a0e4156SSadaf Ebrahimi // ABSv16i8, ADDVv16i8v, AESDrr, AESErr, AESIMCrr, AESMCrr, CLSv16i8, CLZ... 5928*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".16b"); 5929*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B); 5930*9a0e4156SSadaf Ebrahimi return; 5931*9a0e4156SSadaf Ebrahimi break; 5932*9a0e4156SSadaf Ebrahimi case 1: 5933*9a0e4156SSadaf Ebrahimi // ABSv1i64, ADR, CLSWr, CLSXr, CLZWr, CLZXr, DUPv16i8gpr, DUPv2i32gpr, D... 5934*9a0e4156SSadaf Ebrahimi return; 5935*9a0e4156SSadaf Ebrahimi break; 5936*9a0e4156SSadaf Ebrahimi case 2: 5937*9a0e4156SSadaf Ebrahimi // ABSv2i32, CLSv2i32, CLZv2i32, FABSv2f32, FADDPv2i32p, FCVTASv2f32, FCV... 5938*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".2s"); 5939*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S); 5940*9a0e4156SSadaf Ebrahimi return; 5941*9a0e4156SSadaf Ebrahimi break; 5942*9a0e4156SSadaf Ebrahimi case 3: 5943*9a0e4156SSadaf Ebrahimi // ABSv2i64, ADDPv2i64p, FABSv2f64, FADDPv2i64p, FCVTASv2f64, FCVTAUv2f64... 5944*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".2d"); 5945*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); 5946*9a0e4156SSadaf Ebrahimi return; 5947*9a0e4156SSadaf Ebrahimi break; 5948*9a0e4156SSadaf Ebrahimi case 4: 5949*9a0e4156SSadaf Ebrahimi // ABSv4i16, ADDVv4i16v, CLSv4i16, CLZv4i16, FCVTLv4i16, NEGv4i16, REV32v... 5950*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".4h"); 5951*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H); 5952*9a0e4156SSadaf Ebrahimi return; 5953*9a0e4156SSadaf Ebrahimi break; 5954*9a0e4156SSadaf Ebrahimi case 5: 5955*9a0e4156SSadaf Ebrahimi // ABSv4i32, ADDVv4i32v, CLSv4i32, CLZv4i32, FABSv4f32, FCVTASv4f32, FCVT... 5956*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".4s"); 5957*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); 5958*9a0e4156SSadaf Ebrahimi return; 5959*9a0e4156SSadaf Ebrahimi break; 5960*9a0e4156SSadaf Ebrahimi case 6: 5961*9a0e4156SSadaf Ebrahimi // ABSv8i16, ADDVv8i16v, CLSv8i16, CLZv8i16, FCVTLv8i16, NEGv8i16, REV32v... 5962*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".8h"); 5963*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H); 5964*9a0e4156SSadaf Ebrahimi return; 5965*9a0e4156SSadaf Ebrahimi break; 5966*9a0e4156SSadaf Ebrahimi case 7: 5967*9a0e4156SSadaf Ebrahimi // ABSv8i8, ADDVv8i8v, CLSv8i8, CLZv8i8, CNTv8i8, NEGv8i8, NOTv8i8, RBITv... 5968*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".8b"); 5969*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B); 5970*9a0e4156SSadaf Ebrahimi return; 5971*9a0e4156SSadaf Ebrahimi break; 5972*9a0e4156SSadaf Ebrahimi case 8: 5973*9a0e4156SSadaf Ebrahimi // ADCSWr, ADCSXr, ADCWr, ADCXr, ADDSWri, ADDSWrs, ADDSWrx, ADDSXri, ADDS... 5974*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", "); 5975*9a0e4156SSadaf Ebrahimi break; 5976*9a0e4156SSadaf Ebrahimi case 9: 5977*9a0e4156SSadaf Ebrahimi // ADDHNv2i64_v2i32, ADDHNv2i64_v4i32, ADDPv2i64, ADDv2i64, CMEQv2i64, CM... 5978*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".2d, "); 5979*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); 5980*9a0e4156SSadaf Ebrahimi break; 5981*9a0e4156SSadaf Ebrahimi case 10: 5982*9a0e4156SSadaf Ebrahimi // ADDHNv4i32_v4i16, ADDHNv4i32_v8i16, ADDPv4i32, ADDv4i32, CMEQv4i32, CM... 5983*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".4s, "); 5984*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); 5985*9a0e4156SSadaf Ebrahimi break; 5986*9a0e4156SSadaf Ebrahimi case 11: 5987*9a0e4156SSadaf Ebrahimi // ADDHNv8i16_v16i8, ADDHNv8i16_v8i8, ADDPv8i16, ADDv8i16, CMEQv8i16, CMG... 5988*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".8h, "); 5989*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H); 5990*9a0e4156SSadaf Ebrahimi break; 5991*9a0e4156SSadaf Ebrahimi case 12: 5992*9a0e4156SSadaf Ebrahimi // ADDPv16i8, ADDv16i8, ANDv16i8, BICv16i8, BIFv16i8, BITv16i8, BSLv16i8,... 5993*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".16b, "); 5994*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B); 5995*9a0e4156SSadaf Ebrahimi break; 5996*9a0e4156SSadaf Ebrahimi case 13: 5997*9a0e4156SSadaf Ebrahimi // ADDPv2i32, ADDv2i32, CMEQv2i32, CMGEv2i32, CMGTv2i32, CMHIv2i32, CMHSv... 5998*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".2s, "); 5999*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S); 6000*9a0e4156SSadaf Ebrahimi break; 6001*9a0e4156SSadaf Ebrahimi case 14: 6002*9a0e4156SSadaf Ebrahimi // ADDPv4i16, ADDv4i16, CMEQv4i16, CMGEv4i16, CMGTv4i16, CMHIv4i16, CMHSv... 6003*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".4h, "); 6004*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H); 6005*9a0e4156SSadaf Ebrahimi break; 6006*9a0e4156SSadaf Ebrahimi case 15: 6007*9a0e4156SSadaf Ebrahimi // ADDPv8i8, ADDv8i8, ANDv8i8, BICv8i8, BIFv8i8, BITv8i8, BSLv8i8, CMEQv8... 6008*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".8b, "); 6009*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B); 6010*9a0e4156SSadaf Ebrahimi break; 6011*9a0e4156SSadaf Ebrahimi case 16: 6012*9a0e4156SSadaf Ebrahimi // CMEQv16i8rz, CMGEv16i8rz, CMGTv16i8rz, CMLEv16i8rz, CMLTv16i8rz 6013*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".16b, #0"); 6014*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B); 6015*9a0e4156SSadaf Ebrahimi arm64_op_addFP(MI, 0.0); 6016*9a0e4156SSadaf Ebrahimi return; 6017*9a0e4156SSadaf Ebrahimi break; 6018*9a0e4156SSadaf Ebrahimi case 17: 6019*9a0e4156SSadaf Ebrahimi // CMEQv1i64rz, CMGEv1i64rz, CMGTv1i64rz, CMLEv1i64rz, CMLTv1i64rz 6020*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", #0"); 6021*9a0e4156SSadaf Ebrahimi arm64_op_addImm(MI, 0); 6022*9a0e4156SSadaf Ebrahimi return; 6023*9a0e4156SSadaf Ebrahimi break; 6024*9a0e4156SSadaf Ebrahimi case 18: 6025*9a0e4156SSadaf Ebrahimi // CMEQv2i32rz, CMGEv2i32rz, CMGTv2i32rz, CMLEv2i32rz, CMLTv2i32rz 6026*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".2s, #0"); 6027*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S); 6028*9a0e4156SSadaf Ebrahimi arm64_op_addImm(MI, 0); 6029*9a0e4156SSadaf Ebrahimi return; 6030*9a0e4156SSadaf Ebrahimi break; 6031*9a0e4156SSadaf Ebrahimi case 19: 6032*9a0e4156SSadaf Ebrahimi // CMEQv2i64rz, CMGEv2i64rz, CMGTv2i64rz, CMLEv2i64rz, CMLTv2i64rz 6033*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".2d, #0"); 6034*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); 6035*9a0e4156SSadaf Ebrahimi arm64_op_addImm(MI, 0); 6036*9a0e4156SSadaf Ebrahimi return; 6037*9a0e4156SSadaf Ebrahimi break; 6038*9a0e4156SSadaf Ebrahimi case 20: 6039*9a0e4156SSadaf Ebrahimi // CMEQv4i16rz, CMGEv4i16rz, CMGTv4i16rz, CMLEv4i16rz, CMLTv4i16rz 6040*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".4h, #0"); 6041*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H); 6042*9a0e4156SSadaf Ebrahimi arm64_op_addImm(MI, 0); 6043*9a0e4156SSadaf Ebrahimi return; 6044*9a0e4156SSadaf Ebrahimi break; 6045*9a0e4156SSadaf Ebrahimi case 21: 6046*9a0e4156SSadaf Ebrahimi // CMEQv4i32rz, CMGEv4i32rz, CMGTv4i32rz, CMLEv4i32rz, CMLTv4i32rz 6047*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".4s, #0"); 6048*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); 6049*9a0e4156SSadaf Ebrahimi arm64_op_addImm(MI, 0); 6050*9a0e4156SSadaf Ebrahimi return; 6051*9a0e4156SSadaf Ebrahimi break; 6052*9a0e4156SSadaf Ebrahimi case 22: 6053*9a0e4156SSadaf Ebrahimi // CMEQv8i16rz, CMGEv8i16rz, CMGTv8i16rz, CMLEv8i16rz, CMLTv8i16rz 6054*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".8h, #0"); 6055*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H); 6056*9a0e4156SSadaf Ebrahimi arm64_op_addImm(MI, 0); 6057*9a0e4156SSadaf Ebrahimi return; 6058*9a0e4156SSadaf Ebrahimi break; 6059*9a0e4156SSadaf Ebrahimi case 23: 6060*9a0e4156SSadaf Ebrahimi // CMEQv8i8rz, CMGEv8i8rz, CMGTv8i8rz, CMLEv8i8rz, CMLTv8i8rz 6061*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".8b, #0"); 6062*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B); 6063*9a0e4156SSadaf Ebrahimi arm64_op_addImm(MI, 0); 6064*9a0e4156SSadaf Ebrahimi return; 6065*9a0e4156SSadaf Ebrahimi break; 6066*9a0e4156SSadaf Ebrahimi case 24: 6067*9a0e4156SSadaf Ebrahimi // CPYi16, DUPv4i16lane, DUPv8i16lane, INSvi16lane, SMOVvi16to32, SMOVvi1... 6068*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".h"); 6069*9a0e4156SSadaf Ebrahimi arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_H); 6070*9a0e4156SSadaf Ebrahimi break; 6071*9a0e4156SSadaf Ebrahimi case 25: 6072*9a0e4156SSadaf Ebrahimi // CPYi32, DUPv2i32lane, DUPv4i32lane, INSvi32lane, SMOVvi32to64, UMOVvi3... 6073*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".s"); 6074*9a0e4156SSadaf Ebrahimi arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_S); 6075*9a0e4156SSadaf Ebrahimi break; 6076*9a0e4156SSadaf Ebrahimi case 26: 6077*9a0e4156SSadaf Ebrahimi // CPYi64, DUPv2i64lane, FMOVDXHighr, INSvi64lane, UMOVvi64 6078*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".d"); 6079*9a0e4156SSadaf Ebrahimi arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_D); 6080*9a0e4156SSadaf Ebrahimi break; 6081*9a0e4156SSadaf Ebrahimi case 27: 6082*9a0e4156SSadaf Ebrahimi // CPYi8, DUPv16i8lane, DUPv8i8lane, INSvi8lane, SMOVvi8to32, SMOVvi8to64... 6083*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".b"); 6084*9a0e4156SSadaf Ebrahimi arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_B); 6085*9a0e4156SSadaf Ebrahimi break; 6086*9a0e4156SSadaf Ebrahimi case 28: 6087*9a0e4156SSadaf Ebrahimi // FCMEQv1i32rz, FCMEQv1i64rz, FCMGEv1i32rz, FCMGEv1i64rz, FCMGTv1i32rz, ... 6088*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", #0.0"); 6089*9a0e4156SSadaf Ebrahimi arm64_op_addFP(MI, 0.0); 6090*9a0e4156SSadaf Ebrahimi return; 6091*9a0e4156SSadaf Ebrahimi break; 6092*9a0e4156SSadaf Ebrahimi case 29: 6093*9a0e4156SSadaf Ebrahimi // FCMEQv2i32rz, FCMGEv2i32rz, FCMGTv2i32rz, FCMLEv2i32rz, FCMLTv2i32rz 6094*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".2s, #0.0"); 6095*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S); 6096*9a0e4156SSadaf Ebrahimi arm64_op_addFP(MI, 0.0); 6097*9a0e4156SSadaf Ebrahimi return; 6098*9a0e4156SSadaf Ebrahimi break; 6099*9a0e4156SSadaf Ebrahimi case 30: 6100*9a0e4156SSadaf Ebrahimi // FCMEQv2i64rz, FCMGEv2i64rz, FCMGTv2i64rz, FCMLEv2i64rz, FCMLTv2i64rz 6101*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".2d, #0.0"); 6102*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); 6103*9a0e4156SSadaf Ebrahimi arm64_op_addFP(MI, 0.0); 6104*9a0e4156SSadaf Ebrahimi return; 6105*9a0e4156SSadaf Ebrahimi break; 6106*9a0e4156SSadaf Ebrahimi case 31: 6107*9a0e4156SSadaf Ebrahimi // FCMEQv4i32rz, FCMGEv4i32rz, FCMGTv4i32rz, FCMLEv4i32rz, FCMLTv4i32rz 6108*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".4s, #0.0"); 6109*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); 6110*9a0e4156SSadaf Ebrahimi arm64_op_addFP(MI, 0.0); 6111*9a0e4156SSadaf Ebrahimi return; 6112*9a0e4156SSadaf Ebrahimi break; 6113*9a0e4156SSadaf Ebrahimi case 32: 6114*9a0e4156SSadaf Ebrahimi // LDARB, LDARH, LDARW, LDARX, LDAXRB, LDAXRH, LDAXRW, LDAXRX, LDXRB, LDX... 6115*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 6116*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6117*9a0e4156SSadaf Ebrahimi return; 6118*9a0e4156SSadaf Ebrahimi break; 6119*9a0e4156SSadaf Ebrahimi case 33: 6120*9a0e4156SSadaf Ebrahimi // LDAXPW, LDAXPX, LDNPDi, LDNPQi, LDNPSi, LDNPWi, LDNPXi, LDPDi, LDPDpos... 6121*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 6122*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 6123*9a0e4156SSadaf Ebrahimi break; 6124*9a0e4156SSadaf Ebrahimi case 34: 6125*9a0e4156SSadaf Ebrahimi // LDRBBpost, LDRBpost, LDRDpost, LDRHHpost, LDRHpost, LDRQpost, LDRSBWpo... 6126*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "], "); 6127*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6128*9a0e4156SSadaf Ebrahimi printOperand(MI, 3, O); 6129*9a0e4156SSadaf Ebrahimi return; 6130*9a0e4156SSadaf Ebrahimi break; 6131*9a0e4156SSadaf Ebrahimi case 35: 6132*9a0e4156SSadaf Ebrahimi // MOVIv2i32, MOVIv2s_msl, MOVIv4i16, MOVIv4i32, MOVIv4s_msl, MOVIv8i16, ... 6133*9a0e4156SSadaf Ebrahimi printShifter(MI, 2, O); 6134*9a0e4156SSadaf Ebrahimi return; 6135*9a0e4156SSadaf Ebrahimi break; 6136*9a0e4156SSadaf Ebrahimi case 36: 6137*9a0e4156SSadaf Ebrahimi // SHLLv16i8 6138*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".16b, #8"); 6139*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B); 6140*9a0e4156SSadaf Ebrahimi arm64_op_addImm(MI, 8); 6141*9a0e4156SSadaf Ebrahimi return; 6142*9a0e4156SSadaf Ebrahimi break; 6143*9a0e4156SSadaf Ebrahimi case 37: 6144*9a0e4156SSadaf Ebrahimi // SHLLv2i32 6145*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".2s, #32"); 6146*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S); 6147*9a0e4156SSadaf Ebrahimi arm64_op_addImm(MI, 32); 6148*9a0e4156SSadaf Ebrahimi return; 6149*9a0e4156SSadaf Ebrahimi break; 6150*9a0e4156SSadaf Ebrahimi case 38: 6151*9a0e4156SSadaf Ebrahimi // SHLLv4i16 6152*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".4h, #16"); 6153*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H); 6154*9a0e4156SSadaf Ebrahimi arm64_op_addImm(MI, 16); 6155*9a0e4156SSadaf Ebrahimi return; 6156*9a0e4156SSadaf Ebrahimi break; 6157*9a0e4156SSadaf Ebrahimi case 39: 6158*9a0e4156SSadaf Ebrahimi // SHLLv4i32 6159*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".4s, #32"); 6160*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); 6161*9a0e4156SSadaf Ebrahimi arm64_op_addImm(MI, 32); 6162*9a0e4156SSadaf Ebrahimi return; 6163*9a0e4156SSadaf Ebrahimi break; 6164*9a0e4156SSadaf Ebrahimi case 40: 6165*9a0e4156SSadaf Ebrahimi // SHLLv8i16 6166*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".8h, #16"); 6167*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H); 6168*9a0e4156SSadaf Ebrahimi arm64_op_addImm(MI, 16); 6169*9a0e4156SSadaf Ebrahimi return; 6170*9a0e4156SSadaf Ebrahimi break; 6171*9a0e4156SSadaf Ebrahimi case 41: 6172*9a0e4156SSadaf Ebrahimi // SHLLv8i8 6173*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".8b, #8"); 6174*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B); 6175*9a0e4156SSadaf Ebrahimi arm64_op_addImm(MI, 8); 6176*9a0e4156SSadaf Ebrahimi return; 6177*9a0e4156SSadaf Ebrahimi break; 6178*9a0e4156SSadaf Ebrahimi } 6179*9a0e4156SSadaf Ebrahimi 6180*9a0e4156SSadaf Ebrahimi 6181*9a0e4156SSadaf Ebrahimi // Fragment 4 encoded into 5 bits for 18 unique commands. 6182*9a0e4156SSadaf Ebrahimi //printf("Frag-4: %"PRIu64"\n", (Bits >> 35) & 31); 6183*9a0e4156SSadaf Ebrahimi switch ((Bits >> 35) & 31) { 6184*9a0e4156SSadaf Ebrahimi default: // unreachable. 6185*9a0e4156SSadaf Ebrahimi case 0: 6186*9a0e4156SSadaf Ebrahimi // ADCSWr, ADCSXr, ADCWr, ADCXr, ADDSXrx64, ADDXrx64, ADDv1i64, ASRVWr, A... 6187*9a0e4156SSadaf Ebrahimi printOperand(MI, 2, O); 6188*9a0e4156SSadaf Ebrahimi break; 6189*9a0e4156SSadaf Ebrahimi case 1: 6190*9a0e4156SSadaf Ebrahimi // ADDHNv2i64_v2i32, ADDHNv4i32_v4i16, ADDHNv8i16_v8i8, ADDPv16i8, ADDPv2... 6191*9a0e4156SSadaf Ebrahimi printVRegOperand(MI, 2, O); 6192*9a0e4156SSadaf Ebrahimi break; 6193*9a0e4156SSadaf Ebrahimi case 2: 6194*9a0e4156SSadaf Ebrahimi // ADDHNv2i64_v4i32, ADDHNv4i32_v8i16, ADDHNv8i16_v16i8, BITv16i8, BITv8i... 6195*9a0e4156SSadaf Ebrahimi printVRegOperand(MI, 3, O); 6196*9a0e4156SSadaf Ebrahimi break; 6197*9a0e4156SSadaf Ebrahimi case 3: 6198*9a0e4156SSadaf Ebrahimi // ADDSWri, ADDSXri, ADDWri, ADDXri, SUBSWri, SUBSXri, SUBWri, SUBXri 6199*9a0e4156SSadaf Ebrahimi printAddSubImm(MI, 2, O); 6200*9a0e4156SSadaf Ebrahimi return; 6201*9a0e4156SSadaf Ebrahimi break; 6202*9a0e4156SSadaf Ebrahimi case 4: 6203*9a0e4156SSadaf Ebrahimi // ADDSWrs, ADDSXrs, ADDWrs, ADDXrs, ANDSWrs, ANDSXrs, ANDWrs, ANDXrs, BI... 6204*9a0e4156SSadaf Ebrahimi printShiftedRegister(MI, 2, O); 6205*9a0e4156SSadaf Ebrahimi return; 6206*9a0e4156SSadaf Ebrahimi break; 6207*9a0e4156SSadaf Ebrahimi case 5: 6208*9a0e4156SSadaf Ebrahimi // ADDSWrx, ADDSXrx, ADDWrx, ADDXrx, SUBSWrx, SUBSXrx, SUBWrx, SUBXrx 6209*9a0e4156SSadaf Ebrahimi printExtendedRegister(MI, 2, O); 6210*9a0e4156SSadaf Ebrahimi return; 6211*9a0e4156SSadaf Ebrahimi break; 6212*9a0e4156SSadaf Ebrahimi case 6: 6213*9a0e4156SSadaf Ebrahimi // ANDSWri, ANDWri, EORWri, ORRWri 6214*9a0e4156SSadaf Ebrahimi printLogicalImm32(MI, 2, O); 6215*9a0e4156SSadaf Ebrahimi return; 6216*9a0e4156SSadaf Ebrahimi break; 6217*9a0e4156SSadaf Ebrahimi case 7: 6218*9a0e4156SSadaf Ebrahimi // ANDSXri, ANDXri, EORXri, ORRXri 6219*9a0e4156SSadaf Ebrahimi printLogicalImm64(MI, 2, O); 6220*9a0e4156SSadaf Ebrahimi return; 6221*9a0e4156SSadaf Ebrahimi break; 6222*9a0e4156SSadaf Ebrahimi case 8: 6223*9a0e4156SSadaf Ebrahimi // BFMWri, BFMXri, LDPDpost, LDPDpre, LDPQpost, LDPQpre, LDPSWpost, LDPSW... 6224*9a0e4156SSadaf Ebrahimi printOperand(MI, 3, O); 6225*9a0e4156SSadaf Ebrahimi break; 6226*9a0e4156SSadaf Ebrahimi case 9: 6227*9a0e4156SSadaf Ebrahimi // CPYi16, CPYi32, CPYi64, CPYi8, DUPv16i8lane, DUPv2i32lane, DUPv2i64lan... 6228*9a0e4156SSadaf Ebrahimi printVectorIndex(MI, 2, O); 6229*9a0e4156SSadaf Ebrahimi return; 6230*9a0e4156SSadaf Ebrahimi break; 6231*9a0e4156SSadaf Ebrahimi case 10: 6232*9a0e4156SSadaf Ebrahimi // INSvi16lane, INSvi32lane, INSvi64lane, INSvi8lane 6233*9a0e4156SSadaf Ebrahimi printVectorIndex(MI, 4, O); 6234*9a0e4156SSadaf Ebrahimi return; 6235*9a0e4156SSadaf Ebrahimi break; 6236*9a0e4156SSadaf Ebrahimi case 11: 6237*9a0e4156SSadaf Ebrahimi // LDRBBui, LDRBui, LDRSBWui, LDRSBXui, STRBBui, STRBui 6238*9a0e4156SSadaf Ebrahimi printUImm12Offset2(MI, 2, O, 1); 6239*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 6240*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6241*9a0e4156SSadaf Ebrahimi return; 6242*9a0e4156SSadaf Ebrahimi break; 6243*9a0e4156SSadaf Ebrahimi case 12: 6244*9a0e4156SSadaf Ebrahimi // LDRDui, LDRXui, PRFMui, STRDui, STRXui 6245*9a0e4156SSadaf Ebrahimi printUImm12Offset2(MI, 2, O, 8); 6246*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 6247*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6248*9a0e4156SSadaf Ebrahimi return; 6249*9a0e4156SSadaf Ebrahimi break; 6250*9a0e4156SSadaf Ebrahimi case 13: 6251*9a0e4156SSadaf Ebrahimi // LDRHHui, LDRHui, LDRSHWui, LDRSHXui, STRHHui, STRHui 6252*9a0e4156SSadaf Ebrahimi printUImm12Offset2(MI, 2, O, 2); 6253*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 6254*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6255*9a0e4156SSadaf Ebrahimi return; 6256*9a0e4156SSadaf Ebrahimi break; 6257*9a0e4156SSadaf Ebrahimi case 14: 6258*9a0e4156SSadaf Ebrahimi // LDRQui, STRQui 6259*9a0e4156SSadaf Ebrahimi printUImm12Offset2(MI, 2, O, 16); 6260*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 6261*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6262*9a0e4156SSadaf Ebrahimi return; 6263*9a0e4156SSadaf Ebrahimi break; 6264*9a0e4156SSadaf Ebrahimi case 15: 6265*9a0e4156SSadaf Ebrahimi // LDRSWui, LDRSui, LDRWui, STRSui, STRWui 6266*9a0e4156SSadaf Ebrahimi printUImm12Offset2(MI, 2, O, 4); 6267*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 6268*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6269*9a0e4156SSadaf Ebrahimi return; 6270*9a0e4156SSadaf Ebrahimi break; 6271*9a0e4156SSadaf Ebrahimi case 16: 6272*9a0e4156SSadaf Ebrahimi // SYSLxt 6273*9a0e4156SSadaf Ebrahimi printSysCROperand(MI, 2, O); 6274*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", "); 6275*9a0e4156SSadaf Ebrahimi printSysCROperand(MI, 3, O); 6276*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", "); 6277*9a0e4156SSadaf Ebrahimi printOperand(MI, 4, O); 6278*9a0e4156SSadaf Ebrahimi return; 6279*9a0e4156SSadaf Ebrahimi break; 6280*9a0e4156SSadaf Ebrahimi case 17: 6281*9a0e4156SSadaf Ebrahimi // TBNZW, TBNZX, TBZW, TBZX 6282*9a0e4156SSadaf Ebrahimi printAlignedLabel(MI, 2, O); 6283*9a0e4156SSadaf Ebrahimi return; 6284*9a0e4156SSadaf Ebrahimi break; 6285*9a0e4156SSadaf Ebrahimi } 6286*9a0e4156SSadaf Ebrahimi 6287*9a0e4156SSadaf Ebrahimi 6288*9a0e4156SSadaf Ebrahimi // Fragment 5 encoded into 5 bits for 19 unique commands. 6289*9a0e4156SSadaf Ebrahimi //printf("Frag-5: %"PRIu64"\n", (Bits >> 40) & 31); 6290*9a0e4156SSadaf Ebrahimi switch ((Bits >> 40) & 31) { 6291*9a0e4156SSadaf Ebrahimi default: // unreachable. 6292*9a0e4156SSadaf Ebrahimi case 0: 6293*9a0e4156SSadaf Ebrahimi // ADCSWr, ADCSXr, ADCWr, ADCXr, ADDv1i64, ASRVWr, ASRVXr, CMEQv1i64, CMG... 6294*9a0e4156SSadaf Ebrahimi return; 6295*9a0e4156SSadaf Ebrahimi break; 6296*9a0e4156SSadaf Ebrahimi case 1: 6297*9a0e4156SSadaf Ebrahimi // ADDHNv2i64_v2i32, ADDHNv2i64_v4i32, ADDPv2i64, ADDv2i64, CMEQv2i64, CM... 6298*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".2d"); 6299*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2D); 6300*9a0e4156SSadaf Ebrahimi return; 6301*9a0e4156SSadaf Ebrahimi break; 6302*9a0e4156SSadaf Ebrahimi case 2: 6303*9a0e4156SSadaf Ebrahimi // ADDHNv4i32_v4i16, ADDHNv4i32_v8i16, ADDPv4i32, ADDv4i32, CMEQv4i32, CM... 6304*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".4s"); 6305*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4S); 6306*9a0e4156SSadaf Ebrahimi return; 6307*9a0e4156SSadaf Ebrahimi break; 6308*9a0e4156SSadaf Ebrahimi case 3: 6309*9a0e4156SSadaf Ebrahimi // ADDHNv8i16_v16i8, ADDHNv8i16_v8i8, ADDPv8i16, ADDv8i16, CMEQv8i16, CMG... 6310*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".8h"); 6311*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8H); 6312*9a0e4156SSadaf Ebrahimi return; 6313*9a0e4156SSadaf Ebrahimi break; 6314*9a0e4156SSadaf Ebrahimi case 4: 6315*9a0e4156SSadaf Ebrahimi // ADDPv16i8, ADDv16i8, ANDv16i8, BICv16i8, BIFv16i8, BITv16i8, BSLv16i8,... 6316*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".16b"); 6317*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B); 6318*9a0e4156SSadaf Ebrahimi return; 6319*9a0e4156SSadaf Ebrahimi break; 6320*9a0e4156SSadaf Ebrahimi case 5: 6321*9a0e4156SSadaf Ebrahimi // ADDPv2i32, ADDv2i32, CMEQv2i32, CMGEv2i32, CMGTv2i32, CMHIv2i32, CMHSv... 6322*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".2s"); 6323*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_2S); 6324*9a0e4156SSadaf Ebrahimi return; 6325*9a0e4156SSadaf Ebrahimi break; 6326*9a0e4156SSadaf Ebrahimi case 6: 6327*9a0e4156SSadaf Ebrahimi // ADDPv4i16, ADDv4i16, CMEQv4i16, CMGEv4i16, CMGTv4i16, CMHIv4i16, CMHSv... 6328*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".4h"); 6329*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_4H); 6330*9a0e4156SSadaf Ebrahimi return; 6331*9a0e4156SSadaf Ebrahimi break; 6332*9a0e4156SSadaf Ebrahimi case 7: 6333*9a0e4156SSadaf Ebrahimi // ADDPv8i8, ADDv8i8, ANDv8i8, BICv8i8, BIFv8i8, BITv8i8, BSLv8i8, CMEQv8... 6334*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".8b"); 6335*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B); 6336*9a0e4156SSadaf Ebrahimi return; 6337*9a0e4156SSadaf Ebrahimi break; 6338*9a0e4156SSadaf Ebrahimi case 8: 6339*9a0e4156SSadaf Ebrahimi // ADDSXrx64, ADDXrx64, SUBSXrx64, SUBXrx64 6340*9a0e4156SSadaf Ebrahimi printArithExtend(MI, 3, O); 6341*9a0e4156SSadaf Ebrahimi return; 6342*9a0e4156SSadaf Ebrahimi break; 6343*9a0e4156SSadaf Ebrahimi case 9: 6344*9a0e4156SSadaf Ebrahimi // BFMWri, BFMXri, CCMNWi, CCMNWr, CCMNXi, CCMNXr, CCMPWi, CCMPWr, CCMPXi... 6345*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", "); 6346*9a0e4156SSadaf Ebrahimi break; 6347*9a0e4156SSadaf Ebrahimi case 10: 6348*9a0e4156SSadaf Ebrahimi // EXTv16i8 6349*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".16b, "); 6350*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_16B); 6351*9a0e4156SSadaf Ebrahimi printOperand(MI, 3, O); 6352*9a0e4156SSadaf Ebrahimi return; 6353*9a0e4156SSadaf Ebrahimi break; 6354*9a0e4156SSadaf Ebrahimi case 11: 6355*9a0e4156SSadaf Ebrahimi // EXTv8i8 6356*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".8b, "); 6357*9a0e4156SSadaf Ebrahimi arm64_op_addVectorArrSpecifier(MI, ARM64_VAS_8B); 6358*9a0e4156SSadaf Ebrahimi printOperand(MI, 3, O); 6359*9a0e4156SSadaf Ebrahimi return; 6360*9a0e4156SSadaf Ebrahimi break; 6361*9a0e4156SSadaf Ebrahimi case 12: 6362*9a0e4156SSadaf Ebrahimi // FMLAv1i32_indexed, FMLAv2i32_indexed, FMLAv4i32_indexed, FMLSv1i32_ind... 6363*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".s"); 6364*9a0e4156SSadaf Ebrahimi arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_S); 6365*9a0e4156SSadaf Ebrahimi break; 6366*9a0e4156SSadaf Ebrahimi case 13: 6367*9a0e4156SSadaf Ebrahimi // FMLAv1i64_indexed, FMLAv2i64_indexed, FMLSv1i64_indexed, FMLSv2i64_ind... 6368*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".d"); 6369*9a0e4156SSadaf Ebrahimi arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_D); 6370*9a0e4156SSadaf Ebrahimi break; 6371*9a0e4156SSadaf Ebrahimi case 14: 6372*9a0e4156SSadaf Ebrahimi // LDAXPW, LDAXPX, LDTRBi, LDTRHi, LDTRSBWi, LDTRSBXi, LDTRSHWi, LDTRSHXi... 6373*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 6374*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6375*9a0e4156SSadaf Ebrahimi return; 6376*9a0e4156SSadaf Ebrahimi break; 6377*9a0e4156SSadaf Ebrahimi case 15: 6378*9a0e4156SSadaf Ebrahimi // LDPDpost, LDPQpost, LDPSWpost, LDPSpost, LDPWpost, LDPXpost, STPDpost,... 6379*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "], "); 6380*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6381*9a0e4156SSadaf Ebrahimi break; 6382*9a0e4156SSadaf Ebrahimi case 16: 6383*9a0e4156SSadaf Ebrahimi // LDRBBpre, LDRBpre, LDRDpre, LDRHHpre, LDRHpre, LDRQpre, LDRSBWpre, LDR... 6384*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]!"); 6385*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6386*9a0e4156SSadaf Ebrahimi return; 6387*9a0e4156SSadaf Ebrahimi break; 6388*9a0e4156SSadaf Ebrahimi case 17: 6389*9a0e4156SSadaf Ebrahimi // MLAv4i16_indexed, MLAv8i16_indexed, MLSv4i16_indexed, MLSv8i16_indexed... 6390*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ".h"); 6391*9a0e4156SSadaf Ebrahimi arm64_op_addVectorElementSizeSpecifier(MI, ARM64_VESS_H); 6392*9a0e4156SSadaf Ebrahimi break; 6393*9a0e4156SSadaf Ebrahimi case 18: 6394*9a0e4156SSadaf Ebrahimi // STLXPW, STLXPX, STXPW, STXPX 6395*9a0e4156SSadaf Ebrahimi SStream_concat0(O, ", ["); 6396*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 6397*9a0e4156SSadaf Ebrahimi printOperand(MI, 3, O); 6398*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 6399*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6400*9a0e4156SSadaf Ebrahimi return; 6401*9a0e4156SSadaf Ebrahimi break; 6402*9a0e4156SSadaf Ebrahimi } 6403*9a0e4156SSadaf Ebrahimi 6404*9a0e4156SSadaf Ebrahimi 6405*9a0e4156SSadaf Ebrahimi // Fragment 6 encoded into 5 bits for 21 unique commands. 6406*9a0e4156SSadaf Ebrahimi //printf("Frag-6: %"PRIu64"\n", (Bits >> 45) & 31); 6407*9a0e4156SSadaf Ebrahimi switch ((Bits >> 45) & 31) { 6408*9a0e4156SSadaf Ebrahimi default: // unreachable. 6409*9a0e4156SSadaf Ebrahimi case 0: 6410*9a0e4156SSadaf Ebrahimi // BFMWri, BFMXri 6411*9a0e4156SSadaf Ebrahimi printOperand(MI, 4, O); 6412*9a0e4156SSadaf Ebrahimi return; 6413*9a0e4156SSadaf Ebrahimi break; 6414*9a0e4156SSadaf Ebrahimi case 1: 6415*9a0e4156SSadaf Ebrahimi // CCMNWi, CCMNWr, CCMNXi, CCMNXr, CCMPWi, CCMPWr, CCMPXi, CCMPXr, CSELWr... 6416*9a0e4156SSadaf Ebrahimi printCondCode(MI, 3, O); 6417*9a0e4156SSadaf Ebrahimi return; 6418*9a0e4156SSadaf Ebrahimi break; 6419*9a0e4156SSadaf Ebrahimi case 2: 6420*9a0e4156SSadaf Ebrahimi // EXTRWrri, EXTRXrri, FMADDDrrr, FMADDSrrr, FMSUBDrrr, FMSUBSrrr, FNMADD... 6421*9a0e4156SSadaf Ebrahimi printOperand(MI, 3, O); 6422*9a0e4156SSadaf Ebrahimi return; 6423*9a0e4156SSadaf Ebrahimi break; 6424*9a0e4156SSadaf Ebrahimi case 3: 6425*9a0e4156SSadaf Ebrahimi // FMLAv1i32_indexed, FMLAv1i64_indexed, FMLAv2i32_indexed, FMLAv2i64_ind... 6426*9a0e4156SSadaf Ebrahimi printVectorIndex(MI, 4, O); 6427*9a0e4156SSadaf Ebrahimi return; 6428*9a0e4156SSadaf Ebrahimi break; 6429*9a0e4156SSadaf Ebrahimi case 4: 6430*9a0e4156SSadaf Ebrahimi // FMULXv1i32_indexed, FMULXv1i64_indexed, FMULXv2i32_indexed, FMULXv2i64... 6431*9a0e4156SSadaf Ebrahimi printVectorIndex(MI, 3, O); 6432*9a0e4156SSadaf Ebrahimi return; 6433*9a0e4156SSadaf Ebrahimi break; 6434*9a0e4156SSadaf Ebrahimi case 5: 6435*9a0e4156SSadaf Ebrahimi // LDNPDi, LDNPXi, LDPDi, LDPXi, STNPDi, STNPXi, STPDi, STPXi 6436*9a0e4156SSadaf Ebrahimi printImmScale(MI, 3, O, 8); 6437*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 6438*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6439*9a0e4156SSadaf Ebrahimi return; 6440*9a0e4156SSadaf Ebrahimi break; 6441*9a0e4156SSadaf Ebrahimi case 6: 6442*9a0e4156SSadaf Ebrahimi // LDNPQi, LDPQi, STNPQi, STPQi 6443*9a0e4156SSadaf Ebrahimi printImmScale(MI, 3, O, 16); 6444*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 6445*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6446*9a0e4156SSadaf Ebrahimi return; 6447*9a0e4156SSadaf Ebrahimi break; 6448*9a0e4156SSadaf Ebrahimi case 7: 6449*9a0e4156SSadaf Ebrahimi // LDNPSi, LDNPWi, LDPSWi, LDPSi, LDPWi, STNPSi, STNPWi, STPSi, STPWi 6450*9a0e4156SSadaf Ebrahimi printImmScale(MI, 3, O, 4); 6451*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 6452*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6453*9a0e4156SSadaf Ebrahimi return; 6454*9a0e4156SSadaf Ebrahimi break; 6455*9a0e4156SSadaf Ebrahimi case 8: 6456*9a0e4156SSadaf Ebrahimi // LDPDpost, LDPDpre, LDPXpost, LDPXpre, STPDpost, STPDpre, STPXpost, STP... 6457*9a0e4156SSadaf Ebrahimi printImmScale(MI, 4, O, 8); 6458*9a0e4156SSadaf Ebrahimi break; 6459*9a0e4156SSadaf Ebrahimi case 9: 6460*9a0e4156SSadaf Ebrahimi // LDPQpost, LDPQpre, STPQpost, STPQpre 6461*9a0e4156SSadaf Ebrahimi printImmScale(MI, 4, O, 16); 6462*9a0e4156SSadaf Ebrahimi break; 6463*9a0e4156SSadaf Ebrahimi case 10: 6464*9a0e4156SSadaf Ebrahimi // LDPSWpost, LDPSWpre, LDPSpost, LDPSpre, LDPWpost, LDPWpre, STPSpost, S... 6465*9a0e4156SSadaf Ebrahimi printImmScale(MI, 4, O, 4); 6466*9a0e4156SSadaf Ebrahimi break; 6467*9a0e4156SSadaf Ebrahimi case 11: 6468*9a0e4156SSadaf Ebrahimi // LDRBBroW, LDRBroW, LDRSBWroW, LDRSBXroW, STRBBroW, STRBroW 6469*9a0e4156SSadaf Ebrahimi printMemExtend(MI, 3, O, 'w', 8); 6470*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 6471*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6472*9a0e4156SSadaf Ebrahimi return; 6473*9a0e4156SSadaf Ebrahimi break; 6474*9a0e4156SSadaf Ebrahimi case 12: 6475*9a0e4156SSadaf Ebrahimi // LDRBBroX, LDRBroX, LDRSBWroX, LDRSBXroX, STRBBroX, STRBroX 6476*9a0e4156SSadaf Ebrahimi printMemExtend(MI, 3, O, 'x', 8); 6477*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 6478*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6479*9a0e4156SSadaf Ebrahimi return; 6480*9a0e4156SSadaf Ebrahimi break; 6481*9a0e4156SSadaf Ebrahimi case 13: 6482*9a0e4156SSadaf Ebrahimi // LDRDroW, LDRXroW, PRFMroW, STRDroW, STRXroW 6483*9a0e4156SSadaf Ebrahimi printMemExtend(MI, 3, O, 'w', 64); 6484*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 6485*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6486*9a0e4156SSadaf Ebrahimi return; 6487*9a0e4156SSadaf Ebrahimi break; 6488*9a0e4156SSadaf Ebrahimi case 14: 6489*9a0e4156SSadaf Ebrahimi // LDRDroX, LDRXroX, PRFMroX, STRDroX, STRXroX 6490*9a0e4156SSadaf Ebrahimi printMemExtend(MI, 3, O, 'x', 64); 6491*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 6492*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6493*9a0e4156SSadaf Ebrahimi return; 6494*9a0e4156SSadaf Ebrahimi break; 6495*9a0e4156SSadaf Ebrahimi case 15: 6496*9a0e4156SSadaf Ebrahimi // LDRHHroW, LDRHroW, LDRSHWroW, LDRSHXroW, STRHHroW, STRHroW 6497*9a0e4156SSadaf Ebrahimi printMemExtend(MI, 3, O, 'w', 16); 6498*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 6499*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6500*9a0e4156SSadaf Ebrahimi return; 6501*9a0e4156SSadaf Ebrahimi break; 6502*9a0e4156SSadaf Ebrahimi case 16: 6503*9a0e4156SSadaf Ebrahimi // LDRHHroX, LDRHroX, LDRSHWroX, LDRSHXroX, STRHHroX, STRHroX 6504*9a0e4156SSadaf Ebrahimi printMemExtend(MI, 3, O, 'x', 16); 6505*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 6506*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6507*9a0e4156SSadaf Ebrahimi return; 6508*9a0e4156SSadaf Ebrahimi break; 6509*9a0e4156SSadaf Ebrahimi case 17: 6510*9a0e4156SSadaf Ebrahimi // LDRQroW, STRQroW 6511*9a0e4156SSadaf Ebrahimi printMemExtend(MI, 3, O, 'w', 128); 6512*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 6513*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6514*9a0e4156SSadaf Ebrahimi return; 6515*9a0e4156SSadaf Ebrahimi break; 6516*9a0e4156SSadaf Ebrahimi case 18: 6517*9a0e4156SSadaf Ebrahimi // LDRQroX, STRQroX 6518*9a0e4156SSadaf Ebrahimi printMemExtend(MI, 3, O, 'x', 128); 6519*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 6520*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6521*9a0e4156SSadaf Ebrahimi return; 6522*9a0e4156SSadaf Ebrahimi break; 6523*9a0e4156SSadaf Ebrahimi case 19: 6524*9a0e4156SSadaf Ebrahimi // LDRSWroW, LDRSroW, LDRWroW, STRSroW, STRWroW 6525*9a0e4156SSadaf Ebrahimi printMemExtend(MI, 3, O, 'w', 32); 6526*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 6527*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6528*9a0e4156SSadaf Ebrahimi return; 6529*9a0e4156SSadaf Ebrahimi break; 6530*9a0e4156SSadaf Ebrahimi case 20: 6531*9a0e4156SSadaf Ebrahimi // LDRSWroX, LDRSroX, LDRWroX, STRSroX, STRWroX 6532*9a0e4156SSadaf Ebrahimi printMemExtend(MI, 3, O, 'x', 32); 6533*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]"); 6534*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6535*9a0e4156SSadaf Ebrahimi return; 6536*9a0e4156SSadaf Ebrahimi break; 6537*9a0e4156SSadaf Ebrahimi } 6538*9a0e4156SSadaf Ebrahimi 6539*9a0e4156SSadaf Ebrahimi 6540*9a0e4156SSadaf Ebrahimi // Fragment 7 encoded into 1 bits for 2 unique commands. 6541*9a0e4156SSadaf Ebrahimi //printf("Frag-7: %"PRIu64"\n", (Bits >> 50) & 1); 6542*9a0e4156SSadaf Ebrahimi if ((Bits >> 50) & 1) { 6543*9a0e4156SSadaf Ebrahimi // LDPDpre, LDPQpre, LDPSWpre, LDPSpre, LDPWpre, LDPXpre, STPDpre, STPQpr... 6544*9a0e4156SSadaf Ebrahimi SStream_concat0(O, "]!"); 6545*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 6546*9a0e4156SSadaf Ebrahimi return; 6547*9a0e4156SSadaf Ebrahimi } else { 6548*9a0e4156SSadaf Ebrahimi // LDPDpost, LDPQpost, LDPSWpost, LDPSpost, LDPWpost, LDPXpost, STPDpost,... 6549*9a0e4156SSadaf Ebrahimi return; 6550*9a0e4156SSadaf Ebrahimi } 6551*9a0e4156SSadaf Ebrahimi} 6552*9a0e4156SSadaf Ebrahimi 6553*9a0e4156SSadaf Ebrahimi 6554*9a0e4156SSadaf Ebrahimi/// getRegisterName - This method is automatically generated by tblgen 6555*9a0e4156SSadaf Ebrahimi/// from the register set description. This returns the assembler name 6556*9a0e4156SSadaf Ebrahimi/// for the specified register. 6557*9a0e4156SSadaf Ebrahimistatic const char *getRegisterName(unsigned RegNo, int AltIdx) 6558*9a0e4156SSadaf Ebrahimi{ 6559*9a0e4156SSadaf Ebrahimi // assert(RegNo && RegNo < 420 && "Invalid register number!"); 6560*9a0e4156SSadaf Ebrahimi 6561*9a0e4156SSadaf Ebrahimi#ifndef CAPSTONE_DIET 6562*9a0e4156SSadaf Ebrahimi static const char AsmStrsNoRegAltName[] = { 6563*9a0e4156SSadaf Ebrahimi /* 0 */ 'D', '7', '_', 'D', '8', '_', 'D', '9', '_', 'D', '1', '0', 0, 6564*9a0e4156SSadaf Ebrahimi /* 13 */ 'Q', '7', '_', 'Q', '8', '_', 'Q', '9', '_', 'Q', '1', '0', 0, 6565*9a0e4156SSadaf Ebrahimi /* 26 */ 'b', '1', '0', 0, 6566*9a0e4156SSadaf Ebrahimi /* 30 */ 'd', '1', '0', 0, 6567*9a0e4156SSadaf Ebrahimi /* 34 */ 'h', '1', '0', 0, 6568*9a0e4156SSadaf Ebrahimi /* 38 */ 'q', '1', '0', 0, 6569*9a0e4156SSadaf Ebrahimi /* 42 */ 's', '1', '0', 0, 6570*9a0e4156SSadaf Ebrahimi /* 46 */ 'w', '1', '0', 0, 6571*9a0e4156SSadaf Ebrahimi /* 50 */ 'x', '1', '0', 0, 6572*9a0e4156SSadaf Ebrahimi /* 54 */ 'D', '1', '7', '_', 'D', '1', '8', '_', 'D', '1', '9', '_', 'D', '2', '0', 0, 6573*9a0e4156SSadaf Ebrahimi /* 70 */ 'Q', '1', '7', '_', 'Q', '1', '8', '_', 'Q', '1', '9', '_', 'Q', '2', '0', 0, 6574*9a0e4156SSadaf Ebrahimi /* 86 */ 'b', '2', '0', 0, 6575*9a0e4156SSadaf Ebrahimi /* 90 */ 'd', '2', '0', 0, 6576*9a0e4156SSadaf Ebrahimi /* 94 */ 'h', '2', '0', 0, 6577*9a0e4156SSadaf Ebrahimi /* 98 */ 'q', '2', '0', 0, 6578*9a0e4156SSadaf Ebrahimi /* 102 */ 's', '2', '0', 0, 6579*9a0e4156SSadaf Ebrahimi /* 106 */ 'w', '2', '0', 0, 6580*9a0e4156SSadaf Ebrahimi /* 110 */ 'x', '2', '0', 0, 6581*9a0e4156SSadaf Ebrahimi /* 114 */ 'D', '2', '7', '_', 'D', '2', '8', '_', 'D', '2', '9', '_', 'D', '3', '0', 0, 6582*9a0e4156SSadaf Ebrahimi /* 130 */ 'Q', '2', '7', '_', 'Q', '2', '8', '_', 'Q', '2', '9', '_', 'Q', '3', '0', 0, 6583*9a0e4156SSadaf Ebrahimi /* 146 */ 'b', '3', '0', 0, 6584*9a0e4156SSadaf Ebrahimi /* 150 */ 'd', '3', '0', 0, 6585*9a0e4156SSadaf Ebrahimi /* 154 */ 'h', '3', '0', 0, 6586*9a0e4156SSadaf Ebrahimi /* 158 */ 'q', '3', '0', 0, 6587*9a0e4156SSadaf Ebrahimi /* 162 */ 's', '3', '0', 0, 6588*9a0e4156SSadaf Ebrahimi /* 166 */ 'w', '3', '0', 0, 6589*9a0e4156SSadaf Ebrahimi /* 170 */ 'x', '3', '0', 0, 6590*9a0e4156SSadaf Ebrahimi /* 174 */ 'D', '2', '9', '_', 'D', '3', '0', '_', 'D', '3', '1', '_', 'D', '0', 0, 6591*9a0e4156SSadaf Ebrahimi /* 189 */ 'Q', '2', '9', '_', 'Q', '3', '0', '_', 'Q', '3', '1', '_', 'Q', '0', 0, 6592*9a0e4156SSadaf Ebrahimi /* 204 */ 'b', '0', 0, 6593*9a0e4156SSadaf Ebrahimi /* 207 */ 'd', '0', 0, 6594*9a0e4156SSadaf Ebrahimi /* 210 */ 'h', '0', 0, 6595*9a0e4156SSadaf Ebrahimi /* 213 */ 'q', '0', 0, 6596*9a0e4156SSadaf Ebrahimi /* 216 */ 's', '0', 0, 6597*9a0e4156SSadaf Ebrahimi /* 219 */ 'w', '0', 0, 6598*9a0e4156SSadaf Ebrahimi /* 222 */ 'x', '0', 0, 6599*9a0e4156SSadaf Ebrahimi /* 225 */ 'D', '8', '_', 'D', '9', '_', 'D', '1', '0', '_', 'D', '1', '1', 0, 6600*9a0e4156SSadaf Ebrahimi /* 239 */ 'Q', '8', '_', 'Q', '9', '_', 'Q', '1', '0', '_', 'Q', '1', '1', 0, 6601*9a0e4156SSadaf Ebrahimi /* 253 */ 'b', '1', '1', 0, 6602*9a0e4156SSadaf Ebrahimi /* 257 */ 'd', '1', '1', 0, 6603*9a0e4156SSadaf Ebrahimi /* 261 */ 'h', '1', '1', 0, 6604*9a0e4156SSadaf Ebrahimi /* 265 */ 'q', '1', '1', 0, 6605*9a0e4156SSadaf Ebrahimi /* 269 */ 's', '1', '1', 0, 6606*9a0e4156SSadaf Ebrahimi /* 273 */ 'w', '1', '1', 0, 6607*9a0e4156SSadaf Ebrahimi /* 277 */ 'x', '1', '1', 0, 6608*9a0e4156SSadaf Ebrahimi /* 281 */ 'D', '1', '8', '_', 'D', '1', '9', '_', 'D', '2', '0', '_', 'D', '2', '1', 0, 6609*9a0e4156SSadaf Ebrahimi /* 297 */ 'Q', '1', '8', '_', 'Q', '1', '9', '_', 'Q', '2', '0', '_', 'Q', '2', '1', 0, 6610*9a0e4156SSadaf Ebrahimi /* 313 */ 'b', '2', '1', 0, 6611*9a0e4156SSadaf Ebrahimi /* 317 */ 'd', '2', '1', 0, 6612*9a0e4156SSadaf Ebrahimi /* 321 */ 'h', '2', '1', 0, 6613*9a0e4156SSadaf Ebrahimi /* 325 */ 'q', '2', '1', 0, 6614*9a0e4156SSadaf Ebrahimi /* 329 */ 's', '2', '1', 0, 6615*9a0e4156SSadaf Ebrahimi /* 333 */ 'w', '2', '1', 0, 6616*9a0e4156SSadaf Ebrahimi /* 337 */ 'x', '2', '1', 0, 6617*9a0e4156SSadaf Ebrahimi /* 341 */ 'D', '2', '8', '_', 'D', '2', '9', '_', 'D', '3', '0', '_', 'D', '3', '1', 0, 6618*9a0e4156SSadaf Ebrahimi /* 357 */ 'Q', '2', '8', '_', 'Q', '2', '9', '_', 'Q', '3', '0', '_', 'Q', '3', '1', 0, 6619*9a0e4156SSadaf Ebrahimi /* 373 */ 'b', '3', '1', 0, 6620*9a0e4156SSadaf Ebrahimi /* 377 */ 'd', '3', '1', 0, 6621*9a0e4156SSadaf Ebrahimi /* 381 */ 'h', '3', '1', 0, 6622*9a0e4156SSadaf Ebrahimi /* 385 */ 'q', '3', '1', 0, 6623*9a0e4156SSadaf Ebrahimi /* 389 */ 's', '3', '1', 0, 6624*9a0e4156SSadaf Ebrahimi /* 393 */ 'D', '3', '0', '_', 'D', '3', '1', '_', 'D', '0', '_', 'D', '1', 0, 6625*9a0e4156SSadaf Ebrahimi /* 407 */ 'Q', '3', '0', '_', 'Q', '3', '1', '_', 'Q', '0', '_', 'Q', '1', 0, 6626*9a0e4156SSadaf Ebrahimi /* 421 */ 'b', '1', 0, 6627*9a0e4156SSadaf Ebrahimi /* 424 */ 'd', '1', 0, 6628*9a0e4156SSadaf Ebrahimi /* 427 */ 'h', '1', 0, 6629*9a0e4156SSadaf Ebrahimi /* 430 */ 'q', '1', 0, 6630*9a0e4156SSadaf Ebrahimi /* 433 */ 's', '1', 0, 6631*9a0e4156SSadaf Ebrahimi /* 436 */ 'w', '1', 0, 6632*9a0e4156SSadaf Ebrahimi /* 439 */ 'x', '1', 0, 6633*9a0e4156SSadaf Ebrahimi /* 442 */ 'D', '9', '_', 'D', '1', '0', '_', 'D', '1', '1', '_', 'D', '1', '2', 0, 6634*9a0e4156SSadaf Ebrahimi /* 457 */ 'Q', '9', '_', 'Q', '1', '0', '_', 'Q', '1', '1', '_', 'Q', '1', '2', 0, 6635*9a0e4156SSadaf Ebrahimi /* 472 */ 'b', '1', '2', 0, 6636*9a0e4156SSadaf Ebrahimi /* 476 */ 'd', '1', '2', 0, 6637*9a0e4156SSadaf Ebrahimi /* 480 */ 'h', '1', '2', 0, 6638*9a0e4156SSadaf Ebrahimi /* 484 */ 'q', '1', '2', 0, 6639*9a0e4156SSadaf Ebrahimi /* 488 */ 's', '1', '2', 0, 6640*9a0e4156SSadaf Ebrahimi /* 492 */ 'w', '1', '2', 0, 6641*9a0e4156SSadaf Ebrahimi /* 496 */ 'x', '1', '2', 0, 6642*9a0e4156SSadaf Ebrahimi /* 500 */ 'D', '1', '9', '_', 'D', '2', '0', '_', 'D', '2', '1', '_', 'D', '2', '2', 0, 6643*9a0e4156SSadaf Ebrahimi /* 516 */ 'Q', '1', '9', '_', 'Q', '2', '0', '_', 'Q', '2', '1', '_', 'Q', '2', '2', 0, 6644*9a0e4156SSadaf Ebrahimi /* 532 */ 'b', '2', '2', 0, 6645*9a0e4156SSadaf Ebrahimi /* 536 */ 'd', '2', '2', 0, 6646*9a0e4156SSadaf Ebrahimi /* 540 */ 'h', '2', '2', 0, 6647*9a0e4156SSadaf Ebrahimi /* 544 */ 'q', '2', '2', 0, 6648*9a0e4156SSadaf Ebrahimi /* 548 */ 's', '2', '2', 0, 6649*9a0e4156SSadaf Ebrahimi /* 552 */ 'w', '2', '2', 0, 6650*9a0e4156SSadaf Ebrahimi /* 556 */ 'x', '2', '2', 0, 6651*9a0e4156SSadaf Ebrahimi /* 560 */ 'D', '3', '1', '_', 'D', '0', '_', 'D', '1', '_', 'D', '2', 0, 6652*9a0e4156SSadaf Ebrahimi /* 573 */ 'Q', '3', '1', '_', 'Q', '0', '_', 'Q', '1', '_', 'Q', '2', 0, 6653*9a0e4156SSadaf Ebrahimi /* 586 */ 'b', '2', 0, 6654*9a0e4156SSadaf Ebrahimi /* 589 */ 'd', '2', 0, 6655*9a0e4156SSadaf Ebrahimi /* 592 */ 'h', '2', 0, 6656*9a0e4156SSadaf Ebrahimi /* 595 */ 'q', '2', 0, 6657*9a0e4156SSadaf Ebrahimi /* 598 */ 's', '2', 0, 6658*9a0e4156SSadaf Ebrahimi /* 601 */ 'w', '2', 0, 6659*9a0e4156SSadaf Ebrahimi /* 604 */ 'x', '2', 0, 6660*9a0e4156SSadaf Ebrahimi /* 607 */ 'D', '1', '0', '_', 'D', '1', '1', '_', 'D', '1', '2', '_', 'D', '1', '3', 0, 6661*9a0e4156SSadaf Ebrahimi /* 623 */ 'Q', '1', '0', '_', 'Q', '1', '1', '_', 'Q', '1', '2', '_', 'Q', '1', '3', 0, 6662*9a0e4156SSadaf Ebrahimi /* 639 */ 'b', '1', '3', 0, 6663*9a0e4156SSadaf Ebrahimi /* 643 */ 'd', '1', '3', 0, 6664*9a0e4156SSadaf Ebrahimi /* 647 */ 'h', '1', '3', 0, 6665*9a0e4156SSadaf Ebrahimi /* 651 */ 'q', '1', '3', 0, 6666*9a0e4156SSadaf Ebrahimi /* 655 */ 's', '1', '3', 0, 6667*9a0e4156SSadaf Ebrahimi /* 659 */ 'w', '1', '3', 0, 6668*9a0e4156SSadaf Ebrahimi /* 663 */ 'x', '1', '3', 0, 6669*9a0e4156SSadaf Ebrahimi /* 667 */ 'D', '2', '0', '_', 'D', '2', '1', '_', 'D', '2', '2', '_', 'D', '2', '3', 0, 6670*9a0e4156SSadaf Ebrahimi /* 683 */ 'Q', '2', '0', '_', 'Q', '2', '1', '_', 'Q', '2', '2', '_', 'Q', '2', '3', 0, 6671*9a0e4156SSadaf Ebrahimi /* 699 */ 'b', '2', '3', 0, 6672*9a0e4156SSadaf Ebrahimi /* 703 */ 'd', '2', '3', 0, 6673*9a0e4156SSadaf Ebrahimi /* 707 */ 'h', '2', '3', 0, 6674*9a0e4156SSadaf Ebrahimi /* 711 */ 'q', '2', '3', 0, 6675*9a0e4156SSadaf Ebrahimi /* 715 */ 's', '2', '3', 0, 6676*9a0e4156SSadaf Ebrahimi /* 719 */ 'w', '2', '3', 0, 6677*9a0e4156SSadaf Ebrahimi /* 723 */ 'x', '2', '3', 0, 6678*9a0e4156SSadaf Ebrahimi /* 727 */ 'D', '0', '_', 'D', '1', '_', 'D', '2', '_', 'D', '3', 0, 6679*9a0e4156SSadaf Ebrahimi /* 739 */ 'Q', '0', '_', 'Q', '1', '_', 'Q', '2', '_', 'Q', '3', 0, 6680*9a0e4156SSadaf Ebrahimi /* 751 */ 'b', '3', 0, 6681*9a0e4156SSadaf Ebrahimi /* 754 */ 'd', '3', 0, 6682*9a0e4156SSadaf Ebrahimi /* 757 */ 'h', '3', 0, 6683*9a0e4156SSadaf Ebrahimi /* 760 */ 'q', '3', 0, 6684*9a0e4156SSadaf Ebrahimi /* 763 */ 's', '3', 0, 6685*9a0e4156SSadaf Ebrahimi /* 766 */ 'w', '3', 0, 6686*9a0e4156SSadaf Ebrahimi /* 769 */ 'x', '3', 0, 6687*9a0e4156SSadaf Ebrahimi /* 772 */ 'D', '1', '1', '_', 'D', '1', '2', '_', 'D', '1', '3', '_', 'D', '1', '4', 0, 6688*9a0e4156SSadaf Ebrahimi /* 788 */ 'Q', '1', '1', '_', 'Q', '1', '2', '_', 'Q', '1', '3', '_', 'Q', '1', '4', 0, 6689*9a0e4156SSadaf Ebrahimi /* 804 */ 'b', '1', '4', 0, 6690*9a0e4156SSadaf Ebrahimi /* 808 */ 'd', '1', '4', 0, 6691*9a0e4156SSadaf Ebrahimi /* 812 */ 'h', '1', '4', 0, 6692*9a0e4156SSadaf Ebrahimi /* 816 */ 'q', '1', '4', 0, 6693*9a0e4156SSadaf Ebrahimi /* 820 */ 's', '1', '4', 0, 6694*9a0e4156SSadaf Ebrahimi /* 824 */ 'w', '1', '4', 0, 6695*9a0e4156SSadaf Ebrahimi /* 828 */ 'x', '1', '4', 0, 6696*9a0e4156SSadaf Ebrahimi /* 832 */ 'D', '2', '1', '_', 'D', '2', '2', '_', 'D', '2', '3', '_', 'D', '2', '4', 0, 6697*9a0e4156SSadaf Ebrahimi /* 848 */ 'Q', '2', '1', '_', 'Q', '2', '2', '_', 'Q', '2', '3', '_', 'Q', '2', '4', 0, 6698*9a0e4156SSadaf Ebrahimi /* 864 */ 'b', '2', '4', 0, 6699*9a0e4156SSadaf Ebrahimi /* 868 */ 'd', '2', '4', 0, 6700*9a0e4156SSadaf Ebrahimi /* 872 */ 'h', '2', '4', 0, 6701*9a0e4156SSadaf Ebrahimi /* 876 */ 'q', '2', '4', 0, 6702*9a0e4156SSadaf Ebrahimi /* 880 */ 's', '2', '4', 0, 6703*9a0e4156SSadaf Ebrahimi /* 884 */ 'w', '2', '4', 0, 6704*9a0e4156SSadaf Ebrahimi /* 888 */ 'x', '2', '4', 0, 6705*9a0e4156SSadaf Ebrahimi /* 892 */ 'D', '1', '_', 'D', '2', '_', 'D', '3', '_', 'D', '4', 0, 6706*9a0e4156SSadaf Ebrahimi /* 904 */ 'Q', '1', '_', 'Q', '2', '_', 'Q', '3', '_', 'Q', '4', 0, 6707*9a0e4156SSadaf Ebrahimi /* 916 */ 'b', '4', 0, 6708*9a0e4156SSadaf Ebrahimi /* 919 */ 'd', '4', 0, 6709*9a0e4156SSadaf Ebrahimi /* 922 */ 'h', '4', 0, 6710*9a0e4156SSadaf Ebrahimi /* 925 */ 'q', '4', 0, 6711*9a0e4156SSadaf Ebrahimi /* 928 */ 's', '4', 0, 6712*9a0e4156SSadaf Ebrahimi /* 931 */ 'w', '4', 0, 6713*9a0e4156SSadaf Ebrahimi /* 934 */ 'x', '4', 0, 6714*9a0e4156SSadaf Ebrahimi /* 937 */ 'D', '1', '2', '_', 'D', '1', '3', '_', 'D', '1', '4', '_', 'D', '1', '5', 0, 6715*9a0e4156SSadaf Ebrahimi /* 953 */ 'Q', '1', '2', '_', 'Q', '1', '3', '_', 'Q', '1', '4', '_', 'Q', '1', '5', 0, 6716*9a0e4156SSadaf Ebrahimi /* 969 */ 'b', '1', '5', 0, 6717*9a0e4156SSadaf Ebrahimi /* 973 */ 'd', '1', '5', 0, 6718*9a0e4156SSadaf Ebrahimi /* 977 */ 'h', '1', '5', 0, 6719*9a0e4156SSadaf Ebrahimi /* 981 */ 'q', '1', '5', 0, 6720*9a0e4156SSadaf Ebrahimi /* 985 */ 's', '1', '5', 0, 6721*9a0e4156SSadaf Ebrahimi /* 989 */ 'w', '1', '5', 0, 6722*9a0e4156SSadaf Ebrahimi /* 993 */ 'x', '1', '5', 0, 6723*9a0e4156SSadaf Ebrahimi /* 997 */ 'D', '2', '2', '_', 'D', '2', '3', '_', 'D', '2', '4', '_', 'D', '2', '5', 0, 6724*9a0e4156SSadaf Ebrahimi /* 1013 */ 'Q', '2', '2', '_', 'Q', '2', '3', '_', 'Q', '2', '4', '_', 'Q', '2', '5', 0, 6725*9a0e4156SSadaf Ebrahimi /* 1029 */ 'b', '2', '5', 0, 6726*9a0e4156SSadaf Ebrahimi /* 1033 */ 'd', '2', '5', 0, 6727*9a0e4156SSadaf Ebrahimi /* 1037 */ 'h', '2', '5', 0, 6728*9a0e4156SSadaf Ebrahimi /* 1041 */ 'q', '2', '5', 0, 6729*9a0e4156SSadaf Ebrahimi /* 1045 */ 's', '2', '5', 0, 6730*9a0e4156SSadaf Ebrahimi /* 1049 */ 'w', '2', '5', 0, 6731*9a0e4156SSadaf Ebrahimi /* 1053 */ 'x', '2', '5', 0, 6732*9a0e4156SSadaf Ebrahimi /* 1057 */ 'D', '2', '_', 'D', '3', '_', 'D', '4', '_', 'D', '5', 0, 6733*9a0e4156SSadaf Ebrahimi /* 1069 */ 'Q', '2', '_', 'Q', '3', '_', 'Q', '4', '_', 'Q', '5', 0, 6734*9a0e4156SSadaf Ebrahimi /* 1081 */ 'b', '5', 0, 6735*9a0e4156SSadaf Ebrahimi /* 1084 */ 'd', '5', 0, 6736*9a0e4156SSadaf Ebrahimi /* 1087 */ 'h', '5', 0, 6737*9a0e4156SSadaf Ebrahimi /* 1090 */ 'q', '5', 0, 6738*9a0e4156SSadaf Ebrahimi /* 1093 */ 's', '5', 0, 6739*9a0e4156SSadaf Ebrahimi /* 1096 */ 'w', '5', 0, 6740*9a0e4156SSadaf Ebrahimi /* 1099 */ 'x', '5', 0, 6741*9a0e4156SSadaf Ebrahimi /* 1102 */ 'D', '1', '3', '_', 'D', '1', '4', '_', 'D', '1', '5', '_', 'D', '1', '6', 0, 6742*9a0e4156SSadaf Ebrahimi /* 1118 */ 'Q', '1', '3', '_', 'Q', '1', '4', '_', 'Q', '1', '5', '_', 'Q', '1', '6', 0, 6743*9a0e4156SSadaf Ebrahimi /* 1134 */ 'b', '1', '6', 0, 6744*9a0e4156SSadaf Ebrahimi /* 1138 */ 'd', '1', '6', 0, 6745*9a0e4156SSadaf Ebrahimi /* 1142 */ 'h', '1', '6', 0, 6746*9a0e4156SSadaf Ebrahimi /* 1146 */ 'q', '1', '6', 0, 6747*9a0e4156SSadaf Ebrahimi /* 1150 */ 's', '1', '6', 0, 6748*9a0e4156SSadaf Ebrahimi /* 1154 */ 'w', '1', '6', 0, 6749*9a0e4156SSadaf Ebrahimi /* 1158 */ 'x', '1', '6', 0, 6750*9a0e4156SSadaf Ebrahimi /* 1162 */ 'D', '2', '3', '_', 'D', '2', '4', '_', 'D', '2', '5', '_', 'D', '2', '6', 0, 6751*9a0e4156SSadaf Ebrahimi /* 1178 */ 'Q', '2', '3', '_', 'Q', '2', '4', '_', 'Q', '2', '5', '_', 'Q', '2', '6', 0, 6752*9a0e4156SSadaf Ebrahimi /* 1194 */ 'b', '2', '6', 0, 6753*9a0e4156SSadaf Ebrahimi /* 1198 */ 'd', '2', '6', 0, 6754*9a0e4156SSadaf Ebrahimi /* 1202 */ 'h', '2', '6', 0, 6755*9a0e4156SSadaf Ebrahimi /* 1206 */ 'q', '2', '6', 0, 6756*9a0e4156SSadaf Ebrahimi /* 1210 */ 's', '2', '6', 0, 6757*9a0e4156SSadaf Ebrahimi /* 1214 */ 'w', '2', '6', 0, 6758*9a0e4156SSadaf Ebrahimi /* 1218 */ 'x', '2', '6', 0, 6759*9a0e4156SSadaf Ebrahimi /* 1222 */ 'D', '3', '_', 'D', '4', '_', 'D', '5', '_', 'D', '6', 0, 6760*9a0e4156SSadaf Ebrahimi /* 1234 */ 'Q', '3', '_', 'Q', '4', '_', 'Q', '5', '_', 'Q', '6', 0, 6761*9a0e4156SSadaf Ebrahimi /* 1246 */ 'b', '6', 0, 6762*9a0e4156SSadaf Ebrahimi /* 1249 */ 'd', '6', 0, 6763*9a0e4156SSadaf Ebrahimi /* 1252 */ 'h', '6', 0, 6764*9a0e4156SSadaf Ebrahimi /* 1255 */ 'q', '6', 0, 6765*9a0e4156SSadaf Ebrahimi /* 1258 */ 's', '6', 0, 6766*9a0e4156SSadaf Ebrahimi /* 1261 */ 'w', '6', 0, 6767*9a0e4156SSadaf Ebrahimi /* 1264 */ 'x', '6', 0, 6768*9a0e4156SSadaf Ebrahimi /* 1267 */ 'D', '1', '4', '_', 'D', '1', '5', '_', 'D', '1', '6', '_', 'D', '1', '7', 0, 6769*9a0e4156SSadaf Ebrahimi /* 1283 */ 'Q', '1', '4', '_', 'Q', '1', '5', '_', 'Q', '1', '6', '_', 'Q', '1', '7', 0, 6770*9a0e4156SSadaf Ebrahimi /* 1299 */ 'b', '1', '7', 0, 6771*9a0e4156SSadaf Ebrahimi /* 1303 */ 'd', '1', '7', 0, 6772*9a0e4156SSadaf Ebrahimi /* 1307 */ 'h', '1', '7', 0, 6773*9a0e4156SSadaf Ebrahimi /* 1311 */ 'q', '1', '7', 0, 6774*9a0e4156SSadaf Ebrahimi /* 1315 */ 's', '1', '7', 0, 6775*9a0e4156SSadaf Ebrahimi /* 1319 */ 'w', '1', '7', 0, 6776*9a0e4156SSadaf Ebrahimi /* 1323 */ 'x', '1', '7', 0, 6777*9a0e4156SSadaf Ebrahimi /* 1327 */ 'D', '2', '4', '_', 'D', '2', '5', '_', 'D', '2', '6', '_', 'D', '2', '7', 0, 6778*9a0e4156SSadaf Ebrahimi /* 1343 */ 'Q', '2', '4', '_', 'Q', '2', '5', '_', 'Q', '2', '6', '_', 'Q', '2', '7', 0, 6779*9a0e4156SSadaf Ebrahimi /* 1359 */ 'b', '2', '7', 0, 6780*9a0e4156SSadaf Ebrahimi /* 1363 */ 'd', '2', '7', 0, 6781*9a0e4156SSadaf Ebrahimi /* 1367 */ 'h', '2', '7', 0, 6782*9a0e4156SSadaf Ebrahimi /* 1371 */ 'q', '2', '7', 0, 6783*9a0e4156SSadaf Ebrahimi /* 1375 */ 's', '2', '7', 0, 6784*9a0e4156SSadaf Ebrahimi /* 1379 */ 'w', '2', '7', 0, 6785*9a0e4156SSadaf Ebrahimi /* 1383 */ 'x', '2', '7', 0, 6786*9a0e4156SSadaf Ebrahimi /* 1387 */ 'D', '4', '_', 'D', '5', '_', 'D', '6', '_', 'D', '7', 0, 6787*9a0e4156SSadaf Ebrahimi /* 1399 */ 'Q', '4', '_', 'Q', '5', '_', 'Q', '6', '_', 'Q', '7', 0, 6788*9a0e4156SSadaf Ebrahimi /* 1411 */ 'b', '7', 0, 6789*9a0e4156SSadaf Ebrahimi /* 1414 */ 'd', '7', 0, 6790*9a0e4156SSadaf Ebrahimi /* 1417 */ 'h', '7', 0, 6791*9a0e4156SSadaf Ebrahimi /* 1420 */ 'q', '7', 0, 6792*9a0e4156SSadaf Ebrahimi /* 1423 */ 's', '7', 0, 6793*9a0e4156SSadaf Ebrahimi /* 1426 */ 'w', '7', 0, 6794*9a0e4156SSadaf Ebrahimi /* 1429 */ 'x', '7', 0, 6795*9a0e4156SSadaf Ebrahimi /* 1432 */ 'D', '1', '5', '_', 'D', '1', '6', '_', 'D', '1', '7', '_', 'D', '1', '8', 0, 6796*9a0e4156SSadaf Ebrahimi /* 1448 */ 'Q', '1', '5', '_', 'Q', '1', '6', '_', 'Q', '1', '7', '_', 'Q', '1', '8', 0, 6797*9a0e4156SSadaf Ebrahimi /* 1464 */ 'b', '1', '8', 0, 6798*9a0e4156SSadaf Ebrahimi /* 1468 */ 'd', '1', '8', 0, 6799*9a0e4156SSadaf Ebrahimi /* 1472 */ 'h', '1', '8', 0, 6800*9a0e4156SSadaf Ebrahimi /* 1476 */ 'q', '1', '8', 0, 6801*9a0e4156SSadaf Ebrahimi /* 1480 */ 's', '1', '8', 0, 6802*9a0e4156SSadaf Ebrahimi /* 1484 */ 'w', '1', '8', 0, 6803*9a0e4156SSadaf Ebrahimi /* 1488 */ 'x', '1', '8', 0, 6804*9a0e4156SSadaf Ebrahimi /* 1492 */ 'D', '2', '5', '_', 'D', '2', '6', '_', 'D', '2', '7', '_', 'D', '2', '8', 0, 6805*9a0e4156SSadaf Ebrahimi /* 1508 */ 'Q', '2', '5', '_', 'Q', '2', '6', '_', 'Q', '2', '7', '_', 'Q', '2', '8', 0, 6806*9a0e4156SSadaf Ebrahimi /* 1524 */ 'b', '2', '8', 0, 6807*9a0e4156SSadaf Ebrahimi /* 1528 */ 'd', '2', '8', 0, 6808*9a0e4156SSadaf Ebrahimi /* 1532 */ 'h', '2', '8', 0, 6809*9a0e4156SSadaf Ebrahimi /* 1536 */ 'q', '2', '8', 0, 6810*9a0e4156SSadaf Ebrahimi /* 1540 */ 's', '2', '8', 0, 6811*9a0e4156SSadaf Ebrahimi /* 1544 */ 'w', '2', '8', 0, 6812*9a0e4156SSadaf Ebrahimi /* 1548 */ 'x', '2', '8', 0, 6813*9a0e4156SSadaf Ebrahimi /* 1552 */ 'D', '5', '_', 'D', '6', '_', 'D', '7', '_', 'D', '8', 0, 6814*9a0e4156SSadaf Ebrahimi /* 1564 */ 'Q', '5', '_', 'Q', '6', '_', 'Q', '7', '_', 'Q', '8', 0, 6815*9a0e4156SSadaf Ebrahimi /* 1576 */ 'b', '8', 0, 6816*9a0e4156SSadaf Ebrahimi /* 1579 */ 'd', '8', 0, 6817*9a0e4156SSadaf Ebrahimi /* 1582 */ 'h', '8', 0, 6818*9a0e4156SSadaf Ebrahimi /* 1585 */ 'q', '8', 0, 6819*9a0e4156SSadaf Ebrahimi /* 1588 */ 's', '8', 0, 6820*9a0e4156SSadaf Ebrahimi /* 1591 */ 'w', '8', 0, 6821*9a0e4156SSadaf Ebrahimi /* 1594 */ 'x', '8', 0, 6822*9a0e4156SSadaf Ebrahimi /* 1597 */ 'D', '1', '6', '_', 'D', '1', '7', '_', 'D', '1', '8', '_', 'D', '1', '9', 0, 6823*9a0e4156SSadaf Ebrahimi /* 1613 */ 'Q', '1', '6', '_', 'Q', '1', '7', '_', 'Q', '1', '8', '_', 'Q', '1', '9', 0, 6824*9a0e4156SSadaf Ebrahimi /* 1629 */ 'b', '1', '9', 0, 6825*9a0e4156SSadaf Ebrahimi /* 1633 */ 'd', '1', '9', 0, 6826*9a0e4156SSadaf Ebrahimi /* 1637 */ 'h', '1', '9', 0, 6827*9a0e4156SSadaf Ebrahimi /* 1641 */ 'q', '1', '9', 0, 6828*9a0e4156SSadaf Ebrahimi /* 1645 */ 's', '1', '9', 0, 6829*9a0e4156SSadaf Ebrahimi /* 1649 */ 'w', '1', '9', 0, 6830*9a0e4156SSadaf Ebrahimi /* 1653 */ 'x', '1', '9', 0, 6831*9a0e4156SSadaf Ebrahimi /* 1657 */ 'D', '2', '6', '_', 'D', '2', '7', '_', 'D', '2', '8', '_', 'D', '2', '9', 0, 6832*9a0e4156SSadaf Ebrahimi /* 1673 */ 'Q', '2', '6', '_', 'Q', '2', '7', '_', 'Q', '2', '8', '_', 'Q', '2', '9', 0, 6833*9a0e4156SSadaf Ebrahimi /* 1689 */ 'b', '2', '9', 0, 6834*9a0e4156SSadaf Ebrahimi /* 1693 */ 'd', '2', '9', 0, 6835*9a0e4156SSadaf Ebrahimi /* 1697 */ 'h', '2', '9', 0, 6836*9a0e4156SSadaf Ebrahimi /* 1701 */ 'q', '2', '9', 0, 6837*9a0e4156SSadaf Ebrahimi /* 1705 */ 's', '2', '9', 0, 6838*9a0e4156SSadaf Ebrahimi /* 1709 */ 'w', '2', '9', 0, 6839*9a0e4156SSadaf Ebrahimi /* 1713 */ 'x', '2', '9', 0, 6840*9a0e4156SSadaf Ebrahimi /* 1717 */ 'D', '6', '_', 'D', '7', '_', 'D', '8', '_', 'D', '9', 0, 6841*9a0e4156SSadaf Ebrahimi /* 1729 */ 'Q', '6', '_', 'Q', '7', '_', 'Q', '8', '_', 'Q', '9', 0, 6842*9a0e4156SSadaf Ebrahimi /* 1741 */ 'b', '9', 0, 6843*9a0e4156SSadaf Ebrahimi /* 1744 */ 'd', '9', 0, 6844*9a0e4156SSadaf Ebrahimi /* 1747 */ 'h', '9', 0, 6845*9a0e4156SSadaf Ebrahimi /* 1750 */ 'q', '9', 0, 6846*9a0e4156SSadaf Ebrahimi /* 1753 */ 's', '9', 0, 6847*9a0e4156SSadaf Ebrahimi /* 1756 */ 'w', '9', 0, 6848*9a0e4156SSadaf Ebrahimi /* 1759 */ 'x', '9', 0, 6849*9a0e4156SSadaf Ebrahimi /* 1762 */ 'w', 's', 'p', 0, 6850*9a0e4156SSadaf Ebrahimi /* 1766 */ 'w', 'z', 'r', 0, 6851*9a0e4156SSadaf Ebrahimi /* 1770 */ 'x', 'z', 'r', 0, 6852*9a0e4156SSadaf Ebrahimi /* 1774 */ 'n', 'z', 'c', 'v', 0, 6853*9a0e4156SSadaf Ebrahimi }; 6854*9a0e4156SSadaf Ebrahimi 6855*9a0e4156SSadaf Ebrahimi static const uint16_t RegAsmOffsetNoRegAltName[] = { 6856*9a0e4156SSadaf Ebrahimi 1713, 170, 1774, 1763, 1762, 1766, 1770, 204, 421, 586, 751, 916, 1081, 1246, 6857*9a0e4156SSadaf Ebrahimi 1411, 1576, 1741, 26, 253, 472, 639, 804, 969, 1134, 1299, 1464, 1629, 86, 6858*9a0e4156SSadaf Ebrahimi 313, 532, 699, 864, 1029, 1194, 1359, 1524, 1689, 146, 373, 207, 424, 589, 6859*9a0e4156SSadaf Ebrahimi 754, 919, 1084, 1249, 1414, 1579, 1744, 30, 257, 476, 643, 808, 973, 1138, 6860*9a0e4156SSadaf Ebrahimi 1303, 1468, 1633, 90, 317, 536, 703, 868, 1033, 1198, 1363, 1528, 1693, 150, 6861*9a0e4156SSadaf Ebrahimi 377, 210, 427, 592, 757, 922, 1087, 1252, 1417, 1582, 1747, 34, 261, 480, 6862*9a0e4156SSadaf Ebrahimi 647, 812, 977, 1142, 1307, 1472, 1637, 94, 321, 540, 707, 872, 1037, 1202, 6863*9a0e4156SSadaf Ebrahimi 1367, 1532, 1697, 154, 381, 213, 430, 595, 760, 925, 1090, 1255, 1420, 1585, 6864*9a0e4156SSadaf Ebrahimi 1750, 38, 265, 484, 651, 816, 981, 1146, 1311, 1476, 1641, 98, 325, 544, 6865*9a0e4156SSadaf Ebrahimi 711, 876, 1041, 1206, 1371, 1536, 1701, 158, 385, 216, 433, 598, 763, 928, 6866*9a0e4156SSadaf Ebrahimi 1093, 1258, 1423, 1588, 1753, 42, 269, 488, 655, 820, 985, 1150, 1315, 1480, 6867*9a0e4156SSadaf Ebrahimi 1645, 102, 329, 548, 715, 880, 1045, 1210, 1375, 1540, 1705, 162, 389, 219, 6868*9a0e4156SSadaf Ebrahimi 436, 601, 766, 931, 1096, 1261, 1426, 1591, 1756, 46, 273, 492, 659, 824, 6869*9a0e4156SSadaf Ebrahimi 989, 1154, 1319, 1484, 1649, 106, 333, 552, 719, 884, 1049, 1214, 1379, 1544, 6870*9a0e4156SSadaf Ebrahimi 1709, 166, 222, 439, 604, 769, 934, 1099, 1264, 1429, 1594, 1759, 50, 277, 6871*9a0e4156SSadaf Ebrahimi 496, 663, 828, 993, 1158, 1323, 1488, 1653, 110, 337, 556, 723, 888, 1053, 6872*9a0e4156SSadaf Ebrahimi 1218, 1383, 1548, 401, 567, 733, 898, 1063, 1228, 1393, 1558, 1723, 6, 231, 6873*9a0e4156SSadaf Ebrahimi 449, 615, 780, 945, 1110, 1275, 1440, 1605, 62, 289, 508, 675, 840, 1005, 6874*9a0e4156SSadaf Ebrahimi 1170, 1335, 1500, 1665, 122, 349, 182, 727, 892, 1057, 1222, 1387, 1552, 1717, 6875*9a0e4156SSadaf Ebrahimi 0, 225, 442, 607, 772, 937, 1102, 1267, 1432, 1597, 54, 281, 500, 667, 6876*9a0e4156SSadaf Ebrahimi 832, 997, 1162, 1327, 1492, 1657, 114, 341, 174, 393, 560, 564, 730, 895, 6877*9a0e4156SSadaf Ebrahimi 1060, 1225, 1390, 1555, 1720, 3, 228, 445, 611, 776, 941, 1106, 1271, 1436, 6878*9a0e4156SSadaf Ebrahimi 1601, 58, 285, 504, 671, 836, 1001, 1166, 1331, 1496, 1661, 118, 345, 178, 6879*9a0e4156SSadaf Ebrahimi 397, 415, 580, 745, 910, 1075, 1240, 1405, 1570, 1735, 19, 245, 464, 631, 6880*9a0e4156SSadaf Ebrahimi 796, 961, 1126, 1291, 1456, 1621, 78, 305, 524, 691, 856, 1021, 1186, 1351, 6881*9a0e4156SSadaf Ebrahimi 1516, 1681, 138, 365, 197, 739, 904, 1069, 1234, 1399, 1564, 1729, 13, 239, 6882*9a0e4156SSadaf Ebrahimi 457, 623, 788, 953, 1118, 1283, 1448, 1613, 70, 297, 516, 683, 848, 1013, 6883*9a0e4156SSadaf Ebrahimi 1178, 1343, 1508, 1673, 130, 357, 189, 407, 573, 577, 742, 907, 1072, 1237, 6884*9a0e4156SSadaf Ebrahimi 1402, 1567, 1732, 16, 242, 460, 627, 792, 957, 1122, 1287, 1452, 1617, 74, 6885*9a0e4156SSadaf Ebrahimi 301, 520, 687, 852, 1017, 1182, 1347, 1512, 1677, 134, 361, 193, 411, 6886*9a0e4156SSadaf Ebrahimi }; 6887*9a0e4156SSadaf Ebrahimi 6888*9a0e4156SSadaf Ebrahimi static const char AsmStrsvreg[] = { 6889*9a0e4156SSadaf Ebrahimi /* 0 */ 'v', '1', '0', 0, 6890*9a0e4156SSadaf Ebrahimi /* 4 */ 'v', '2', '0', 0, 6891*9a0e4156SSadaf Ebrahimi /* 8 */ 'v', '3', '0', 0, 6892*9a0e4156SSadaf Ebrahimi /* 12 */ 'v', '0', 0, 6893*9a0e4156SSadaf Ebrahimi /* 15 */ 'v', '1', '1', 0, 6894*9a0e4156SSadaf Ebrahimi /* 19 */ 'v', '2', '1', 0, 6895*9a0e4156SSadaf Ebrahimi /* 23 */ 'v', '3', '1', 0, 6896*9a0e4156SSadaf Ebrahimi /* 27 */ 'v', '1', 0, 6897*9a0e4156SSadaf Ebrahimi /* 30 */ 'v', '1', '2', 0, 6898*9a0e4156SSadaf Ebrahimi /* 34 */ 'v', '2', '2', 0, 6899*9a0e4156SSadaf Ebrahimi /* 38 */ 'v', '2', 0, 6900*9a0e4156SSadaf Ebrahimi /* 41 */ 'v', '1', '3', 0, 6901*9a0e4156SSadaf Ebrahimi /* 45 */ 'v', '2', '3', 0, 6902*9a0e4156SSadaf Ebrahimi /* 49 */ 'v', '3', 0, 6903*9a0e4156SSadaf Ebrahimi /* 52 */ 'v', '1', '4', 0, 6904*9a0e4156SSadaf Ebrahimi /* 56 */ 'v', '2', '4', 0, 6905*9a0e4156SSadaf Ebrahimi /* 60 */ 'v', '4', 0, 6906*9a0e4156SSadaf Ebrahimi /* 63 */ 'v', '1', '5', 0, 6907*9a0e4156SSadaf Ebrahimi /* 67 */ 'v', '2', '5', 0, 6908*9a0e4156SSadaf Ebrahimi /* 71 */ 'v', '5', 0, 6909*9a0e4156SSadaf Ebrahimi /* 74 */ 'v', '1', '6', 0, 6910*9a0e4156SSadaf Ebrahimi /* 78 */ 'v', '2', '6', 0, 6911*9a0e4156SSadaf Ebrahimi /* 82 */ 'v', '6', 0, 6912*9a0e4156SSadaf Ebrahimi /* 85 */ 'v', '1', '7', 0, 6913*9a0e4156SSadaf Ebrahimi /* 89 */ 'v', '2', '7', 0, 6914*9a0e4156SSadaf Ebrahimi /* 93 */ 'v', '7', 0, 6915*9a0e4156SSadaf Ebrahimi /* 96 */ 'v', '1', '8', 0, 6916*9a0e4156SSadaf Ebrahimi /* 100 */ 'v', '2', '8', 0, 6917*9a0e4156SSadaf Ebrahimi /* 104 */ 'v', '8', 0, 6918*9a0e4156SSadaf Ebrahimi /* 107 */ 'v', '1', '9', 0, 6919*9a0e4156SSadaf Ebrahimi /* 111 */ 'v', '2', '9', 0, 6920*9a0e4156SSadaf Ebrahimi /* 115 */ 'v', '9', 0, 6921*9a0e4156SSadaf Ebrahimi }; 6922*9a0e4156SSadaf Ebrahimi 6923*9a0e4156SSadaf Ebrahimi static const uint16_t RegAsmOffsetvreg[] = { 6924*9a0e4156SSadaf Ebrahimi 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 6925*9a0e4156SSadaf Ebrahimi 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 6926*9a0e4156SSadaf Ebrahimi 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 12, 27, 38, 6927*9a0e4156SSadaf Ebrahimi 49, 60, 71, 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 74, 6928*9a0e4156SSadaf Ebrahimi 85, 96, 107, 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 8, 6929*9a0e4156SSadaf Ebrahimi 23, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 6930*9a0e4156SSadaf Ebrahimi 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 6931*9a0e4156SSadaf Ebrahimi 3, 3, 3, 3, 3, 12, 27, 38, 49, 60, 71, 82, 93, 104, 6932*9a0e4156SSadaf Ebrahimi 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 4, 19, 34, 6933*9a0e4156SSadaf Ebrahimi 45, 56, 67, 78, 89, 100, 111, 8, 23, 3, 3, 3, 3, 3, 6934*9a0e4156SSadaf Ebrahimi 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 6935*9a0e4156SSadaf Ebrahimi 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 6936*9a0e4156SSadaf Ebrahimi 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 6937*9a0e4156SSadaf Ebrahimi 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 6938*9a0e4156SSadaf Ebrahimi 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 6939*9a0e4156SSadaf Ebrahimi 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 6940*9a0e4156SSadaf Ebrahimi 3, 3, 3, 12, 27, 38, 49, 60, 71, 82, 93, 104, 115, 0, 6941*9a0e4156SSadaf Ebrahimi 15, 30, 41, 52, 63, 74, 85, 96, 107, 4, 19, 34, 45, 56, 6942*9a0e4156SSadaf Ebrahimi 67, 78, 89, 100, 111, 8, 23, 12, 27, 38, 49, 60, 71, 82, 6943*9a0e4156SSadaf Ebrahimi 93, 104, 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 4, 6944*9a0e4156SSadaf Ebrahimi 19, 34, 45, 56, 67, 78, 89, 100, 111, 8, 23, 12, 27, 38, 6945*9a0e4156SSadaf Ebrahimi 49, 60, 71, 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 74, 6946*9a0e4156SSadaf Ebrahimi 85, 96, 107, 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 8, 6947*9a0e4156SSadaf Ebrahimi 23, 12, 27, 38, 49, 60, 71, 82, 93, 104, 115, 0, 15, 30, 6948*9a0e4156SSadaf Ebrahimi 41, 52, 63, 74, 85, 96, 107, 4, 19, 34, 45, 56, 67, 78, 6949*9a0e4156SSadaf Ebrahimi 89, 100, 111, 8, 23, 12, 27, 38, 49, 60, 71, 82, 93, 104, 6950*9a0e4156SSadaf Ebrahimi 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 107, 4, 19, 34, 6951*9a0e4156SSadaf Ebrahimi 45, 56, 67, 78, 89, 100, 111, 8, 23, 12, 27, 38, 49, 60, 6952*9a0e4156SSadaf Ebrahimi 71, 82, 93, 104, 115, 0, 15, 30, 41, 52, 63, 74, 85, 96, 6953*9a0e4156SSadaf Ebrahimi 107, 4, 19, 34, 45, 56, 67, 78, 89, 100, 111, 8, 23, 6954*9a0e4156SSadaf Ebrahimi }; 6955*9a0e4156SSadaf Ebrahimi 6956*9a0e4156SSadaf Ebrahimi const uint16_t *RegAsmOffset; 6957*9a0e4156SSadaf Ebrahimi const char *AsmStrs; 6958*9a0e4156SSadaf Ebrahimi 6959*9a0e4156SSadaf Ebrahimi switch(AltIdx) { 6960*9a0e4156SSadaf Ebrahimi default: // llvm_unreachable("Invalid register alt name index!"); 6961*9a0e4156SSadaf Ebrahimi case AArch64_NoRegAltName: 6962*9a0e4156SSadaf Ebrahimi AsmStrs = AsmStrsNoRegAltName; 6963*9a0e4156SSadaf Ebrahimi RegAsmOffset = RegAsmOffsetNoRegAltName; 6964*9a0e4156SSadaf Ebrahimi break; 6965*9a0e4156SSadaf Ebrahimi case AArch64_vreg: 6966*9a0e4156SSadaf Ebrahimi AsmStrs = AsmStrsvreg; 6967*9a0e4156SSadaf Ebrahimi RegAsmOffset = RegAsmOffsetvreg; 6968*9a0e4156SSadaf Ebrahimi break; 6969*9a0e4156SSadaf Ebrahimi } 6970*9a0e4156SSadaf Ebrahimi //int i; 6971*9a0e4156SSadaf Ebrahimi //for (i = 0; i < sizeof(RegAsmOffsetNoRegAltName)/2; i++) 6972*9a0e4156SSadaf Ebrahimi // printf("%s = %u\n", AsmStrsNoRegAltName+RegAsmOffsetNoRegAltName[i], i + 1); 6973*9a0e4156SSadaf Ebrahimi //printf("*************************\n"); 6974*9a0e4156SSadaf Ebrahimi //for (i = 0; i < sizeof(RegAsmOffsetvreg)/2; i++) 6975*9a0e4156SSadaf Ebrahimi // printf("%s = %u\n", AsmStrsvreg+RegAsmOffsetvreg[i], i + 1); 6976*9a0e4156SSadaf Ebrahimi //printf("-------------------------\n"); 6977*9a0e4156SSadaf Ebrahimi return AsmStrs+RegAsmOffset[RegNo-1]; 6978*9a0e4156SSadaf Ebrahimi#else 6979*9a0e4156SSadaf Ebrahimi return NULL; 6980*9a0e4156SSadaf Ebrahimi#endif 6981*9a0e4156SSadaf Ebrahimi} 6982*9a0e4156SSadaf Ebrahimi 6983*9a0e4156SSadaf Ebrahimi#ifdef PRINT_ALIAS_INSTR 6984*9a0e4156SSadaf Ebrahimi#undef PRINT_ALIAS_INSTR 6985*9a0e4156SSadaf Ebrahimi 6986*9a0e4156SSadaf Ebrahimistatic void printCustomAliasOperand(MCInst *MI, unsigned OpIdx, 6987*9a0e4156SSadaf Ebrahimi unsigned PrintMethodIdx, SStream *OS, MCRegisterInfo *MRI) 6988*9a0e4156SSadaf Ebrahimi{ 6989*9a0e4156SSadaf Ebrahimi // printf(">>>> Method: %u, opIdx: %x\n", PrintMethodIdx, OpIdx); 6990*9a0e4156SSadaf Ebrahimi switch (PrintMethodIdx) { 6991*9a0e4156SSadaf Ebrahimi default: 6992*9a0e4156SSadaf Ebrahimi // llvm_unreachable("Unknown PrintMethod kind"); 6993*9a0e4156SSadaf Ebrahimi break; 6994*9a0e4156SSadaf Ebrahimi case 0: 6995*9a0e4156SSadaf Ebrahimi printAddSubImm(MI, OpIdx, OS); 6996*9a0e4156SSadaf Ebrahimi break; 6997*9a0e4156SSadaf Ebrahimi case 1: 6998*9a0e4156SSadaf Ebrahimi printShifter(MI, OpIdx, OS); 6999*9a0e4156SSadaf Ebrahimi break; 7000*9a0e4156SSadaf Ebrahimi case 2: 7001*9a0e4156SSadaf Ebrahimi printArithExtend(MI, OpIdx, OS); 7002*9a0e4156SSadaf Ebrahimi break; 7003*9a0e4156SSadaf Ebrahimi case 3: 7004*9a0e4156SSadaf Ebrahimi printLogicalImm32(MI, OpIdx, OS); 7005*9a0e4156SSadaf Ebrahimi break; 7006*9a0e4156SSadaf Ebrahimi case 4: 7007*9a0e4156SSadaf Ebrahimi printLogicalImm64(MI, OpIdx, OS); 7008*9a0e4156SSadaf Ebrahimi break; 7009*9a0e4156SSadaf Ebrahimi case 5: 7010*9a0e4156SSadaf Ebrahimi printVRegOperand(MI, OpIdx, OS); 7011*9a0e4156SSadaf Ebrahimi break; 7012*9a0e4156SSadaf Ebrahimi case 6: 7013*9a0e4156SSadaf Ebrahimi printHexImm(MI, OpIdx, OS); 7014*9a0e4156SSadaf Ebrahimi break; 7015*9a0e4156SSadaf Ebrahimi case 7: 7016*9a0e4156SSadaf Ebrahimi printInverseCondCode(MI, OpIdx, OS); 7017*9a0e4156SSadaf Ebrahimi break; 7018*9a0e4156SSadaf Ebrahimi case 8: 7019*9a0e4156SSadaf Ebrahimi printVectorIndex(MI, OpIdx, OS); 7020*9a0e4156SSadaf Ebrahimi break; 7021*9a0e4156SSadaf Ebrahimi case 9: 7022*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, OpIdx, OS, 16, 'b', MRI); 7023*9a0e4156SSadaf Ebrahimi break; 7024*9a0e4156SSadaf Ebrahimi case 10: 7025*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, OpIdx, OS, 1, 'd', MRI); 7026*9a0e4156SSadaf Ebrahimi break; 7027*9a0e4156SSadaf Ebrahimi case 11: 7028*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, OpIdx, OS, 2, 'd', MRI); 7029*9a0e4156SSadaf Ebrahimi break; 7030*9a0e4156SSadaf Ebrahimi case 12: 7031*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, OpIdx, OS, 2, 's', MRI); 7032*9a0e4156SSadaf Ebrahimi break; 7033*9a0e4156SSadaf Ebrahimi case 13: 7034*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, OpIdx, OS, 4, 'h', MRI); 7035*9a0e4156SSadaf Ebrahimi break; 7036*9a0e4156SSadaf Ebrahimi case 14: 7037*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, OpIdx, OS, 4, 's', MRI); 7038*9a0e4156SSadaf Ebrahimi break; 7039*9a0e4156SSadaf Ebrahimi case 15: 7040*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, OpIdx, OS, 8, 'b', MRI); 7041*9a0e4156SSadaf Ebrahimi break; 7042*9a0e4156SSadaf Ebrahimi case 16: 7043*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, OpIdx, OS, 8, 'h', MRI); 7044*9a0e4156SSadaf Ebrahimi break; 7045*9a0e4156SSadaf Ebrahimi case 17: 7046*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, OpIdx, OS, 0, 'h', MRI); 7047*9a0e4156SSadaf Ebrahimi break; 7048*9a0e4156SSadaf Ebrahimi case 18: 7049*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, OpIdx, OS, 0, 's', MRI); 7050*9a0e4156SSadaf Ebrahimi break; 7051*9a0e4156SSadaf Ebrahimi case 19: 7052*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, OpIdx, OS, 0, 'd', MRI); 7053*9a0e4156SSadaf Ebrahimi break; 7054*9a0e4156SSadaf Ebrahimi case 20: 7055*9a0e4156SSadaf Ebrahimi printTypedVectorList(MI, OpIdx, OS, 0, 'b', MRI); 7056*9a0e4156SSadaf Ebrahimi break; 7057*9a0e4156SSadaf Ebrahimi case 21: 7058*9a0e4156SSadaf Ebrahimi printPrefetchOp(MI, OpIdx, OS); 7059*9a0e4156SSadaf Ebrahimi break; 7060*9a0e4156SSadaf Ebrahimi case 22: 7061*9a0e4156SSadaf Ebrahimi printSysCROperand(MI, OpIdx, OS); 7062*9a0e4156SSadaf Ebrahimi break; 7063*9a0e4156SSadaf Ebrahimi } 7064*9a0e4156SSadaf Ebrahimi} 7065*9a0e4156SSadaf Ebrahimi 7066*9a0e4156SSadaf Ebrahimistatic bool AArch64InstPrinterValidateMCOperand( 7067*9a0e4156SSadaf Ebrahimi MCOperand *MCOp, unsigned PredicateIndex) 7068*9a0e4156SSadaf Ebrahimi{ 7069*9a0e4156SSadaf Ebrahimi switch (PredicateIndex) { 7070*9a0e4156SSadaf Ebrahimi default: 7071*9a0e4156SSadaf Ebrahimi // llvm_unreachable("Unknown MCOperandPredicate kind"); 7072*9a0e4156SSadaf Ebrahimi case 1: { 7073*9a0e4156SSadaf Ebrahimi return (MCOperand_isImm(MCOp) && 7074*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCOp) != ARM64_CC_AL && 7075*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCOp) != ARM64_CC_NV); 7076*9a0e4156SSadaf Ebrahimi } 7077*9a0e4156SSadaf Ebrahimi } 7078*9a0e4156SSadaf Ebrahimi} 7079*9a0e4156SSadaf Ebrahimi 7080*9a0e4156SSadaf Ebrahimistatic char *printAliasInstr(MCInst *MI, SStream *OS, void *info) 7081*9a0e4156SSadaf Ebrahimi{ 7082*9a0e4156SSadaf Ebrahimi #define GETREGCLASS_CONTAIN(_class, _reg) MCRegisterClass_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOperand_getReg(MCInst_getOperand(MI, _reg))) 7083*9a0e4156SSadaf Ebrahimi const char *AsmString; 7084*9a0e4156SSadaf Ebrahimi char *tmp, *AsmMnem, *AsmOps, *c; 7085*9a0e4156SSadaf Ebrahimi int OpIdx, PrintMethodIdx; 7086*9a0e4156SSadaf Ebrahimi MCRegisterInfo *MRI = (MCRegisterInfo *)info; 7087*9a0e4156SSadaf Ebrahimi switch (MCInst_getOpcode(MI)) { 7088*9a0e4156SSadaf Ebrahimi default: return NULL; 7089*9a0e4156SSadaf Ebrahimi case AArch64_ADDSWri: 7090*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7091*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && 7092*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7093*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1)) { 7094*9a0e4156SSadaf Ebrahimi // (ADDSWri WZR, GPR32sp:$src, addsub_shifted_imm32:$imm) 7095*9a0e4156SSadaf Ebrahimi AsmString = "cmn $\x02, $\xFF\x03\x01"; 7096*9a0e4156SSadaf Ebrahimi break; 7097*9a0e4156SSadaf Ebrahimi } 7098*9a0e4156SSadaf Ebrahimi return NULL; 7099*9a0e4156SSadaf Ebrahimi case AArch64_ADDSWrs: 7100*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7101*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && 7102*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7103*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 7104*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7105*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 7106*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7107*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7108*9a0e4156SSadaf Ebrahimi // (ADDSWrs WZR, GPR32:$src1, GPR32:$src2, 0) 7109*9a0e4156SSadaf Ebrahimi AsmString = "cmn $\x02, $\x03"; 7110*9a0e4156SSadaf Ebrahimi break; 7111*9a0e4156SSadaf Ebrahimi } 7112*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7113*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && 7114*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7115*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 7116*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7117*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { 7118*9a0e4156SSadaf Ebrahimi // (ADDSWrs WZR, GPR32:$src1, GPR32:$src2, arith_shift32:$sh) 7119*9a0e4156SSadaf Ebrahimi AsmString = "cmn $\x02, $\x03$\xFF\x04\x02"; 7120*9a0e4156SSadaf Ebrahimi break; 7121*9a0e4156SSadaf Ebrahimi } 7122*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7123*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7124*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 7125*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7126*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 7127*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7128*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 7129*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7130*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7131*9a0e4156SSadaf Ebrahimi // (ADDSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) 7132*9a0e4156SSadaf Ebrahimi AsmString = "adds $\x01, $\x02, $\x03"; 7133*9a0e4156SSadaf Ebrahimi break; 7134*9a0e4156SSadaf Ebrahimi } 7135*9a0e4156SSadaf Ebrahimi return NULL; 7136*9a0e4156SSadaf Ebrahimi case AArch64_ADDSWrx: 7137*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7138*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && 7139*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7140*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) && 7141*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7142*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 7143*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7144*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) { 7145*9a0e4156SSadaf Ebrahimi // (ADDSWrx WZR, GPR32sponly:$src1, GPR32:$src2, 16) 7146*9a0e4156SSadaf Ebrahimi AsmString = "cmn $\x02, $\x03"; 7147*9a0e4156SSadaf Ebrahimi break; 7148*9a0e4156SSadaf Ebrahimi } 7149*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7150*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && 7151*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7152*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1) && 7153*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7154*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { 7155*9a0e4156SSadaf Ebrahimi // (ADDSWrx WZR, GPR32sp:$src1, GPR32:$src2, arith_extend:$sh) 7156*9a0e4156SSadaf Ebrahimi AsmString = "cmn $\x02, $\x03$\xFF\x04\x03"; 7157*9a0e4156SSadaf Ebrahimi break; 7158*9a0e4156SSadaf Ebrahimi } 7159*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7160*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7161*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 7162*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7163*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) && 7164*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7165*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 7166*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7167*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) { 7168*9a0e4156SSadaf Ebrahimi // (ADDSWrx GPR32:$dst, GPR32sponly:$src1, GPR32:$src2, 16) 7169*9a0e4156SSadaf Ebrahimi AsmString = "adds $\x01, $\x02, $\x03"; 7170*9a0e4156SSadaf Ebrahimi break; 7171*9a0e4156SSadaf Ebrahimi } 7172*9a0e4156SSadaf Ebrahimi return NULL; 7173*9a0e4156SSadaf Ebrahimi case AArch64_ADDSXri: 7174*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7175*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && 7176*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7177*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1)) { 7178*9a0e4156SSadaf Ebrahimi // (ADDSXri XZR, GPR64sp:$src, addsub_shifted_imm64:$imm) 7179*9a0e4156SSadaf Ebrahimi AsmString = "cmn $\x02, $\xFF\x03\x01"; 7180*9a0e4156SSadaf Ebrahimi break; 7181*9a0e4156SSadaf Ebrahimi } 7182*9a0e4156SSadaf Ebrahimi return NULL; 7183*9a0e4156SSadaf Ebrahimi case AArch64_ADDSXrs: 7184*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7185*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && 7186*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7187*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 7188*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7189*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 7190*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7191*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7192*9a0e4156SSadaf Ebrahimi // (ADDSXrs XZR, GPR64:$src1, GPR64:$src2, 0) 7193*9a0e4156SSadaf Ebrahimi AsmString = "cmn $\x02, $\x03"; 7194*9a0e4156SSadaf Ebrahimi break; 7195*9a0e4156SSadaf Ebrahimi } 7196*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7197*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && 7198*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7199*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 7200*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7201*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) { 7202*9a0e4156SSadaf Ebrahimi // (ADDSXrs XZR, GPR64:$src1, GPR64:$src2, arith_shift64:$sh) 7203*9a0e4156SSadaf Ebrahimi AsmString = "cmn $\x02, $\x03$\xFF\x04\x02"; 7204*9a0e4156SSadaf Ebrahimi break; 7205*9a0e4156SSadaf Ebrahimi } 7206*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7207*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7208*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 7209*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7210*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 7211*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7212*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 7213*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7214*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7215*9a0e4156SSadaf Ebrahimi // (ADDSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) 7216*9a0e4156SSadaf Ebrahimi AsmString = "adds $\x01, $\x02, $\x03"; 7217*9a0e4156SSadaf Ebrahimi break; 7218*9a0e4156SSadaf Ebrahimi } 7219*9a0e4156SSadaf Ebrahimi return NULL; 7220*9a0e4156SSadaf Ebrahimi case AArch64_ADDSXrx: 7221*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7222*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && 7223*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7224*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 7225*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7226*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { 7227*9a0e4156SSadaf Ebrahimi // (ADDSXrx XZR, GPR64sp:$src1, GPR32:$src2, arith_extend:$sh) 7228*9a0e4156SSadaf Ebrahimi AsmString = "cmn $\x02, $\x03$\xFF\x04\x03"; 7229*9a0e4156SSadaf Ebrahimi break; 7230*9a0e4156SSadaf Ebrahimi } 7231*9a0e4156SSadaf Ebrahimi return NULL; 7232*9a0e4156SSadaf Ebrahimi case AArch64_ADDSXrx64: 7233*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7234*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && 7235*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7236*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) && 7237*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7238*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 7239*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7240*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) { 7241*9a0e4156SSadaf Ebrahimi // (ADDSXrx64 XZR, GPR64sponly:$src1, GPR64:$src2, 24) 7242*9a0e4156SSadaf Ebrahimi AsmString = "cmn $\x02, $\x03"; 7243*9a0e4156SSadaf Ebrahimi break; 7244*9a0e4156SSadaf Ebrahimi } 7245*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7246*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && 7247*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7248*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 7249*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7250*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) { 7251*9a0e4156SSadaf Ebrahimi // (ADDSXrx64 XZR, GPR64sp:$src1, GPR64:$src2, arith_extendlsl64:$sh) 7252*9a0e4156SSadaf Ebrahimi AsmString = "cmn $\x02, $\x03$\xFF\x04\x03"; 7253*9a0e4156SSadaf Ebrahimi break; 7254*9a0e4156SSadaf Ebrahimi } 7255*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7256*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7257*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 7258*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7259*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) && 7260*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7261*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 7262*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7263*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) { 7264*9a0e4156SSadaf Ebrahimi // (ADDSXrx64 GPR64:$dst, GPR64sponly:$src1, GPR64:$src2, 24) 7265*9a0e4156SSadaf Ebrahimi AsmString = "adds $\x01, $\x02, $\x03"; 7266*9a0e4156SSadaf Ebrahimi break; 7267*9a0e4156SSadaf Ebrahimi } 7268*9a0e4156SSadaf Ebrahimi return NULL; 7269*9a0e4156SSadaf Ebrahimi case AArch64_ADDWri: 7270*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7271*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7272*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 0) && 7273*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7274*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1) && 7275*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 7276*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && 7277*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7278*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7279*9a0e4156SSadaf Ebrahimi // (ADDWri GPR32sponly:$dst, GPR32sp:$src, 0, 0) 7280*9a0e4156SSadaf Ebrahimi AsmString = "mov $\x01, $\x02"; 7281*9a0e4156SSadaf Ebrahimi break; 7282*9a0e4156SSadaf Ebrahimi } 7283*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7284*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7285*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 0) && 7286*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7287*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) && 7288*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 7289*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && 7290*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7291*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7292*9a0e4156SSadaf Ebrahimi // (ADDWri GPR32sp:$dst, GPR32sponly:$src, 0, 0) 7293*9a0e4156SSadaf Ebrahimi AsmString = "mov $\x01, $\x02"; 7294*9a0e4156SSadaf Ebrahimi break; 7295*9a0e4156SSadaf Ebrahimi } 7296*9a0e4156SSadaf Ebrahimi return NULL; 7297*9a0e4156SSadaf Ebrahimi case AArch64_ADDWrs: 7298*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7299*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7300*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 7301*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7302*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 7303*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7304*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 7305*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7306*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7307*9a0e4156SSadaf Ebrahimi // (ADDWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) 7308*9a0e4156SSadaf Ebrahimi AsmString = "add $\x01, $\x02, $\x03"; 7309*9a0e4156SSadaf Ebrahimi break; 7310*9a0e4156SSadaf Ebrahimi } 7311*9a0e4156SSadaf Ebrahimi return NULL; 7312*9a0e4156SSadaf Ebrahimi case AArch64_ADDWrx: 7313*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7314*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7315*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 0) && 7316*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7317*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1) && 7318*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7319*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 7320*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7321*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) { 7322*9a0e4156SSadaf Ebrahimi // (ADDWrx GPR32sponly:$dst, GPR32sp:$src1, GPR32:$src2, 16) 7323*9a0e4156SSadaf Ebrahimi AsmString = "add $\x01, $\x02, $\x03"; 7324*9a0e4156SSadaf Ebrahimi break; 7325*9a0e4156SSadaf Ebrahimi } 7326*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7327*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7328*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 0) && 7329*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7330*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) && 7331*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7332*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 7333*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7334*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) { 7335*9a0e4156SSadaf Ebrahimi // (ADDWrx GPR32sp:$dst, GPR32sponly:$src1, GPR32:$src2, 16) 7336*9a0e4156SSadaf Ebrahimi AsmString = "add $\x01, $\x02, $\x03"; 7337*9a0e4156SSadaf Ebrahimi break; 7338*9a0e4156SSadaf Ebrahimi } 7339*9a0e4156SSadaf Ebrahimi return NULL; 7340*9a0e4156SSadaf Ebrahimi case AArch64_ADDXri: 7341*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7342*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7343*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 0) && 7344*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7345*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 7346*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 7347*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && 7348*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7349*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7350*9a0e4156SSadaf Ebrahimi // (ADDXri GPR64sponly:$dst, GPR64sp:$src, 0, 0) 7351*9a0e4156SSadaf Ebrahimi AsmString = "mov $\x01, $\x02"; 7352*9a0e4156SSadaf Ebrahimi break; 7353*9a0e4156SSadaf Ebrahimi } 7354*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7355*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7356*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 7357*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7358*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) && 7359*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 7360*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && 7361*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7362*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7363*9a0e4156SSadaf Ebrahimi // (ADDXri GPR64sp:$dst, GPR64sponly:$src, 0, 0) 7364*9a0e4156SSadaf Ebrahimi AsmString = "mov $\x01, $\x02"; 7365*9a0e4156SSadaf Ebrahimi break; 7366*9a0e4156SSadaf Ebrahimi } 7367*9a0e4156SSadaf Ebrahimi return NULL; 7368*9a0e4156SSadaf Ebrahimi case AArch64_ADDXrs: 7369*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7370*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7371*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 7372*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7373*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 7374*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7375*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 7376*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7377*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7378*9a0e4156SSadaf Ebrahimi // (ADDXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) 7379*9a0e4156SSadaf Ebrahimi AsmString = "add $\x01, $\x02, $\x03"; 7380*9a0e4156SSadaf Ebrahimi break; 7381*9a0e4156SSadaf Ebrahimi } 7382*9a0e4156SSadaf Ebrahimi return NULL; 7383*9a0e4156SSadaf Ebrahimi case AArch64_ADDXrx64: 7384*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7385*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7386*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 0) && 7387*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7388*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 7389*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7390*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 7391*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7392*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) { 7393*9a0e4156SSadaf Ebrahimi // (ADDXrx64 GPR64sponly:$dst, GPR64sp:$src1, GPR64:$src2, 24) 7394*9a0e4156SSadaf Ebrahimi AsmString = "add $\x01, $\x02, $\x03"; 7395*9a0e4156SSadaf Ebrahimi break; 7396*9a0e4156SSadaf Ebrahimi } 7397*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7398*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7399*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 7400*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7401*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) && 7402*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7403*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 7404*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7405*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) { 7406*9a0e4156SSadaf Ebrahimi // (ADDXrx64 GPR64sp:$dst, GPR64sponly:$src1, GPR64:$src2, 24) 7407*9a0e4156SSadaf Ebrahimi AsmString = "add $\x01, $\x02, $\x03"; 7408*9a0e4156SSadaf Ebrahimi break; 7409*9a0e4156SSadaf Ebrahimi } 7410*9a0e4156SSadaf Ebrahimi return NULL; 7411*9a0e4156SSadaf Ebrahimi case AArch64_ANDSWri: 7412*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 7413*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && 7414*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7415*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1)) { 7416*9a0e4156SSadaf Ebrahimi // (ANDSWri WZR, GPR32:$src1, logical_imm32:$src2) 7417*9a0e4156SSadaf Ebrahimi AsmString = "tst $\x02, $\xFF\x03\x04"; 7418*9a0e4156SSadaf Ebrahimi break; 7419*9a0e4156SSadaf Ebrahimi } 7420*9a0e4156SSadaf Ebrahimi return NULL; 7421*9a0e4156SSadaf Ebrahimi case AArch64_ANDSWrs: 7422*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7423*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && 7424*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7425*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 7426*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7427*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 7428*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7429*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7430*9a0e4156SSadaf Ebrahimi // (ANDSWrs WZR, GPR32:$src1, GPR32:$src2, 0) 7431*9a0e4156SSadaf Ebrahimi AsmString = "tst $\x02, $\x03"; 7432*9a0e4156SSadaf Ebrahimi break; 7433*9a0e4156SSadaf Ebrahimi } 7434*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7435*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && 7436*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7437*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 7438*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7439*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { 7440*9a0e4156SSadaf Ebrahimi // (ANDSWrs WZR, GPR32:$src1, GPR32:$src2, logical_shift32:$sh) 7441*9a0e4156SSadaf Ebrahimi AsmString = "tst $\x02, $\x03$\xFF\x04\x02"; 7442*9a0e4156SSadaf Ebrahimi break; 7443*9a0e4156SSadaf Ebrahimi } 7444*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7445*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7446*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 7447*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7448*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 7449*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7450*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 7451*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7452*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7453*9a0e4156SSadaf Ebrahimi // (ANDSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) 7454*9a0e4156SSadaf Ebrahimi AsmString = "ands $\x01, $\x02, $\x03"; 7455*9a0e4156SSadaf Ebrahimi break; 7456*9a0e4156SSadaf Ebrahimi } 7457*9a0e4156SSadaf Ebrahimi return NULL; 7458*9a0e4156SSadaf Ebrahimi case AArch64_ANDSXri: 7459*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 7460*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && 7461*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7462*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1)) { 7463*9a0e4156SSadaf Ebrahimi // (ANDSXri XZR, GPR64:$src1, logical_imm64:$src2) 7464*9a0e4156SSadaf Ebrahimi AsmString = "tst $\x02, $\xFF\x03\x05"; 7465*9a0e4156SSadaf Ebrahimi break; 7466*9a0e4156SSadaf Ebrahimi } 7467*9a0e4156SSadaf Ebrahimi return NULL; 7468*9a0e4156SSadaf Ebrahimi case AArch64_ANDSXrs: 7469*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7470*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && 7471*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7472*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 7473*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7474*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 7475*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7476*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7477*9a0e4156SSadaf Ebrahimi // (ANDSXrs XZR, GPR64:$src1, GPR64:$src2, 0) 7478*9a0e4156SSadaf Ebrahimi AsmString = "tst $\x02, $\x03"; 7479*9a0e4156SSadaf Ebrahimi break; 7480*9a0e4156SSadaf Ebrahimi } 7481*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7482*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && 7483*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7484*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 7485*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7486*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) { 7487*9a0e4156SSadaf Ebrahimi // (ANDSXrs XZR, GPR64:$src1, GPR64:$src2, logical_shift64:$sh) 7488*9a0e4156SSadaf Ebrahimi AsmString = "tst $\x02, $\x03$\xFF\x04\x02"; 7489*9a0e4156SSadaf Ebrahimi break; 7490*9a0e4156SSadaf Ebrahimi } 7491*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7492*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7493*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 7494*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7495*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 7496*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7497*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 7498*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7499*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7500*9a0e4156SSadaf Ebrahimi // (ANDSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) 7501*9a0e4156SSadaf Ebrahimi AsmString = "ands $\x01, $\x02, $\x03"; 7502*9a0e4156SSadaf Ebrahimi break; 7503*9a0e4156SSadaf Ebrahimi } 7504*9a0e4156SSadaf Ebrahimi return NULL; 7505*9a0e4156SSadaf Ebrahimi case AArch64_ANDWrs: 7506*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7507*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7508*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 7509*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7510*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 7511*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7512*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 7513*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7514*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7515*9a0e4156SSadaf Ebrahimi // (ANDWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) 7516*9a0e4156SSadaf Ebrahimi AsmString = "and $\x01, $\x02, $\x03"; 7517*9a0e4156SSadaf Ebrahimi break; 7518*9a0e4156SSadaf Ebrahimi } 7519*9a0e4156SSadaf Ebrahimi return NULL; 7520*9a0e4156SSadaf Ebrahimi case AArch64_ANDXrs: 7521*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7522*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7523*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 7524*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7525*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 7526*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7527*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 7528*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7529*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7530*9a0e4156SSadaf Ebrahimi // (ANDXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) 7531*9a0e4156SSadaf Ebrahimi AsmString = "and $\x01, $\x02, $\x03"; 7532*9a0e4156SSadaf Ebrahimi break; 7533*9a0e4156SSadaf Ebrahimi } 7534*9a0e4156SSadaf Ebrahimi return NULL; 7535*9a0e4156SSadaf Ebrahimi case AArch64_BICSWrs: 7536*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7537*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7538*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 7539*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7540*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 7541*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7542*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 7543*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7544*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7545*9a0e4156SSadaf Ebrahimi // (BICSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) 7546*9a0e4156SSadaf Ebrahimi AsmString = "bics $\x01, $\x02, $\x03"; 7547*9a0e4156SSadaf Ebrahimi break; 7548*9a0e4156SSadaf Ebrahimi } 7549*9a0e4156SSadaf Ebrahimi return NULL; 7550*9a0e4156SSadaf Ebrahimi case AArch64_BICSXrs: 7551*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7552*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7553*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 7554*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7555*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 7556*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7557*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 7558*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7559*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7560*9a0e4156SSadaf Ebrahimi // (BICSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) 7561*9a0e4156SSadaf Ebrahimi AsmString = "bics $\x01, $\x02, $\x03"; 7562*9a0e4156SSadaf Ebrahimi break; 7563*9a0e4156SSadaf Ebrahimi } 7564*9a0e4156SSadaf Ebrahimi return NULL; 7565*9a0e4156SSadaf Ebrahimi case AArch64_BICWrs: 7566*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7567*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7568*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 7569*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7570*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 7571*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7572*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 7573*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7574*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7575*9a0e4156SSadaf Ebrahimi // (BICWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) 7576*9a0e4156SSadaf Ebrahimi AsmString = "bic $\x01, $\x02, $\x03"; 7577*9a0e4156SSadaf Ebrahimi break; 7578*9a0e4156SSadaf Ebrahimi } 7579*9a0e4156SSadaf Ebrahimi return NULL; 7580*9a0e4156SSadaf Ebrahimi case AArch64_BICXrs: 7581*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7582*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7583*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 7584*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7585*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 7586*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7587*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 7588*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7589*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7590*9a0e4156SSadaf Ebrahimi // (BICXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) 7591*9a0e4156SSadaf Ebrahimi AsmString = "bic $\x01, $\x02, $\x03"; 7592*9a0e4156SSadaf Ebrahimi break; 7593*9a0e4156SSadaf Ebrahimi } 7594*9a0e4156SSadaf Ebrahimi return NULL; 7595*9a0e4156SSadaf Ebrahimi case AArch64_BICv2i32: 7596*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 7597*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7598*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && 7599*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 7600*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 7601*9a0e4156SSadaf Ebrahimi // (BICv2i32 V64:$Vd, imm0_255:$imm, 0) 7602*9a0e4156SSadaf Ebrahimi AsmString = "bic $\xFF\x01\x06.2s, $\xFF\x02\x07"; 7603*9a0e4156SSadaf Ebrahimi break; 7604*9a0e4156SSadaf Ebrahimi } 7605*9a0e4156SSadaf Ebrahimi return NULL; 7606*9a0e4156SSadaf Ebrahimi case AArch64_BICv4i16: 7607*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 7608*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7609*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && 7610*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 7611*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 7612*9a0e4156SSadaf Ebrahimi // (BICv4i16 V64:$Vd, imm0_255:$imm, 0) 7613*9a0e4156SSadaf Ebrahimi AsmString = "bic $\xFF\x01\x06.4h, $\xFF\x02\x07"; 7614*9a0e4156SSadaf Ebrahimi break; 7615*9a0e4156SSadaf Ebrahimi } 7616*9a0e4156SSadaf Ebrahimi return NULL; 7617*9a0e4156SSadaf Ebrahimi case AArch64_BICv4i32: 7618*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 7619*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7620*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 7621*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 7622*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 7623*9a0e4156SSadaf Ebrahimi // (BICv4i32 V128:$Vd, imm0_255:$imm, 0) 7624*9a0e4156SSadaf Ebrahimi AsmString = "bic $\xFF\x01\x06.4s, $\xFF\x02\x07"; 7625*9a0e4156SSadaf Ebrahimi break; 7626*9a0e4156SSadaf Ebrahimi } 7627*9a0e4156SSadaf Ebrahimi return NULL; 7628*9a0e4156SSadaf Ebrahimi case AArch64_BICv8i16: 7629*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 7630*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7631*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 7632*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 7633*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 7634*9a0e4156SSadaf Ebrahimi // (BICv8i16 V128:$Vd, imm0_255:$imm, 0) 7635*9a0e4156SSadaf Ebrahimi AsmString = "bic $\xFF\x01\x06.8h, $\xFF\x02\x07"; 7636*9a0e4156SSadaf Ebrahimi break; 7637*9a0e4156SSadaf Ebrahimi } 7638*9a0e4156SSadaf Ebrahimi return NULL; 7639*9a0e4156SSadaf Ebrahimi case AArch64_CLREX: 7640*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 1 && 7641*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 0)) && 7642*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15) { 7643*9a0e4156SSadaf Ebrahimi // (CLREX 15) 7644*9a0e4156SSadaf Ebrahimi AsmString = "clrex"; 7645*9a0e4156SSadaf Ebrahimi break; 7646*9a0e4156SSadaf Ebrahimi } 7647*9a0e4156SSadaf Ebrahimi return NULL; 7648*9a0e4156SSadaf Ebrahimi case AArch64_CSINCWr: 7649*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7650*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7651*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 7652*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR && 7653*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_WZR && 7654*9a0e4156SSadaf Ebrahimi AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) { 7655*9a0e4156SSadaf Ebrahimi // (CSINCWr GPR32:$dst, WZR, WZR, inv_ccode:$cc) 7656*9a0e4156SSadaf Ebrahimi AsmString = "cset $\x01, $\xFF\x04\x08"; 7657*9a0e4156SSadaf Ebrahimi break; 7658*9a0e4156SSadaf Ebrahimi } 7659*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7660*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7661*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 7662*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7663*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 7664*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7665*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) && 7666*9a0e4156SSadaf Ebrahimi AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) { 7667*9a0e4156SSadaf Ebrahimi // (CSINCWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc) 7668*9a0e4156SSadaf Ebrahimi AsmString = "cinc $\x01, $\x02, $\xFF\x04\x08"; 7669*9a0e4156SSadaf Ebrahimi break; 7670*9a0e4156SSadaf Ebrahimi } 7671*9a0e4156SSadaf Ebrahimi return NULL; 7672*9a0e4156SSadaf Ebrahimi case AArch64_CSINCXr: 7673*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7674*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7675*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 7676*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR && 7677*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR && 7678*9a0e4156SSadaf Ebrahimi AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) { 7679*9a0e4156SSadaf Ebrahimi // (CSINCXr GPR64:$dst, XZR, XZR, inv_ccode:$cc) 7680*9a0e4156SSadaf Ebrahimi AsmString = "cset $\x01, $\xFF\x04\x08"; 7681*9a0e4156SSadaf Ebrahimi break; 7682*9a0e4156SSadaf Ebrahimi } 7683*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7684*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7685*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 7686*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7687*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 7688*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7689*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) && 7690*9a0e4156SSadaf Ebrahimi AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) { 7691*9a0e4156SSadaf Ebrahimi // (CSINCXr GPR64:$dst, GPR64:$src, GPR64:$src, inv_ccode:$cc) 7692*9a0e4156SSadaf Ebrahimi AsmString = "cinc $\x01, $\x02, $\xFF\x04\x08"; 7693*9a0e4156SSadaf Ebrahimi break; 7694*9a0e4156SSadaf Ebrahimi } 7695*9a0e4156SSadaf Ebrahimi return NULL; 7696*9a0e4156SSadaf Ebrahimi case AArch64_CSINVWr: 7697*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7698*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7699*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 7700*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR && 7701*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_WZR && 7702*9a0e4156SSadaf Ebrahimi AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) { 7703*9a0e4156SSadaf Ebrahimi // (CSINVWr GPR32:$dst, WZR, WZR, inv_ccode:$cc) 7704*9a0e4156SSadaf Ebrahimi AsmString = "csetm $\x01, $\xFF\x04\x08"; 7705*9a0e4156SSadaf Ebrahimi break; 7706*9a0e4156SSadaf Ebrahimi } 7707*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7708*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7709*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 7710*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7711*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 7712*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7713*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) && 7714*9a0e4156SSadaf Ebrahimi AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) { 7715*9a0e4156SSadaf Ebrahimi // (CSINVWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc) 7716*9a0e4156SSadaf Ebrahimi AsmString = "cinv $\x01, $\x02, $\xFF\x04\x08"; 7717*9a0e4156SSadaf Ebrahimi break; 7718*9a0e4156SSadaf Ebrahimi } 7719*9a0e4156SSadaf Ebrahimi return NULL; 7720*9a0e4156SSadaf Ebrahimi case AArch64_CSINVXr: 7721*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7722*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7723*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 7724*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR && 7725*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR && 7726*9a0e4156SSadaf Ebrahimi AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) { 7727*9a0e4156SSadaf Ebrahimi // (CSINVXr GPR64:$dst, XZR, XZR, inv_ccode:$cc) 7728*9a0e4156SSadaf Ebrahimi AsmString = "csetm $\x01, $\xFF\x04\x08"; 7729*9a0e4156SSadaf Ebrahimi break; 7730*9a0e4156SSadaf Ebrahimi } 7731*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7732*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7733*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 7734*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7735*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 7736*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7737*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) && 7738*9a0e4156SSadaf Ebrahimi AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) { 7739*9a0e4156SSadaf Ebrahimi // (CSINVXr GPR64:$dst, GPR64:$src, GPR64:$src, inv_ccode:$cc) 7740*9a0e4156SSadaf Ebrahimi AsmString = "cinv $\x01, $\x02, $\xFF\x04\x08"; 7741*9a0e4156SSadaf Ebrahimi break; 7742*9a0e4156SSadaf Ebrahimi } 7743*9a0e4156SSadaf Ebrahimi return NULL; 7744*9a0e4156SSadaf Ebrahimi case AArch64_CSNEGWr: 7745*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7746*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7747*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 7748*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7749*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 7750*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7751*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) && 7752*9a0e4156SSadaf Ebrahimi AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) { 7753*9a0e4156SSadaf Ebrahimi // (CSNEGWr GPR32:$dst, GPR32:$src, GPR32:$src, inv_ccode:$cc) 7754*9a0e4156SSadaf Ebrahimi AsmString = "cneg $\x01, $\x02, $\xFF\x04\x08"; 7755*9a0e4156SSadaf Ebrahimi break; 7756*9a0e4156SSadaf Ebrahimi } 7757*9a0e4156SSadaf Ebrahimi return NULL; 7758*9a0e4156SSadaf Ebrahimi case AArch64_CSNEGXr: 7759*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7760*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7761*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 7762*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7763*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 7764*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7765*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1)) && 7766*9a0e4156SSadaf Ebrahimi AArch64InstPrinterValidateMCOperand(MCInst_getOperand(MI, 3), 1)) { 7767*9a0e4156SSadaf Ebrahimi // (CSNEGXr GPR64:$dst, GPR64:$src, GPR64:$src, inv_ccode:$cc) 7768*9a0e4156SSadaf Ebrahimi AsmString = "cneg $\x01, $\x02, $\xFF\x04\x08"; 7769*9a0e4156SSadaf Ebrahimi break; 7770*9a0e4156SSadaf Ebrahimi } 7771*9a0e4156SSadaf Ebrahimi return NULL; 7772*9a0e4156SSadaf Ebrahimi case AArch64_DCPS1: 7773*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 1 && 7774*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 0)) && 7775*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { 7776*9a0e4156SSadaf Ebrahimi // (DCPS1 0) 7777*9a0e4156SSadaf Ebrahimi AsmString = "dcps1"; 7778*9a0e4156SSadaf Ebrahimi break; 7779*9a0e4156SSadaf Ebrahimi } 7780*9a0e4156SSadaf Ebrahimi return NULL; 7781*9a0e4156SSadaf Ebrahimi case AArch64_DCPS2: 7782*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 1 && 7783*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 0)) && 7784*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { 7785*9a0e4156SSadaf Ebrahimi // (DCPS2 0) 7786*9a0e4156SSadaf Ebrahimi AsmString = "dcps2"; 7787*9a0e4156SSadaf Ebrahimi break; 7788*9a0e4156SSadaf Ebrahimi } 7789*9a0e4156SSadaf Ebrahimi return NULL; 7790*9a0e4156SSadaf Ebrahimi case AArch64_DCPS3: 7791*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 1 && 7792*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 0)) && 7793*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { 7794*9a0e4156SSadaf Ebrahimi // (DCPS3 0) 7795*9a0e4156SSadaf Ebrahimi AsmString = "dcps3"; 7796*9a0e4156SSadaf Ebrahimi break; 7797*9a0e4156SSadaf Ebrahimi } 7798*9a0e4156SSadaf Ebrahimi return NULL; 7799*9a0e4156SSadaf Ebrahimi case AArch64_EONWrs: 7800*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7801*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7802*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 7803*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7804*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 7805*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7806*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 7807*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7808*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7809*9a0e4156SSadaf Ebrahimi // (EONWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) 7810*9a0e4156SSadaf Ebrahimi AsmString = "eon $\x01, $\x02, $\x03"; 7811*9a0e4156SSadaf Ebrahimi break; 7812*9a0e4156SSadaf Ebrahimi } 7813*9a0e4156SSadaf Ebrahimi return NULL; 7814*9a0e4156SSadaf Ebrahimi case AArch64_EONXrs: 7815*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7816*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7817*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 7818*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7819*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 7820*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7821*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 7822*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7823*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7824*9a0e4156SSadaf Ebrahimi // (EONXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) 7825*9a0e4156SSadaf Ebrahimi AsmString = "eon $\x01, $\x02, $\x03"; 7826*9a0e4156SSadaf Ebrahimi break; 7827*9a0e4156SSadaf Ebrahimi } 7828*9a0e4156SSadaf Ebrahimi return NULL; 7829*9a0e4156SSadaf Ebrahimi case AArch64_EORWrs: 7830*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7831*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7832*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 7833*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7834*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 7835*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7836*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 7837*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7838*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7839*9a0e4156SSadaf Ebrahimi // (EORWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) 7840*9a0e4156SSadaf Ebrahimi AsmString = "eor $\x01, $\x02, $\x03"; 7841*9a0e4156SSadaf Ebrahimi break; 7842*9a0e4156SSadaf Ebrahimi } 7843*9a0e4156SSadaf Ebrahimi return NULL; 7844*9a0e4156SSadaf Ebrahimi case AArch64_EORXrs: 7845*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7846*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7847*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 7848*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7849*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 7850*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7851*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 7852*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 7853*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 7854*9a0e4156SSadaf Ebrahimi // (EORXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) 7855*9a0e4156SSadaf Ebrahimi AsmString = "eor $\x01, $\x02, $\x03"; 7856*9a0e4156SSadaf Ebrahimi break; 7857*9a0e4156SSadaf Ebrahimi } 7858*9a0e4156SSadaf Ebrahimi return NULL; 7859*9a0e4156SSadaf Ebrahimi case AArch64_EXTRWrri: 7860*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7861*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7862*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 7863*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7864*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 7865*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7866*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { 7867*9a0e4156SSadaf Ebrahimi // (EXTRWrri GPR32:$dst, GPR32:$src, GPR32:$src, imm0_31:$shift) 7868*9a0e4156SSadaf Ebrahimi AsmString = "ror $\x01, $\x02, $\x04"; 7869*9a0e4156SSadaf Ebrahimi break; 7870*9a0e4156SSadaf Ebrahimi } 7871*9a0e4156SSadaf Ebrahimi return NULL; 7872*9a0e4156SSadaf Ebrahimi case AArch64_EXTRXrri: 7873*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7874*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7875*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 7876*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 7877*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 7878*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7879*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { 7880*9a0e4156SSadaf Ebrahimi // (EXTRXrri GPR64:$dst, GPR64:$src, GPR64:$src, imm0_63:$shift) 7881*9a0e4156SSadaf Ebrahimi AsmString = "ror $\x01, $\x02, $\x04"; 7882*9a0e4156SSadaf Ebrahimi break; 7883*9a0e4156SSadaf Ebrahimi } 7884*9a0e4156SSadaf Ebrahimi return NULL; 7885*9a0e4156SSadaf Ebrahimi case AArch64_HINT: 7886*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 1 && 7887*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 0)) && 7888*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) { 7889*9a0e4156SSadaf Ebrahimi // (HINT { 0, 0, 0 }) 7890*9a0e4156SSadaf Ebrahimi AsmString = "nop"; 7891*9a0e4156SSadaf Ebrahimi break; 7892*9a0e4156SSadaf Ebrahimi } 7893*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 1 && 7894*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 0)) && 7895*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 0)) == 1) { 7896*9a0e4156SSadaf Ebrahimi // (HINT { 0, 0, 1 }) 7897*9a0e4156SSadaf Ebrahimi AsmString = "yield"; 7898*9a0e4156SSadaf Ebrahimi break; 7899*9a0e4156SSadaf Ebrahimi } 7900*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 1 && 7901*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 0)) && 7902*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 0)) == 2) { 7903*9a0e4156SSadaf Ebrahimi // (HINT { 0, 1, 0 }) 7904*9a0e4156SSadaf Ebrahimi AsmString = "wfe"; 7905*9a0e4156SSadaf Ebrahimi break; 7906*9a0e4156SSadaf Ebrahimi } 7907*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 1 && 7908*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 0)) && 7909*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 0)) == 3) { 7910*9a0e4156SSadaf Ebrahimi // (HINT { 0, 1, 1 }) 7911*9a0e4156SSadaf Ebrahimi AsmString = "wfi"; 7912*9a0e4156SSadaf Ebrahimi break; 7913*9a0e4156SSadaf Ebrahimi } 7914*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 1 && 7915*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 0)) && 7916*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 0)) == 4) { 7917*9a0e4156SSadaf Ebrahimi // (HINT { 1, 0, 0 }) 7918*9a0e4156SSadaf Ebrahimi AsmString = "sev"; 7919*9a0e4156SSadaf Ebrahimi break; 7920*9a0e4156SSadaf Ebrahimi } 7921*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 1 && 7922*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 0)) && 7923*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 0)) == 5) { 7924*9a0e4156SSadaf Ebrahimi // (HINT { 1, 0, 1 }) 7925*9a0e4156SSadaf Ebrahimi AsmString = "sevl"; 7926*9a0e4156SSadaf Ebrahimi break; 7927*9a0e4156SSadaf Ebrahimi } 7928*9a0e4156SSadaf Ebrahimi return NULL; 7929*9a0e4156SSadaf Ebrahimi case AArch64_INSvi16gpr: 7930*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 7931*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7932*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 7933*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7934*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { 7935*9a0e4156SSadaf Ebrahimi // (INSvi16gpr V128:$dst, VectorIndexH:$idx, GPR32:$src) 7936*9a0e4156SSadaf Ebrahimi AsmString = "mov $\xFF\x01\x06.h$\xFF\x02\x09, $\x03"; 7937*9a0e4156SSadaf Ebrahimi break; 7938*9a0e4156SSadaf Ebrahimi } 7939*9a0e4156SSadaf Ebrahimi return NULL; 7940*9a0e4156SSadaf Ebrahimi case AArch64_INSvi16lane: 7941*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7942*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7943*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 7944*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7945*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 2)) { 7946*9a0e4156SSadaf Ebrahimi // (INSvi16lane V128:$dst, VectorIndexH:$idx, V128:$src, VectorIndexH:$idx2) 7947*9a0e4156SSadaf Ebrahimi AsmString = "mov $\xFF\x01\x06.h$\xFF\x02\x09, $\xFF\x03\x06.h$\xFF\x04\x09"; 7948*9a0e4156SSadaf Ebrahimi break; 7949*9a0e4156SSadaf Ebrahimi } 7950*9a0e4156SSadaf Ebrahimi return NULL; 7951*9a0e4156SSadaf Ebrahimi case AArch64_INSvi32gpr: 7952*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 7953*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7954*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 7955*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7956*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { 7957*9a0e4156SSadaf Ebrahimi // (INSvi32gpr V128:$dst, VectorIndexS:$idx, GPR32:$src) 7958*9a0e4156SSadaf Ebrahimi AsmString = "mov $\xFF\x01\x06.s$\xFF\x02\x09, $\x03"; 7959*9a0e4156SSadaf Ebrahimi break; 7960*9a0e4156SSadaf Ebrahimi } 7961*9a0e4156SSadaf Ebrahimi return NULL; 7962*9a0e4156SSadaf Ebrahimi case AArch64_INSvi32lane: 7963*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7964*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7965*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 7966*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7967*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 2)) { 7968*9a0e4156SSadaf Ebrahimi // (INSvi32lane V128:$dst, VectorIndexS:$idx, V128:$src, VectorIndexS:$idx2) 7969*9a0e4156SSadaf Ebrahimi AsmString = "mov $\xFF\x01\x06.s$\xFF\x02\x09, $\xFF\x03\x06.s$\xFF\x04\x09"; 7970*9a0e4156SSadaf Ebrahimi break; 7971*9a0e4156SSadaf Ebrahimi } 7972*9a0e4156SSadaf Ebrahimi return NULL; 7973*9a0e4156SSadaf Ebrahimi case AArch64_INSvi64gpr: 7974*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 7975*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7976*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 7977*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7978*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) { 7979*9a0e4156SSadaf Ebrahimi // (INSvi64gpr V128:$dst, VectorIndexD:$idx, GPR64:$src) 7980*9a0e4156SSadaf Ebrahimi AsmString = "mov $\xFF\x01\x06.d$\xFF\x02\x09, $\x03"; 7981*9a0e4156SSadaf Ebrahimi break; 7982*9a0e4156SSadaf Ebrahimi } 7983*9a0e4156SSadaf Ebrahimi return NULL; 7984*9a0e4156SSadaf Ebrahimi case AArch64_INSvi64lane: 7985*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 7986*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7987*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 7988*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 7989*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 2)) { 7990*9a0e4156SSadaf Ebrahimi // (INSvi64lane V128:$dst, VectorIndexD:$idx, V128:$src, VectorIndexD:$idx2) 7991*9a0e4156SSadaf Ebrahimi AsmString = "mov $\xFF\x01\x06.d$\xFF\x02\x09, $\xFF\x03\x06.d$\xFF\x04\x09"; 7992*9a0e4156SSadaf Ebrahimi break; 7993*9a0e4156SSadaf Ebrahimi } 7994*9a0e4156SSadaf Ebrahimi return NULL; 7995*9a0e4156SSadaf Ebrahimi case AArch64_INSvi8gpr: 7996*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 7997*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 7998*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 7999*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 8000*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { 8001*9a0e4156SSadaf Ebrahimi // (INSvi8gpr V128:$dst, VectorIndexB:$idx, GPR32:$src) 8002*9a0e4156SSadaf Ebrahimi AsmString = "mov $\xFF\x01\x06.b$\xFF\x02\x09, $\x03"; 8003*9a0e4156SSadaf Ebrahimi break; 8004*9a0e4156SSadaf Ebrahimi } 8005*9a0e4156SSadaf Ebrahimi return NULL; 8006*9a0e4156SSadaf Ebrahimi case AArch64_INSvi8lane: 8007*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 8008*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8009*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 8010*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 8011*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 2)) { 8012*9a0e4156SSadaf Ebrahimi // (INSvi8lane V128:$dst, VectorIndexB:$idx, V128:$src, VectorIndexB:$idx2) 8013*9a0e4156SSadaf Ebrahimi AsmString = "mov $\xFF\x01\x06.b$\xFF\x02\x09, $\xFF\x03\x06.b$\xFF\x04\x09"; 8014*9a0e4156SSadaf Ebrahimi break; 8015*9a0e4156SSadaf Ebrahimi } 8016*9a0e4156SSadaf Ebrahimi return NULL; 8017*9a0e4156SSadaf Ebrahimi case AArch64_ISB: 8018*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 1 && 8019*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 0)) && 8020*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 0)) == 15) { 8021*9a0e4156SSadaf Ebrahimi // (ISB 15) 8022*9a0e4156SSadaf Ebrahimi AsmString = "isb"; 8023*9a0e4156SSadaf Ebrahimi break; 8024*9a0e4156SSadaf Ebrahimi } 8025*9a0e4156SSadaf Ebrahimi return NULL; 8026*9a0e4156SSadaf Ebrahimi case AArch64_LD1Fourv16b_POST: 8027*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8028*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8029*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8030*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8031*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 8032*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8033*9a0e4156SSadaf Ebrahimi // (LD1Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) 8034*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0A, [$\x01], #64"; 8035*9a0e4156SSadaf Ebrahimi break; 8036*9a0e4156SSadaf Ebrahimi } 8037*9a0e4156SSadaf Ebrahimi return NULL; 8038*9a0e4156SSadaf Ebrahimi case AArch64_LD1Fourv1d_POST: 8039*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8040*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8041*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8042*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8043*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && 8044*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8045*9a0e4156SSadaf Ebrahimi // (LD1Fourv1d_POST GPR64sp:$Rn, VecListFour1d:$Vt, XZR) 8046*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0B, [$\x01], #32"; 8047*9a0e4156SSadaf Ebrahimi break; 8048*9a0e4156SSadaf Ebrahimi } 8049*9a0e4156SSadaf Ebrahimi return NULL; 8050*9a0e4156SSadaf Ebrahimi case AArch64_LD1Fourv2d_POST: 8051*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8052*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8053*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8054*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8055*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 8056*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8057*9a0e4156SSadaf Ebrahimi // (LD1Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) 8058*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0C, [$\x01], #64"; 8059*9a0e4156SSadaf Ebrahimi break; 8060*9a0e4156SSadaf Ebrahimi } 8061*9a0e4156SSadaf Ebrahimi return NULL; 8062*9a0e4156SSadaf Ebrahimi case AArch64_LD1Fourv2s_POST: 8063*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8064*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8065*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8066*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8067*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && 8068*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8069*9a0e4156SSadaf Ebrahimi // (LD1Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) 8070*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0D, [$\x01], #32"; 8071*9a0e4156SSadaf Ebrahimi break; 8072*9a0e4156SSadaf Ebrahimi } 8073*9a0e4156SSadaf Ebrahimi return NULL; 8074*9a0e4156SSadaf Ebrahimi case AArch64_LD1Fourv4h_POST: 8075*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8076*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8077*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8078*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8079*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && 8080*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8081*9a0e4156SSadaf Ebrahimi // (LD1Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) 8082*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0E, [$\x01], #32"; 8083*9a0e4156SSadaf Ebrahimi break; 8084*9a0e4156SSadaf Ebrahimi } 8085*9a0e4156SSadaf Ebrahimi return NULL; 8086*9a0e4156SSadaf Ebrahimi case AArch64_LD1Fourv4s_POST: 8087*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8088*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8089*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8090*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8091*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 8092*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8093*9a0e4156SSadaf Ebrahimi // (LD1Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) 8094*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0F, [$\x01], #64"; 8095*9a0e4156SSadaf Ebrahimi break; 8096*9a0e4156SSadaf Ebrahimi } 8097*9a0e4156SSadaf Ebrahimi return NULL; 8098*9a0e4156SSadaf Ebrahimi case AArch64_LD1Fourv8b_POST: 8099*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8100*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8101*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8102*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8103*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && 8104*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8105*9a0e4156SSadaf Ebrahimi // (LD1Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) 8106*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x10, [$\x01], #32"; 8107*9a0e4156SSadaf Ebrahimi break; 8108*9a0e4156SSadaf Ebrahimi } 8109*9a0e4156SSadaf Ebrahimi return NULL; 8110*9a0e4156SSadaf Ebrahimi case AArch64_LD1Fourv8h_POST: 8111*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8112*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8113*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8114*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8115*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 8116*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8117*9a0e4156SSadaf Ebrahimi // (LD1Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) 8118*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x11, [$\x01], #64"; 8119*9a0e4156SSadaf Ebrahimi break; 8120*9a0e4156SSadaf Ebrahimi } 8121*9a0e4156SSadaf Ebrahimi return NULL; 8122*9a0e4156SSadaf Ebrahimi case AArch64_LD1Onev16b_POST: 8123*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8124*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8125*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8126*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8127*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 8128*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8129*9a0e4156SSadaf Ebrahimi // (LD1Onev16b_POST GPR64sp:$Rn, VecListOne16b:$Vt, XZR) 8130*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0A, [$\x01], #16"; 8131*9a0e4156SSadaf Ebrahimi break; 8132*9a0e4156SSadaf Ebrahimi } 8133*9a0e4156SSadaf Ebrahimi return NULL; 8134*9a0e4156SSadaf Ebrahimi case AArch64_LD1Onev1d_POST: 8135*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8136*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8137*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8138*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8139*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && 8140*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8141*9a0e4156SSadaf Ebrahimi // (LD1Onev1d_POST GPR64sp:$Rn, VecListOne1d:$Vt, XZR) 8142*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0B, [$\x01], #8"; 8143*9a0e4156SSadaf Ebrahimi break; 8144*9a0e4156SSadaf Ebrahimi } 8145*9a0e4156SSadaf Ebrahimi return NULL; 8146*9a0e4156SSadaf Ebrahimi case AArch64_LD1Onev2d_POST: 8147*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8148*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8149*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8150*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8151*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 8152*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8153*9a0e4156SSadaf Ebrahimi // (LD1Onev2d_POST GPR64sp:$Rn, VecListOne2d:$Vt, XZR) 8154*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0C, [$\x01], #16"; 8155*9a0e4156SSadaf Ebrahimi break; 8156*9a0e4156SSadaf Ebrahimi } 8157*9a0e4156SSadaf Ebrahimi return NULL; 8158*9a0e4156SSadaf Ebrahimi case AArch64_LD1Onev2s_POST: 8159*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8160*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8161*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8162*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8163*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && 8164*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8165*9a0e4156SSadaf Ebrahimi // (LD1Onev2s_POST GPR64sp:$Rn, VecListOne2s:$Vt, XZR) 8166*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0D, [$\x01], #8"; 8167*9a0e4156SSadaf Ebrahimi break; 8168*9a0e4156SSadaf Ebrahimi } 8169*9a0e4156SSadaf Ebrahimi return NULL; 8170*9a0e4156SSadaf Ebrahimi case AArch64_LD1Onev4h_POST: 8171*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8172*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8173*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8174*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8175*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && 8176*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8177*9a0e4156SSadaf Ebrahimi // (LD1Onev4h_POST GPR64sp:$Rn, VecListOne4h:$Vt, XZR) 8178*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0E, [$\x01], #8"; 8179*9a0e4156SSadaf Ebrahimi break; 8180*9a0e4156SSadaf Ebrahimi } 8181*9a0e4156SSadaf Ebrahimi return NULL; 8182*9a0e4156SSadaf Ebrahimi case AArch64_LD1Onev4s_POST: 8183*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8184*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8185*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8186*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8187*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 8188*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8189*9a0e4156SSadaf Ebrahimi // (LD1Onev4s_POST GPR64sp:$Rn, VecListOne4s:$Vt, XZR) 8190*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0F, [$\x01], #16"; 8191*9a0e4156SSadaf Ebrahimi break; 8192*9a0e4156SSadaf Ebrahimi } 8193*9a0e4156SSadaf Ebrahimi return NULL; 8194*9a0e4156SSadaf Ebrahimi case AArch64_LD1Onev8b_POST: 8195*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8196*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8197*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8198*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8199*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && 8200*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8201*9a0e4156SSadaf Ebrahimi // (LD1Onev8b_POST GPR64sp:$Rn, VecListOne8b:$Vt, XZR) 8202*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x10, [$\x01], #8"; 8203*9a0e4156SSadaf Ebrahimi break; 8204*9a0e4156SSadaf Ebrahimi } 8205*9a0e4156SSadaf Ebrahimi return NULL; 8206*9a0e4156SSadaf Ebrahimi case AArch64_LD1Onev8h_POST: 8207*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8208*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8209*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8210*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8211*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 8212*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8213*9a0e4156SSadaf Ebrahimi // (LD1Onev8h_POST GPR64sp:$Rn, VecListOne8h:$Vt, XZR) 8214*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x11, [$\x01], #16"; 8215*9a0e4156SSadaf Ebrahimi break; 8216*9a0e4156SSadaf Ebrahimi } 8217*9a0e4156SSadaf Ebrahimi return NULL; 8218*9a0e4156SSadaf Ebrahimi case AArch64_LD1Rv16b_POST: 8219*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8220*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8221*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8222*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8223*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 8224*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8225*9a0e4156SSadaf Ebrahimi // (LD1Rv16b_POST GPR64sp:$Rn, VecListOne16b:$Vt, XZR) 8226*9a0e4156SSadaf Ebrahimi AsmString = "ld1r $\xFF\x02\x0A, [$\x01], #1"; 8227*9a0e4156SSadaf Ebrahimi break; 8228*9a0e4156SSadaf Ebrahimi } 8229*9a0e4156SSadaf Ebrahimi return NULL; 8230*9a0e4156SSadaf Ebrahimi case AArch64_LD1Rv1d_POST: 8231*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8232*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8233*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8234*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8235*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && 8236*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8237*9a0e4156SSadaf Ebrahimi // (LD1Rv1d_POST GPR64sp:$Rn, VecListOne1d:$Vt, XZR) 8238*9a0e4156SSadaf Ebrahimi AsmString = "ld1r $\xFF\x02\x0B, [$\x01], #8"; 8239*9a0e4156SSadaf Ebrahimi break; 8240*9a0e4156SSadaf Ebrahimi } 8241*9a0e4156SSadaf Ebrahimi return NULL; 8242*9a0e4156SSadaf Ebrahimi case AArch64_LD1Rv2d_POST: 8243*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8244*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8245*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8246*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8247*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 8248*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8249*9a0e4156SSadaf Ebrahimi // (LD1Rv2d_POST GPR64sp:$Rn, VecListOne2d:$Vt, XZR) 8250*9a0e4156SSadaf Ebrahimi AsmString = "ld1r $\xFF\x02\x0C, [$\x01], #8"; 8251*9a0e4156SSadaf Ebrahimi break; 8252*9a0e4156SSadaf Ebrahimi } 8253*9a0e4156SSadaf Ebrahimi return NULL; 8254*9a0e4156SSadaf Ebrahimi case AArch64_LD1Rv2s_POST: 8255*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8256*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8257*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8258*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8259*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && 8260*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8261*9a0e4156SSadaf Ebrahimi // (LD1Rv2s_POST GPR64sp:$Rn, VecListOne2s:$Vt, XZR) 8262*9a0e4156SSadaf Ebrahimi AsmString = "ld1r $\xFF\x02\x0D, [$\x01], #4"; 8263*9a0e4156SSadaf Ebrahimi break; 8264*9a0e4156SSadaf Ebrahimi } 8265*9a0e4156SSadaf Ebrahimi return NULL; 8266*9a0e4156SSadaf Ebrahimi case AArch64_LD1Rv4h_POST: 8267*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8268*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8269*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8270*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8271*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && 8272*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8273*9a0e4156SSadaf Ebrahimi // (LD1Rv4h_POST GPR64sp:$Rn, VecListOne4h:$Vt, XZR) 8274*9a0e4156SSadaf Ebrahimi AsmString = "ld1r $\xFF\x02\x0E, [$\x01], #2"; 8275*9a0e4156SSadaf Ebrahimi break; 8276*9a0e4156SSadaf Ebrahimi } 8277*9a0e4156SSadaf Ebrahimi return NULL; 8278*9a0e4156SSadaf Ebrahimi case AArch64_LD1Rv4s_POST: 8279*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8280*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8281*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8282*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8283*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 8284*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8285*9a0e4156SSadaf Ebrahimi // (LD1Rv4s_POST GPR64sp:$Rn, VecListOne4s:$Vt, XZR) 8286*9a0e4156SSadaf Ebrahimi AsmString = "ld1r $\xFF\x02\x0F, [$\x01], #4"; 8287*9a0e4156SSadaf Ebrahimi break; 8288*9a0e4156SSadaf Ebrahimi } 8289*9a0e4156SSadaf Ebrahimi return NULL; 8290*9a0e4156SSadaf Ebrahimi case AArch64_LD1Rv8b_POST: 8291*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8292*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8293*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8294*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8295*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && 8296*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8297*9a0e4156SSadaf Ebrahimi // (LD1Rv8b_POST GPR64sp:$Rn, VecListOne8b:$Vt, XZR) 8298*9a0e4156SSadaf Ebrahimi AsmString = "ld1r $\xFF\x02\x10, [$\x01], #1"; 8299*9a0e4156SSadaf Ebrahimi break; 8300*9a0e4156SSadaf Ebrahimi } 8301*9a0e4156SSadaf Ebrahimi return NULL; 8302*9a0e4156SSadaf Ebrahimi case AArch64_LD1Rv8h_POST: 8303*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8304*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8305*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8306*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8307*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 8308*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8309*9a0e4156SSadaf Ebrahimi // (LD1Rv8h_POST GPR64sp:$Rn, VecListOne8h:$Vt, XZR) 8310*9a0e4156SSadaf Ebrahimi AsmString = "ld1r $\xFF\x02\x11, [$\x01], #2"; 8311*9a0e4156SSadaf Ebrahimi break; 8312*9a0e4156SSadaf Ebrahimi } 8313*9a0e4156SSadaf Ebrahimi return NULL; 8314*9a0e4156SSadaf Ebrahimi case AArch64_LD1Threev16b_POST: 8315*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8316*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8317*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8318*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8319*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 8320*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8321*9a0e4156SSadaf Ebrahimi // (LD1Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) 8322*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0A, [$\x01], #48"; 8323*9a0e4156SSadaf Ebrahimi break; 8324*9a0e4156SSadaf Ebrahimi } 8325*9a0e4156SSadaf Ebrahimi return NULL; 8326*9a0e4156SSadaf Ebrahimi case AArch64_LD1Threev1d_POST: 8327*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8328*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8329*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8330*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8331*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && 8332*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8333*9a0e4156SSadaf Ebrahimi // (LD1Threev1d_POST GPR64sp:$Rn, VecListThree1d:$Vt, XZR) 8334*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0B, [$\x01], #24"; 8335*9a0e4156SSadaf Ebrahimi break; 8336*9a0e4156SSadaf Ebrahimi } 8337*9a0e4156SSadaf Ebrahimi return NULL; 8338*9a0e4156SSadaf Ebrahimi case AArch64_LD1Threev2d_POST: 8339*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8340*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8341*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8342*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8343*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 8344*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8345*9a0e4156SSadaf Ebrahimi // (LD1Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) 8346*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0C, [$\x01], #48"; 8347*9a0e4156SSadaf Ebrahimi break; 8348*9a0e4156SSadaf Ebrahimi } 8349*9a0e4156SSadaf Ebrahimi return NULL; 8350*9a0e4156SSadaf Ebrahimi case AArch64_LD1Threev2s_POST: 8351*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8352*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8353*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8354*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8355*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && 8356*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8357*9a0e4156SSadaf Ebrahimi // (LD1Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) 8358*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0D, [$\x01], #24"; 8359*9a0e4156SSadaf Ebrahimi break; 8360*9a0e4156SSadaf Ebrahimi } 8361*9a0e4156SSadaf Ebrahimi return NULL; 8362*9a0e4156SSadaf Ebrahimi case AArch64_LD1Threev4h_POST: 8363*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8364*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8365*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8366*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8367*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && 8368*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8369*9a0e4156SSadaf Ebrahimi // (LD1Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) 8370*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0E, [$\x01], #24"; 8371*9a0e4156SSadaf Ebrahimi break; 8372*9a0e4156SSadaf Ebrahimi } 8373*9a0e4156SSadaf Ebrahimi return NULL; 8374*9a0e4156SSadaf Ebrahimi case AArch64_LD1Threev4s_POST: 8375*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8376*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8377*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8378*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8379*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 8380*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8381*9a0e4156SSadaf Ebrahimi // (LD1Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) 8382*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0F, [$\x01], #48"; 8383*9a0e4156SSadaf Ebrahimi break; 8384*9a0e4156SSadaf Ebrahimi } 8385*9a0e4156SSadaf Ebrahimi return NULL; 8386*9a0e4156SSadaf Ebrahimi case AArch64_LD1Threev8b_POST: 8387*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8388*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8389*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8390*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8391*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && 8392*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8393*9a0e4156SSadaf Ebrahimi // (LD1Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) 8394*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x10, [$\x01], #24"; 8395*9a0e4156SSadaf Ebrahimi break; 8396*9a0e4156SSadaf Ebrahimi } 8397*9a0e4156SSadaf Ebrahimi return NULL; 8398*9a0e4156SSadaf Ebrahimi case AArch64_LD1Threev8h_POST: 8399*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8400*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8401*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8402*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8403*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 8404*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8405*9a0e4156SSadaf Ebrahimi // (LD1Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) 8406*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x11, [$\x01], #48"; 8407*9a0e4156SSadaf Ebrahimi break; 8408*9a0e4156SSadaf Ebrahimi } 8409*9a0e4156SSadaf Ebrahimi return NULL; 8410*9a0e4156SSadaf Ebrahimi case AArch64_LD1Twov16b_POST: 8411*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8412*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8413*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8414*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8415*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 8416*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8417*9a0e4156SSadaf Ebrahimi // (LD1Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) 8418*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0A, [$\x01], #32"; 8419*9a0e4156SSadaf Ebrahimi break; 8420*9a0e4156SSadaf Ebrahimi } 8421*9a0e4156SSadaf Ebrahimi return NULL; 8422*9a0e4156SSadaf Ebrahimi case AArch64_LD1Twov1d_POST: 8423*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8424*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8425*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8426*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8427*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && 8428*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8429*9a0e4156SSadaf Ebrahimi // (LD1Twov1d_POST GPR64sp:$Rn, VecListTwo1d:$Vt, XZR) 8430*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0B, [$\x01], #16"; 8431*9a0e4156SSadaf Ebrahimi break; 8432*9a0e4156SSadaf Ebrahimi } 8433*9a0e4156SSadaf Ebrahimi return NULL; 8434*9a0e4156SSadaf Ebrahimi case AArch64_LD1Twov2d_POST: 8435*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8436*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8437*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8438*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8439*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 8440*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8441*9a0e4156SSadaf Ebrahimi // (LD1Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) 8442*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0C, [$\x01], #32"; 8443*9a0e4156SSadaf Ebrahimi break; 8444*9a0e4156SSadaf Ebrahimi } 8445*9a0e4156SSadaf Ebrahimi return NULL; 8446*9a0e4156SSadaf Ebrahimi case AArch64_LD1Twov2s_POST: 8447*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8448*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8449*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8450*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8451*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && 8452*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8453*9a0e4156SSadaf Ebrahimi // (LD1Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) 8454*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0D, [$\x01], #16"; 8455*9a0e4156SSadaf Ebrahimi break; 8456*9a0e4156SSadaf Ebrahimi } 8457*9a0e4156SSadaf Ebrahimi return NULL; 8458*9a0e4156SSadaf Ebrahimi case AArch64_LD1Twov4h_POST: 8459*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8460*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8461*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8462*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8463*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && 8464*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8465*9a0e4156SSadaf Ebrahimi // (LD1Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) 8466*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0E, [$\x01], #16"; 8467*9a0e4156SSadaf Ebrahimi break; 8468*9a0e4156SSadaf Ebrahimi } 8469*9a0e4156SSadaf Ebrahimi return NULL; 8470*9a0e4156SSadaf Ebrahimi case AArch64_LD1Twov4s_POST: 8471*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8472*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8473*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8474*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8475*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 8476*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8477*9a0e4156SSadaf Ebrahimi // (LD1Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) 8478*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x0F, [$\x01], #32"; 8479*9a0e4156SSadaf Ebrahimi break; 8480*9a0e4156SSadaf Ebrahimi } 8481*9a0e4156SSadaf Ebrahimi return NULL; 8482*9a0e4156SSadaf Ebrahimi case AArch64_LD1Twov8b_POST: 8483*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8484*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8485*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8486*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8487*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && 8488*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8489*9a0e4156SSadaf Ebrahimi // (LD1Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) 8490*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x10, [$\x01], #16"; 8491*9a0e4156SSadaf Ebrahimi break; 8492*9a0e4156SSadaf Ebrahimi } 8493*9a0e4156SSadaf Ebrahimi return NULL; 8494*9a0e4156SSadaf Ebrahimi case AArch64_LD1Twov8h_POST: 8495*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8496*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8497*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8498*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8499*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 8500*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8501*9a0e4156SSadaf Ebrahimi // (LD1Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) 8502*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x11, [$\x01], #32"; 8503*9a0e4156SSadaf Ebrahimi break; 8504*9a0e4156SSadaf Ebrahimi } 8505*9a0e4156SSadaf Ebrahimi return NULL; 8506*9a0e4156SSadaf Ebrahimi case AArch64_LD1i16_POST: 8507*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 8508*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8509*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8510*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8511*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 8512*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 8513*9a0e4156SSadaf Ebrahimi // (LD1i16_POST GPR64sp:$Rn, VecListOneh:$Vt, VectorIndexH:$idx, XZR) 8514*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #2"; 8515*9a0e4156SSadaf Ebrahimi break; 8516*9a0e4156SSadaf Ebrahimi } 8517*9a0e4156SSadaf Ebrahimi return NULL; 8518*9a0e4156SSadaf Ebrahimi case AArch64_LD1i32_POST: 8519*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 8520*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8521*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8522*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8523*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 8524*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 8525*9a0e4156SSadaf Ebrahimi // (LD1i32_POST GPR64sp:$Rn, VecListOnes:$Vt, VectorIndexS:$idx, XZR) 8526*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #4"; 8527*9a0e4156SSadaf Ebrahimi break; 8528*9a0e4156SSadaf Ebrahimi } 8529*9a0e4156SSadaf Ebrahimi return NULL; 8530*9a0e4156SSadaf Ebrahimi case AArch64_LD1i64_POST: 8531*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 8532*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8533*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8534*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8535*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 8536*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 8537*9a0e4156SSadaf Ebrahimi // (LD1i64_POST GPR64sp:$Rn, VecListOned:$Vt, VectorIndexD:$idx, XZR) 8538*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #8"; 8539*9a0e4156SSadaf Ebrahimi break; 8540*9a0e4156SSadaf Ebrahimi } 8541*9a0e4156SSadaf Ebrahimi return NULL; 8542*9a0e4156SSadaf Ebrahimi case AArch64_LD1i8_POST: 8543*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 8544*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8545*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8546*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8547*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 8548*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 8549*9a0e4156SSadaf Ebrahimi // (LD1i8_POST GPR64sp:$Rn, VecListOneb:$Vt, VectorIndexB:$idx, XZR) 8550*9a0e4156SSadaf Ebrahimi AsmString = "ld1 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #1"; 8551*9a0e4156SSadaf Ebrahimi break; 8552*9a0e4156SSadaf Ebrahimi } 8553*9a0e4156SSadaf Ebrahimi return NULL; 8554*9a0e4156SSadaf Ebrahimi case AArch64_LD2Rv16b_POST: 8555*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8556*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8557*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8558*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8559*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 8560*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8561*9a0e4156SSadaf Ebrahimi // (LD2Rv16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) 8562*9a0e4156SSadaf Ebrahimi AsmString = "ld2r $\xFF\x02\x0A, [$\x01], #2"; 8563*9a0e4156SSadaf Ebrahimi break; 8564*9a0e4156SSadaf Ebrahimi } 8565*9a0e4156SSadaf Ebrahimi return NULL; 8566*9a0e4156SSadaf Ebrahimi case AArch64_LD2Rv1d_POST: 8567*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8568*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8569*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8570*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8571*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && 8572*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8573*9a0e4156SSadaf Ebrahimi // (LD2Rv1d_POST GPR64sp:$Rn, VecListTwo1d:$Vt, XZR) 8574*9a0e4156SSadaf Ebrahimi AsmString = "ld2r $\xFF\x02\x0B, [$\x01], #16"; 8575*9a0e4156SSadaf Ebrahimi break; 8576*9a0e4156SSadaf Ebrahimi } 8577*9a0e4156SSadaf Ebrahimi return NULL; 8578*9a0e4156SSadaf Ebrahimi case AArch64_LD2Rv2d_POST: 8579*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8580*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8581*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8582*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8583*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 8584*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8585*9a0e4156SSadaf Ebrahimi // (LD2Rv2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) 8586*9a0e4156SSadaf Ebrahimi AsmString = "ld2r $\xFF\x02\x0C, [$\x01], #16"; 8587*9a0e4156SSadaf Ebrahimi break; 8588*9a0e4156SSadaf Ebrahimi } 8589*9a0e4156SSadaf Ebrahimi return NULL; 8590*9a0e4156SSadaf Ebrahimi case AArch64_LD2Rv2s_POST: 8591*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8592*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8593*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8594*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8595*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && 8596*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8597*9a0e4156SSadaf Ebrahimi // (LD2Rv2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) 8598*9a0e4156SSadaf Ebrahimi AsmString = "ld2r $\xFF\x02\x0D, [$\x01], #8"; 8599*9a0e4156SSadaf Ebrahimi break; 8600*9a0e4156SSadaf Ebrahimi } 8601*9a0e4156SSadaf Ebrahimi return NULL; 8602*9a0e4156SSadaf Ebrahimi case AArch64_LD2Rv4h_POST: 8603*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8604*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8605*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8606*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8607*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && 8608*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8609*9a0e4156SSadaf Ebrahimi // (LD2Rv4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) 8610*9a0e4156SSadaf Ebrahimi AsmString = "ld2r $\xFF\x02\x0E, [$\x01], #4"; 8611*9a0e4156SSadaf Ebrahimi break; 8612*9a0e4156SSadaf Ebrahimi } 8613*9a0e4156SSadaf Ebrahimi return NULL; 8614*9a0e4156SSadaf Ebrahimi case AArch64_LD2Rv4s_POST: 8615*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8616*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8617*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8618*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8619*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 8620*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8621*9a0e4156SSadaf Ebrahimi // (LD2Rv4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) 8622*9a0e4156SSadaf Ebrahimi AsmString = "ld2r $\xFF\x02\x0F, [$\x01], #8"; 8623*9a0e4156SSadaf Ebrahimi break; 8624*9a0e4156SSadaf Ebrahimi } 8625*9a0e4156SSadaf Ebrahimi return NULL; 8626*9a0e4156SSadaf Ebrahimi case AArch64_LD2Rv8b_POST: 8627*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8628*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8629*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8630*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8631*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && 8632*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8633*9a0e4156SSadaf Ebrahimi // (LD2Rv8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) 8634*9a0e4156SSadaf Ebrahimi AsmString = "ld2r $\xFF\x02\x10, [$\x01], #2"; 8635*9a0e4156SSadaf Ebrahimi break; 8636*9a0e4156SSadaf Ebrahimi } 8637*9a0e4156SSadaf Ebrahimi return NULL; 8638*9a0e4156SSadaf Ebrahimi case AArch64_LD2Rv8h_POST: 8639*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8640*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8641*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8642*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8643*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 8644*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8645*9a0e4156SSadaf Ebrahimi // (LD2Rv8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) 8646*9a0e4156SSadaf Ebrahimi AsmString = "ld2r $\xFF\x02\x11, [$\x01], #4"; 8647*9a0e4156SSadaf Ebrahimi break; 8648*9a0e4156SSadaf Ebrahimi } 8649*9a0e4156SSadaf Ebrahimi return NULL; 8650*9a0e4156SSadaf Ebrahimi case AArch64_LD2Twov16b_POST: 8651*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8652*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8653*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8654*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8655*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 8656*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8657*9a0e4156SSadaf Ebrahimi // (LD2Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) 8658*9a0e4156SSadaf Ebrahimi AsmString = "ld2 $\xFF\x02\x0A, [$\x01], #32"; 8659*9a0e4156SSadaf Ebrahimi break; 8660*9a0e4156SSadaf Ebrahimi } 8661*9a0e4156SSadaf Ebrahimi return NULL; 8662*9a0e4156SSadaf Ebrahimi case AArch64_LD2Twov2d_POST: 8663*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8664*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8665*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8666*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8667*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 8668*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8669*9a0e4156SSadaf Ebrahimi // (LD2Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) 8670*9a0e4156SSadaf Ebrahimi AsmString = "ld2 $\xFF\x02\x0C, [$\x01], #32"; 8671*9a0e4156SSadaf Ebrahimi break; 8672*9a0e4156SSadaf Ebrahimi } 8673*9a0e4156SSadaf Ebrahimi return NULL; 8674*9a0e4156SSadaf Ebrahimi case AArch64_LD2Twov2s_POST: 8675*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8676*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8677*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8678*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8679*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && 8680*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8681*9a0e4156SSadaf Ebrahimi // (LD2Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) 8682*9a0e4156SSadaf Ebrahimi AsmString = "ld2 $\xFF\x02\x0D, [$\x01], #16"; 8683*9a0e4156SSadaf Ebrahimi break; 8684*9a0e4156SSadaf Ebrahimi } 8685*9a0e4156SSadaf Ebrahimi return NULL; 8686*9a0e4156SSadaf Ebrahimi case AArch64_LD2Twov4h_POST: 8687*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8688*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8689*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8690*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8691*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && 8692*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8693*9a0e4156SSadaf Ebrahimi // (LD2Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) 8694*9a0e4156SSadaf Ebrahimi AsmString = "ld2 $\xFF\x02\x0E, [$\x01], #16"; 8695*9a0e4156SSadaf Ebrahimi break; 8696*9a0e4156SSadaf Ebrahimi } 8697*9a0e4156SSadaf Ebrahimi return NULL; 8698*9a0e4156SSadaf Ebrahimi case AArch64_LD2Twov4s_POST: 8699*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8700*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8701*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8702*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8703*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 8704*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8705*9a0e4156SSadaf Ebrahimi // (LD2Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) 8706*9a0e4156SSadaf Ebrahimi AsmString = "ld2 $\xFF\x02\x0F, [$\x01], #32"; 8707*9a0e4156SSadaf Ebrahimi break; 8708*9a0e4156SSadaf Ebrahimi } 8709*9a0e4156SSadaf Ebrahimi return NULL; 8710*9a0e4156SSadaf Ebrahimi case AArch64_LD2Twov8b_POST: 8711*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8712*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8713*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8714*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8715*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && 8716*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8717*9a0e4156SSadaf Ebrahimi // (LD2Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) 8718*9a0e4156SSadaf Ebrahimi AsmString = "ld2 $\xFF\x02\x10, [$\x01], #16"; 8719*9a0e4156SSadaf Ebrahimi break; 8720*9a0e4156SSadaf Ebrahimi } 8721*9a0e4156SSadaf Ebrahimi return NULL; 8722*9a0e4156SSadaf Ebrahimi case AArch64_LD2Twov8h_POST: 8723*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8724*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8725*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8726*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8727*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 8728*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8729*9a0e4156SSadaf Ebrahimi // (LD2Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) 8730*9a0e4156SSadaf Ebrahimi AsmString = "ld2 $\xFF\x02\x11, [$\x01], #32"; 8731*9a0e4156SSadaf Ebrahimi break; 8732*9a0e4156SSadaf Ebrahimi } 8733*9a0e4156SSadaf Ebrahimi return NULL; 8734*9a0e4156SSadaf Ebrahimi case AArch64_LD2i16_POST: 8735*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 8736*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8737*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8738*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8739*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 8740*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 8741*9a0e4156SSadaf Ebrahimi // (LD2i16_POST GPR64sp:$Rn, VecListTwoh:$Vt, VectorIndexH:$idx, XZR) 8742*9a0e4156SSadaf Ebrahimi AsmString = "ld2 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #4"; 8743*9a0e4156SSadaf Ebrahimi break; 8744*9a0e4156SSadaf Ebrahimi } 8745*9a0e4156SSadaf Ebrahimi return NULL; 8746*9a0e4156SSadaf Ebrahimi case AArch64_LD2i32_POST: 8747*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 8748*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8749*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8750*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8751*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 8752*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 8753*9a0e4156SSadaf Ebrahimi // (LD2i32_POST GPR64sp:$Rn, VecListTwos:$Vt, VectorIndexS:$idx, XZR) 8754*9a0e4156SSadaf Ebrahimi AsmString = "ld2 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #8"; 8755*9a0e4156SSadaf Ebrahimi break; 8756*9a0e4156SSadaf Ebrahimi } 8757*9a0e4156SSadaf Ebrahimi return NULL; 8758*9a0e4156SSadaf Ebrahimi case AArch64_LD2i64_POST: 8759*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 8760*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8761*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8762*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8763*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 8764*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 8765*9a0e4156SSadaf Ebrahimi // (LD2i64_POST GPR64sp:$Rn, VecListTwod:$Vt, VectorIndexD:$idx, XZR) 8766*9a0e4156SSadaf Ebrahimi AsmString = "ld2 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #16"; 8767*9a0e4156SSadaf Ebrahimi break; 8768*9a0e4156SSadaf Ebrahimi } 8769*9a0e4156SSadaf Ebrahimi return NULL; 8770*9a0e4156SSadaf Ebrahimi case AArch64_LD2i8_POST: 8771*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 8772*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8773*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8774*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8775*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 8776*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 8777*9a0e4156SSadaf Ebrahimi // (LD2i8_POST GPR64sp:$Rn, VecListTwob:$Vt, VectorIndexB:$idx, XZR) 8778*9a0e4156SSadaf Ebrahimi AsmString = "ld2 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #2"; 8779*9a0e4156SSadaf Ebrahimi break; 8780*9a0e4156SSadaf Ebrahimi } 8781*9a0e4156SSadaf Ebrahimi return NULL; 8782*9a0e4156SSadaf Ebrahimi case AArch64_LD3Rv16b_POST: 8783*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8784*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8785*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8786*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8787*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 8788*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8789*9a0e4156SSadaf Ebrahimi // (LD3Rv16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) 8790*9a0e4156SSadaf Ebrahimi AsmString = "ld3r $\xFF\x02\x0A, [$\x01], #3"; 8791*9a0e4156SSadaf Ebrahimi break; 8792*9a0e4156SSadaf Ebrahimi } 8793*9a0e4156SSadaf Ebrahimi return NULL; 8794*9a0e4156SSadaf Ebrahimi case AArch64_LD3Rv1d_POST: 8795*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8796*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8797*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8798*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8799*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && 8800*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8801*9a0e4156SSadaf Ebrahimi // (LD3Rv1d_POST GPR64sp:$Rn, VecListThree1d:$Vt, XZR) 8802*9a0e4156SSadaf Ebrahimi AsmString = "ld3r $\xFF\x02\x0B, [$\x01], #24"; 8803*9a0e4156SSadaf Ebrahimi break; 8804*9a0e4156SSadaf Ebrahimi } 8805*9a0e4156SSadaf Ebrahimi return NULL; 8806*9a0e4156SSadaf Ebrahimi case AArch64_LD3Rv2d_POST: 8807*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8808*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8809*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8810*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8811*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 8812*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8813*9a0e4156SSadaf Ebrahimi // (LD3Rv2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) 8814*9a0e4156SSadaf Ebrahimi AsmString = "ld3r $\xFF\x02\x0C, [$\x01], #24"; 8815*9a0e4156SSadaf Ebrahimi break; 8816*9a0e4156SSadaf Ebrahimi } 8817*9a0e4156SSadaf Ebrahimi return NULL; 8818*9a0e4156SSadaf Ebrahimi case AArch64_LD3Rv2s_POST: 8819*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8820*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8821*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8822*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8823*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && 8824*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8825*9a0e4156SSadaf Ebrahimi // (LD3Rv2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) 8826*9a0e4156SSadaf Ebrahimi AsmString = "ld3r $\xFF\x02\x0D, [$\x01], #12"; 8827*9a0e4156SSadaf Ebrahimi break; 8828*9a0e4156SSadaf Ebrahimi } 8829*9a0e4156SSadaf Ebrahimi return NULL; 8830*9a0e4156SSadaf Ebrahimi case AArch64_LD3Rv4h_POST: 8831*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8832*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8833*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8834*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8835*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && 8836*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8837*9a0e4156SSadaf Ebrahimi // (LD3Rv4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) 8838*9a0e4156SSadaf Ebrahimi AsmString = "ld3r $\xFF\x02\x0E, [$\x01], #6"; 8839*9a0e4156SSadaf Ebrahimi break; 8840*9a0e4156SSadaf Ebrahimi } 8841*9a0e4156SSadaf Ebrahimi return NULL; 8842*9a0e4156SSadaf Ebrahimi case AArch64_LD3Rv4s_POST: 8843*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8844*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8845*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8846*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8847*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 8848*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8849*9a0e4156SSadaf Ebrahimi // (LD3Rv4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) 8850*9a0e4156SSadaf Ebrahimi AsmString = "ld3r $\xFF\x02\x0F, [$\x01], #12"; 8851*9a0e4156SSadaf Ebrahimi break; 8852*9a0e4156SSadaf Ebrahimi } 8853*9a0e4156SSadaf Ebrahimi return NULL; 8854*9a0e4156SSadaf Ebrahimi case AArch64_LD3Rv8b_POST: 8855*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8856*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8857*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8858*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8859*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && 8860*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8861*9a0e4156SSadaf Ebrahimi // (LD3Rv8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) 8862*9a0e4156SSadaf Ebrahimi AsmString = "ld3r $\xFF\x02\x10, [$\x01], #3"; 8863*9a0e4156SSadaf Ebrahimi break; 8864*9a0e4156SSadaf Ebrahimi } 8865*9a0e4156SSadaf Ebrahimi return NULL; 8866*9a0e4156SSadaf Ebrahimi case AArch64_LD3Rv8h_POST: 8867*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8868*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8869*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8870*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8871*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 8872*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8873*9a0e4156SSadaf Ebrahimi // (LD3Rv8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) 8874*9a0e4156SSadaf Ebrahimi AsmString = "ld3r $\xFF\x02\x11, [$\x01], #6"; 8875*9a0e4156SSadaf Ebrahimi break; 8876*9a0e4156SSadaf Ebrahimi } 8877*9a0e4156SSadaf Ebrahimi return NULL; 8878*9a0e4156SSadaf Ebrahimi case AArch64_LD3Threev16b_POST: 8879*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8880*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8881*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8882*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8883*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 8884*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8885*9a0e4156SSadaf Ebrahimi // (LD3Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) 8886*9a0e4156SSadaf Ebrahimi AsmString = "ld3 $\xFF\x02\x0A, [$\x01], #48"; 8887*9a0e4156SSadaf Ebrahimi break; 8888*9a0e4156SSadaf Ebrahimi } 8889*9a0e4156SSadaf Ebrahimi return NULL; 8890*9a0e4156SSadaf Ebrahimi case AArch64_LD3Threev2d_POST: 8891*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8892*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8893*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8894*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8895*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 8896*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8897*9a0e4156SSadaf Ebrahimi // (LD3Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) 8898*9a0e4156SSadaf Ebrahimi AsmString = "ld3 $\xFF\x02\x0C, [$\x01], #48"; 8899*9a0e4156SSadaf Ebrahimi break; 8900*9a0e4156SSadaf Ebrahimi } 8901*9a0e4156SSadaf Ebrahimi return NULL; 8902*9a0e4156SSadaf Ebrahimi case AArch64_LD3Threev2s_POST: 8903*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8904*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8905*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8906*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8907*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && 8908*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8909*9a0e4156SSadaf Ebrahimi // (LD3Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) 8910*9a0e4156SSadaf Ebrahimi AsmString = "ld3 $\xFF\x02\x0D, [$\x01], #24"; 8911*9a0e4156SSadaf Ebrahimi break; 8912*9a0e4156SSadaf Ebrahimi } 8913*9a0e4156SSadaf Ebrahimi return NULL; 8914*9a0e4156SSadaf Ebrahimi case AArch64_LD3Threev4h_POST: 8915*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8916*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8917*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8918*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8919*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && 8920*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8921*9a0e4156SSadaf Ebrahimi // (LD3Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) 8922*9a0e4156SSadaf Ebrahimi AsmString = "ld3 $\xFF\x02\x0E, [$\x01], #24"; 8923*9a0e4156SSadaf Ebrahimi break; 8924*9a0e4156SSadaf Ebrahimi } 8925*9a0e4156SSadaf Ebrahimi return NULL; 8926*9a0e4156SSadaf Ebrahimi case AArch64_LD3Threev4s_POST: 8927*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8928*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8929*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8930*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8931*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 8932*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8933*9a0e4156SSadaf Ebrahimi // (LD3Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) 8934*9a0e4156SSadaf Ebrahimi AsmString = "ld3 $\xFF\x02\x0F, [$\x01], #48"; 8935*9a0e4156SSadaf Ebrahimi break; 8936*9a0e4156SSadaf Ebrahimi } 8937*9a0e4156SSadaf Ebrahimi return NULL; 8938*9a0e4156SSadaf Ebrahimi case AArch64_LD3Threev8b_POST: 8939*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8940*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8941*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8942*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8943*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && 8944*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8945*9a0e4156SSadaf Ebrahimi // (LD3Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) 8946*9a0e4156SSadaf Ebrahimi AsmString = "ld3 $\xFF\x02\x10, [$\x01], #24"; 8947*9a0e4156SSadaf Ebrahimi break; 8948*9a0e4156SSadaf Ebrahimi } 8949*9a0e4156SSadaf Ebrahimi return NULL; 8950*9a0e4156SSadaf Ebrahimi case AArch64_LD3Threev8h_POST: 8951*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 8952*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8953*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8954*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8955*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 8956*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 8957*9a0e4156SSadaf Ebrahimi // (LD3Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) 8958*9a0e4156SSadaf Ebrahimi AsmString = "ld3 $\xFF\x02\x11, [$\x01], #48"; 8959*9a0e4156SSadaf Ebrahimi break; 8960*9a0e4156SSadaf Ebrahimi } 8961*9a0e4156SSadaf Ebrahimi return NULL; 8962*9a0e4156SSadaf Ebrahimi case AArch64_LD3i16_POST: 8963*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 8964*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8965*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8966*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8967*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 8968*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 8969*9a0e4156SSadaf Ebrahimi // (LD3i16_POST GPR64sp:$Rn, VecListThreeh:$Vt, VectorIndexH:$idx, XZR) 8970*9a0e4156SSadaf Ebrahimi AsmString = "ld3 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #6"; 8971*9a0e4156SSadaf Ebrahimi break; 8972*9a0e4156SSadaf Ebrahimi } 8973*9a0e4156SSadaf Ebrahimi return NULL; 8974*9a0e4156SSadaf Ebrahimi case AArch64_LD3i32_POST: 8975*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 8976*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8977*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8978*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8979*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 8980*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 8981*9a0e4156SSadaf Ebrahimi // (LD3i32_POST GPR64sp:$Rn, VecListThrees:$Vt, VectorIndexS:$idx, XZR) 8982*9a0e4156SSadaf Ebrahimi AsmString = "ld3 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #12"; 8983*9a0e4156SSadaf Ebrahimi break; 8984*9a0e4156SSadaf Ebrahimi } 8985*9a0e4156SSadaf Ebrahimi return NULL; 8986*9a0e4156SSadaf Ebrahimi case AArch64_LD3i64_POST: 8987*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 8988*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 8989*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 8990*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 8991*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 8992*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 8993*9a0e4156SSadaf Ebrahimi // (LD3i64_POST GPR64sp:$Rn, VecListThreed:$Vt, VectorIndexD:$idx, XZR) 8994*9a0e4156SSadaf Ebrahimi AsmString = "ld3 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #24"; 8995*9a0e4156SSadaf Ebrahimi break; 8996*9a0e4156SSadaf Ebrahimi } 8997*9a0e4156SSadaf Ebrahimi return NULL; 8998*9a0e4156SSadaf Ebrahimi case AArch64_LD3i8_POST: 8999*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 9000*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9001*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 9002*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9003*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 9004*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 9005*9a0e4156SSadaf Ebrahimi // (LD3i8_POST GPR64sp:$Rn, VecListThreeb:$Vt, VectorIndexB:$idx, XZR) 9006*9a0e4156SSadaf Ebrahimi AsmString = "ld3 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #3"; 9007*9a0e4156SSadaf Ebrahimi break; 9008*9a0e4156SSadaf Ebrahimi } 9009*9a0e4156SSadaf Ebrahimi return NULL; 9010*9a0e4156SSadaf Ebrahimi case AArch64_LD4Fourv16b_POST: 9011*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9012*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9013*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 9014*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9015*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 9016*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 9017*9a0e4156SSadaf Ebrahimi // (LD4Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) 9018*9a0e4156SSadaf Ebrahimi AsmString = "ld4 $\xFF\x02\x0A, [$\x01], #64"; 9019*9a0e4156SSadaf Ebrahimi break; 9020*9a0e4156SSadaf Ebrahimi } 9021*9a0e4156SSadaf Ebrahimi return NULL; 9022*9a0e4156SSadaf Ebrahimi case AArch64_LD4Fourv2d_POST: 9023*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9024*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9025*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 9026*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9027*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 9028*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 9029*9a0e4156SSadaf Ebrahimi // (LD4Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) 9030*9a0e4156SSadaf Ebrahimi AsmString = "ld4 $\xFF\x02\x0C, [$\x01], #64"; 9031*9a0e4156SSadaf Ebrahimi break; 9032*9a0e4156SSadaf Ebrahimi } 9033*9a0e4156SSadaf Ebrahimi return NULL; 9034*9a0e4156SSadaf Ebrahimi case AArch64_LD4Fourv2s_POST: 9035*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9036*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9037*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 9038*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9039*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && 9040*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 9041*9a0e4156SSadaf Ebrahimi // (LD4Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) 9042*9a0e4156SSadaf Ebrahimi AsmString = "ld4 $\xFF\x02\x0D, [$\x01], #32"; 9043*9a0e4156SSadaf Ebrahimi break; 9044*9a0e4156SSadaf Ebrahimi } 9045*9a0e4156SSadaf Ebrahimi return NULL; 9046*9a0e4156SSadaf Ebrahimi case AArch64_LD4Fourv4h_POST: 9047*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9048*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9049*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 9050*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9051*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && 9052*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 9053*9a0e4156SSadaf Ebrahimi // (LD4Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) 9054*9a0e4156SSadaf Ebrahimi AsmString = "ld4 $\xFF\x02\x0E, [$\x01], #32"; 9055*9a0e4156SSadaf Ebrahimi break; 9056*9a0e4156SSadaf Ebrahimi } 9057*9a0e4156SSadaf Ebrahimi return NULL; 9058*9a0e4156SSadaf Ebrahimi case AArch64_LD4Fourv4s_POST: 9059*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9060*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9061*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 9062*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9063*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 9064*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 9065*9a0e4156SSadaf Ebrahimi // (LD4Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) 9066*9a0e4156SSadaf Ebrahimi AsmString = "ld4 $\xFF\x02\x0F, [$\x01], #64"; 9067*9a0e4156SSadaf Ebrahimi break; 9068*9a0e4156SSadaf Ebrahimi } 9069*9a0e4156SSadaf Ebrahimi return NULL; 9070*9a0e4156SSadaf Ebrahimi case AArch64_LD4Fourv8b_POST: 9071*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9072*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9073*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 9074*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9075*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && 9076*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 9077*9a0e4156SSadaf Ebrahimi // (LD4Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) 9078*9a0e4156SSadaf Ebrahimi AsmString = "ld4 $\xFF\x02\x10, [$\x01], #32"; 9079*9a0e4156SSadaf Ebrahimi break; 9080*9a0e4156SSadaf Ebrahimi } 9081*9a0e4156SSadaf Ebrahimi return NULL; 9082*9a0e4156SSadaf Ebrahimi case AArch64_LD4Fourv8h_POST: 9083*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9084*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9085*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 9086*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9087*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 9088*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 9089*9a0e4156SSadaf Ebrahimi // (LD4Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) 9090*9a0e4156SSadaf Ebrahimi AsmString = "ld4 $\xFF\x02\x11, [$\x01], #64"; 9091*9a0e4156SSadaf Ebrahimi break; 9092*9a0e4156SSadaf Ebrahimi } 9093*9a0e4156SSadaf Ebrahimi return NULL; 9094*9a0e4156SSadaf Ebrahimi case AArch64_LD4Rv16b_POST: 9095*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9096*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9097*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 9098*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9099*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 9100*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 9101*9a0e4156SSadaf Ebrahimi // (LD4Rv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) 9102*9a0e4156SSadaf Ebrahimi AsmString = "ld4r $\xFF\x02\x0A, [$\x01], #4"; 9103*9a0e4156SSadaf Ebrahimi break; 9104*9a0e4156SSadaf Ebrahimi } 9105*9a0e4156SSadaf Ebrahimi return NULL; 9106*9a0e4156SSadaf Ebrahimi case AArch64_LD4Rv1d_POST: 9107*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9108*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9109*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 9110*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9111*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && 9112*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 9113*9a0e4156SSadaf Ebrahimi // (LD4Rv1d_POST GPR64sp:$Rn, VecListFour1d:$Vt, XZR) 9114*9a0e4156SSadaf Ebrahimi AsmString = "ld4r $\xFF\x02\x0B, [$\x01], #32"; 9115*9a0e4156SSadaf Ebrahimi break; 9116*9a0e4156SSadaf Ebrahimi } 9117*9a0e4156SSadaf Ebrahimi return NULL; 9118*9a0e4156SSadaf Ebrahimi case AArch64_LD4Rv2d_POST: 9119*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9120*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9121*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 9122*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9123*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 9124*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 9125*9a0e4156SSadaf Ebrahimi // (LD4Rv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) 9126*9a0e4156SSadaf Ebrahimi AsmString = "ld4r $\xFF\x02\x0C, [$\x01], #32"; 9127*9a0e4156SSadaf Ebrahimi break; 9128*9a0e4156SSadaf Ebrahimi } 9129*9a0e4156SSadaf Ebrahimi return NULL; 9130*9a0e4156SSadaf Ebrahimi case AArch64_LD4Rv2s_POST: 9131*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9132*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9133*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 9134*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9135*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && 9136*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 9137*9a0e4156SSadaf Ebrahimi // (LD4Rv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) 9138*9a0e4156SSadaf Ebrahimi AsmString = "ld4r $\xFF\x02\x0D, [$\x01], #16"; 9139*9a0e4156SSadaf Ebrahimi break; 9140*9a0e4156SSadaf Ebrahimi } 9141*9a0e4156SSadaf Ebrahimi return NULL; 9142*9a0e4156SSadaf Ebrahimi case AArch64_LD4Rv4h_POST: 9143*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9144*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9145*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 9146*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9147*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && 9148*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 9149*9a0e4156SSadaf Ebrahimi // (LD4Rv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) 9150*9a0e4156SSadaf Ebrahimi AsmString = "ld4r $\xFF\x02\x0E, [$\x01], #8"; 9151*9a0e4156SSadaf Ebrahimi break; 9152*9a0e4156SSadaf Ebrahimi } 9153*9a0e4156SSadaf Ebrahimi return NULL; 9154*9a0e4156SSadaf Ebrahimi case AArch64_LD4Rv4s_POST: 9155*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9156*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9157*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 9158*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9159*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 9160*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 9161*9a0e4156SSadaf Ebrahimi // (LD4Rv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) 9162*9a0e4156SSadaf Ebrahimi AsmString = "ld4r $\xFF\x02\x0F, [$\x01], #16"; 9163*9a0e4156SSadaf Ebrahimi break; 9164*9a0e4156SSadaf Ebrahimi } 9165*9a0e4156SSadaf Ebrahimi return NULL; 9166*9a0e4156SSadaf Ebrahimi case AArch64_LD4Rv8b_POST: 9167*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9168*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9169*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 9170*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9171*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && 9172*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 9173*9a0e4156SSadaf Ebrahimi // (LD4Rv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) 9174*9a0e4156SSadaf Ebrahimi AsmString = "ld4r $\xFF\x02\x10, [$\x01], #4"; 9175*9a0e4156SSadaf Ebrahimi break; 9176*9a0e4156SSadaf Ebrahimi } 9177*9a0e4156SSadaf Ebrahimi return NULL; 9178*9a0e4156SSadaf Ebrahimi case AArch64_LD4Rv8h_POST: 9179*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9180*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9181*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 9182*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9183*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 9184*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 9185*9a0e4156SSadaf Ebrahimi // (LD4Rv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) 9186*9a0e4156SSadaf Ebrahimi AsmString = "ld4r $\xFF\x02\x11, [$\x01], #8"; 9187*9a0e4156SSadaf Ebrahimi break; 9188*9a0e4156SSadaf Ebrahimi } 9189*9a0e4156SSadaf Ebrahimi return NULL; 9190*9a0e4156SSadaf Ebrahimi case AArch64_LD4i16_POST: 9191*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 9192*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9193*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 9194*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9195*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 9196*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 9197*9a0e4156SSadaf Ebrahimi // (LD4i16_POST GPR64sp:$Rn, VecListFourh:$Vt, VectorIndexH:$idx, XZR) 9198*9a0e4156SSadaf Ebrahimi AsmString = "ld4 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #8"; 9199*9a0e4156SSadaf Ebrahimi break; 9200*9a0e4156SSadaf Ebrahimi } 9201*9a0e4156SSadaf Ebrahimi return NULL; 9202*9a0e4156SSadaf Ebrahimi case AArch64_LD4i32_POST: 9203*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 9204*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9205*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 9206*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9207*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 9208*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 9209*9a0e4156SSadaf Ebrahimi // (LD4i32_POST GPR64sp:$Rn, VecListFours:$Vt, VectorIndexS:$idx, XZR) 9210*9a0e4156SSadaf Ebrahimi AsmString = "ld4 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #16"; 9211*9a0e4156SSadaf Ebrahimi break; 9212*9a0e4156SSadaf Ebrahimi } 9213*9a0e4156SSadaf Ebrahimi return NULL; 9214*9a0e4156SSadaf Ebrahimi case AArch64_LD4i64_POST: 9215*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 9216*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9217*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 9218*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9219*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 9220*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 9221*9a0e4156SSadaf Ebrahimi // (LD4i64_POST GPR64sp:$Rn, VecListFourd:$Vt, VectorIndexD:$idx, XZR) 9222*9a0e4156SSadaf Ebrahimi AsmString = "ld4 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #32"; 9223*9a0e4156SSadaf Ebrahimi break; 9224*9a0e4156SSadaf Ebrahimi } 9225*9a0e4156SSadaf Ebrahimi return NULL; 9226*9a0e4156SSadaf Ebrahimi case AArch64_LD4i8_POST: 9227*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 9228*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9229*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 9230*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9231*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 9232*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 9233*9a0e4156SSadaf Ebrahimi // (LD4i8_POST GPR64sp:$Rn, VecListFourb:$Vt, VectorIndexB:$idx, XZR) 9234*9a0e4156SSadaf Ebrahimi AsmString = "ld4 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #4"; 9235*9a0e4156SSadaf Ebrahimi break; 9236*9a0e4156SSadaf Ebrahimi } 9237*9a0e4156SSadaf Ebrahimi return NULL; 9238*9a0e4156SSadaf Ebrahimi case AArch64_LDNPDi: 9239*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 9240*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9241*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && 9242*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9243*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && 9244*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9245*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && 9246*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9247*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 9248*9a0e4156SSadaf Ebrahimi // (LDNPDi FPR64:$Rt, FPR64:$Rt2, GPR64sp:$Rn, 0) 9249*9a0e4156SSadaf Ebrahimi AsmString = "ldnp $\x01, $\x02, [$\x03]"; 9250*9a0e4156SSadaf Ebrahimi break; 9251*9a0e4156SSadaf Ebrahimi } 9252*9a0e4156SSadaf Ebrahimi return NULL; 9253*9a0e4156SSadaf Ebrahimi case AArch64_LDNPQi: 9254*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 9255*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9256*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 9257*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9258*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 9259*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9260*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && 9261*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9262*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 9263*9a0e4156SSadaf Ebrahimi // (LDNPQi FPR128:$Rt, FPR128:$Rt2, GPR64sp:$Rn, 0) 9264*9a0e4156SSadaf Ebrahimi AsmString = "ldnp $\x01, $\x02, [$\x03]"; 9265*9a0e4156SSadaf Ebrahimi break; 9266*9a0e4156SSadaf Ebrahimi } 9267*9a0e4156SSadaf Ebrahimi return NULL; 9268*9a0e4156SSadaf Ebrahimi case AArch64_LDNPSi: 9269*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 9270*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9271*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) && 9272*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9273*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 1) && 9274*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9275*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && 9276*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9277*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 9278*9a0e4156SSadaf Ebrahimi // (LDNPSi FPR32:$Rt, FPR32:$Rt2, GPR64sp:$Rn, 0) 9279*9a0e4156SSadaf Ebrahimi AsmString = "ldnp $\x01, $\x02, [$\x03]"; 9280*9a0e4156SSadaf Ebrahimi break; 9281*9a0e4156SSadaf Ebrahimi } 9282*9a0e4156SSadaf Ebrahimi return NULL; 9283*9a0e4156SSadaf Ebrahimi case AArch64_LDNPWi: 9284*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 9285*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9286*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 9287*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9288*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 9289*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9290*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && 9291*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9292*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 9293*9a0e4156SSadaf Ebrahimi // (LDNPWi GPR32:$Rt, GPR32:$Rt2, GPR64sp:$Rn, 0) 9294*9a0e4156SSadaf Ebrahimi AsmString = "ldnp $\x01, $\x02, [$\x03]"; 9295*9a0e4156SSadaf Ebrahimi break; 9296*9a0e4156SSadaf Ebrahimi } 9297*9a0e4156SSadaf Ebrahimi return NULL; 9298*9a0e4156SSadaf Ebrahimi case AArch64_LDNPXi: 9299*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 9300*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9301*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 9302*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9303*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 9304*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9305*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && 9306*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9307*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 9308*9a0e4156SSadaf Ebrahimi // (LDNPXi GPR64:$Rt, GPR64:$Rt2, GPR64sp:$Rn, 0) 9309*9a0e4156SSadaf Ebrahimi AsmString = "ldnp $\x01, $\x02, [$\x03]"; 9310*9a0e4156SSadaf Ebrahimi break; 9311*9a0e4156SSadaf Ebrahimi } 9312*9a0e4156SSadaf Ebrahimi return NULL; 9313*9a0e4156SSadaf Ebrahimi case AArch64_LDPDi: 9314*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 9315*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9316*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && 9317*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9318*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && 9319*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9320*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && 9321*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9322*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 9323*9a0e4156SSadaf Ebrahimi // (LDPDi FPR64:$Rt, FPR64:$Rt2, GPR64sp:$Rn, 0) 9324*9a0e4156SSadaf Ebrahimi AsmString = "ldp $\x01, $\x02, [$\x03]"; 9325*9a0e4156SSadaf Ebrahimi break; 9326*9a0e4156SSadaf Ebrahimi } 9327*9a0e4156SSadaf Ebrahimi return NULL; 9328*9a0e4156SSadaf Ebrahimi case AArch64_LDPQi: 9329*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 9330*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9331*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 9332*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9333*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 9334*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9335*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && 9336*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9337*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 9338*9a0e4156SSadaf Ebrahimi // (LDPQi FPR128:$Rt, FPR128:$Rt2, GPR64sp:$Rn, 0) 9339*9a0e4156SSadaf Ebrahimi AsmString = "ldp $\x01, $\x02, [$\x03]"; 9340*9a0e4156SSadaf Ebrahimi break; 9341*9a0e4156SSadaf Ebrahimi } 9342*9a0e4156SSadaf Ebrahimi return NULL; 9343*9a0e4156SSadaf Ebrahimi case AArch64_LDPSWi: 9344*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 9345*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9346*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 9347*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9348*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 9349*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9350*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && 9351*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9352*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 9353*9a0e4156SSadaf Ebrahimi // (LDPSWi GPR64:$Rt, GPR64:$Rt2, GPR64sp:$Rn, 0) 9354*9a0e4156SSadaf Ebrahimi AsmString = "ldpsw $\x01, $\x02, [$\x03]"; 9355*9a0e4156SSadaf Ebrahimi break; 9356*9a0e4156SSadaf Ebrahimi } 9357*9a0e4156SSadaf Ebrahimi return NULL; 9358*9a0e4156SSadaf Ebrahimi case AArch64_LDPSi: 9359*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 9360*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9361*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) && 9362*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9363*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 1) && 9364*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9365*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && 9366*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9367*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 9368*9a0e4156SSadaf Ebrahimi // (LDPSi FPR32:$Rt, FPR32:$Rt2, GPR64sp:$Rn, 0) 9369*9a0e4156SSadaf Ebrahimi AsmString = "ldp $\x01, $\x02, [$\x03]"; 9370*9a0e4156SSadaf Ebrahimi break; 9371*9a0e4156SSadaf Ebrahimi } 9372*9a0e4156SSadaf Ebrahimi return NULL; 9373*9a0e4156SSadaf Ebrahimi case AArch64_LDPWi: 9374*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 9375*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9376*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 9377*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9378*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 9379*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9380*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && 9381*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9382*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 9383*9a0e4156SSadaf Ebrahimi // (LDPWi GPR32:$Rt, GPR32:$Rt2, GPR64sp:$Rn, 0) 9384*9a0e4156SSadaf Ebrahimi AsmString = "ldp $\x01, $\x02, [$\x03]"; 9385*9a0e4156SSadaf Ebrahimi break; 9386*9a0e4156SSadaf Ebrahimi } 9387*9a0e4156SSadaf Ebrahimi return NULL; 9388*9a0e4156SSadaf Ebrahimi case AArch64_LDPXi: 9389*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 9390*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9391*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 9392*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9393*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 9394*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9395*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && 9396*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9397*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 9398*9a0e4156SSadaf Ebrahimi // (LDPXi GPR64:$Rt, GPR64:$Rt2, GPR64sp:$Rn, 0) 9399*9a0e4156SSadaf Ebrahimi AsmString = "ldp $\x01, $\x02, [$\x03]"; 9400*9a0e4156SSadaf Ebrahimi break; 9401*9a0e4156SSadaf Ebrahimi } 9402*9a0e4156SSadaf Ebrahimi return NULL; 9403*9a0e4156SSadaf Ebrahimi case AArch64_LDRBBroX: 9404*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 9405*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9406*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 9407*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9408*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9409*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9410*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 9411*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9412*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 9413*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 9414*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 9415*9a0e4156SSadaf Ebrahimi // (LDRBBroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 9416*9a0e4156SSadaf Ebrahimi AsmString = "ldrb $\x01, [$\x02, $\x03]"; 9417*9a0e4156SSadaf Ebrahimi break; 9418*9a0e4156SSadaf Ebrahimi } 9419*9a0e4156SSadaf Ebrahimi return NULL; 9420*9a0e4156SSadaf Ebrahimi case AArch64_LDRBBui: 9421*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9422*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9423*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 9424*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9425*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9426*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9427*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9428*9a0e4156SSadaf Ebrahimi // (LDRBBui GPR32:$Rt, GPR64sp:$Rn, 0) 9429*9a0e4156SSadaf Ebrahimi AsmString = "ldrb $\x01, [$\x02]"; 9430*9a0e4156SSadaf Ebrahimi break; 9431*9a0e4156SSadaf Ebrahimi } 9432*9a0e4156SSadaf Ebrahimi return NULL; 9433*9a0e4156SSadaf Ebrahimi case AArch64_LDRBroX: 9434*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 9435*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9436*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) && 9437*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9438*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9439*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9440*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 9441*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9442*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 9443*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 9444*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 9445*9a0e4156SSadaf Ebrahimi // (LDRBroX FPR8:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 9446*9a0e4156SSadaf Ebrahimi AsmString = "ldr $\x01, [$\x02, $\x03]"; 9447*9a0e4156SSadaf Ebrahimi break; 9448*9a0e4156SSadaf Ebrahimi } 9449*9a0e4156SSadaf Ebrahimi return NULL; 9450*9a0e4156SSadaf Ebrahimi case AArch64_LDRBui: 9451*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9452*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9453*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) && 9454*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9455*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9456*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9457*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9458*9a0e4156SSadaf Ebrahimi // (LDRBui FPR8:$Rt, GPR64sp:$Rn, 0) 9459*9a0e4156SSadaf Ebrahimi AsmString = "ldr $\x01, [$\x02]"; 9460*9a0e4156SSadaf Ebrahimi break; 9461*9a0e4156SSadaf Ebrahimi } 9462*9a0e4156SSadaf Ebrahimi return NULL; 9463*9a0e4156SSadaf Ebrahimi case AArch64_LDRDroX: 9464*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 9465*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9466*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && 9467*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9468*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9469*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9470*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 9471*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9472*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 9473*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 9474*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 9475*9a0e4156SSadaf Ebrahimi // (LDRDroX FPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 9476*9a0e4156SSadaf Ebrahimi AsmString = "ldr $\x01, [$\x02, $\x03]"; 9477*9a0e4156SSadaf Ebrahimi break; 9478*9a0e4156SSadaf Ebrahimi } 9479*9a0e4156SSadaf Ebrahimi return NULL; 9480*9a0e4156SSadaf Ebrahimi case AArch64_LDRDui: 9481*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9482*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9483*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && 9484*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9485*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9486*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9487*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9488*9a0e4156SSadaf Ebrahimi // (LDRDui FPR64:$Rt, GPR64sp:$Rn, 0) 9489*9a0e4156SSadaf Ebrahimi AsmString = "ldr $\x01, [$\x02]"; 9490*9a0e4156SSadaf Ebrahimi break; 9491*9a0e4156SSadaf Ebrahimi } 9492*9a0e4156SSadaf Ebrahimi return NULL; 9493*9a0e4156SSadaf Ebrahimi case AArch64_LDRHHroX: 9494*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 9495*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9496*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 9497*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9498*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9499*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9500*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 9501*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9502*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 9503*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 9504*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 9505*9a0e4156SSadaf Ebrahimi // (LDRHHroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 9506*9a0e4156SSadaf Ebrahimi AsmString = "ldrh $\x01, [$\x02, $\x03]"; 9507*9a0e4156SSadaf Ebrahimi break; 9508*9a0e4156SSadaf Ebrahimi } 9509*9a0e4156SSadaf Ebrahimi return NULL; 9510*9a0e4156SSadaf Ebrahimi case AArch64_LDRHHui: 9511*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9512*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9513*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 9514*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9515*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9516*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9517*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9518*9a0e4156SSadaf Ebrahimi // (LDRHHui GPR32:$Rt, GPR64sp:$Rn, 0) 9519*9a0e4156SSadaf Ebrahimi AsmString = "ldrh $\x01, [$\x02]"; 9520*9a0e4156SSadaf Ebrahimi break; 9521*9a0e4156SSadaf Ebrahimi } 9522*9a0e4156SSadaf Ebrahimi return NULL; 9523*9a0e4156SSadaf Ebrahimi case AArch64_LDRHroX: 9524*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 9525*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9526*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) && 9527*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9528*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9529*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9530*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 9531*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9532*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 9533*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 9534*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 9535*9a0e4156SSadaf Ebrahimi // (LDRHroX FPR16:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 9536*9a0e4156SSadaf Ebrahimi AsmString = "ldr $\x01, [$\x02, $\x03]"; 9537*9a0e4156SSadaf Ebrahimi break; 9538*9a0e4156SSadaf Ebrahimi } 9539*9a0e4156SSadaf Ebrahimi return NULL; 9540*9a0e4156SSadaf Ebrahimi case AArch64_LDRHui: 9541*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9542*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9543*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) && 9544*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9545*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9546*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9547*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9548*9a0e4156SSadaf Ebrahimi // (LDRHui FPR16:$Rt, GPR64sp:$Rn, 0) 9549*9a0e4156SSadaf Ebrahimi AsmString = "ldr $\x01, [$\x02]"; 9550*9a0e4156SSadaf Ebrahimi break; 9551*9a0e4156SSadaf Ebrahimi } 9552*9a0e4156SSadaf Ebrahimi return NULL; 9553*9a0e4156SSadaf Ebrahimi case AArch64_LDRQroX: 9554*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 9555*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9556*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 9557*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9558*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9559*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9560*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 9561*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9562*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 9563*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 9564*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 9565*9a0e4156SSadaf Ebrahimi // (LDRQroX FPR128:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 9566*9a0e4156SSadaf Ebrahimi AsmString = "ldr $\x01, [$\x02, $\x03]"; 9567*9a0e4156SSadaf Ebrahimi break; 9568*9a0e4156SSadaf Ebrahimi } 9569*9a0e4156SSadaf Ebrahimi return NULL; 9570*9a0e4156SSadaf Ebrahimi case AArch64_LDRQui: 9571*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9572*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9573*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 9574*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9575*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9576*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9577*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9578*9a0e4156SSadaf Ebrahimi // (LDRQui FPR128:$Rt, GPR64sp:$Rn, 0) 9579*9a0e4156SSadaf Ebrahimi AsmString = "ldr $\x01, [$\x02]"; 9580*9a0e4156SSadaf Ebrahimi break; 9581*9a0e4156SSadaf Ebrahimi } 9582*9a0e4156SSadaf Ebrahimi return NULL; 9583*9a0e4156SSadaf Ebrahimi case AArch64_LDRSBWroX: 9584*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 9585*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9586*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 9587*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9588*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9589*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9590*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 9591*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9592*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 9593*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 9594*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 9595*9a0e4156SSadaf Ebrahimi // (LDRSBWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 9596*9a0e4156SSadaf Ebrahimi AsmString = "ldrsb $\x01, [$\x02, $\x03]"; 9597*9a0e4156SSadaf Ebrahimi break; 9598*9a0e4156SSadaf Ebrahimi } 9599*9a0e4156SSadaf Ebrahimi return NULL; 9600*9a0e4156SSadaf Ebrahimi case AArch64_LDRSBWui: 9601*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9602*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9603*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 9604*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9605*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9606*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9607*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9608*9a0e4156SSadaf Ebrahimi // (LDRSBWui GPR32:$Rt, GPR64sp:$Rn, 0) 9609*9a0e4156SSadaf Ebrahimi AsmString = "ldrsb $\x01, [$\x02]"; 9610*9a0e4156SSadaf Ebrahimi break; 9611*9a0e4156SSadaf Ebrahimi } 9612*9a0e4156SSadaf Ebrahimi return NULL; 9613*9a0e4156SSadaf Ebrahimi case AArch64_LDRSBXroX: 9614*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 9615*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9616*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 9617*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9618*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9619*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9620*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 9621*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9622*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 9623*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 9624*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 9625*9a0e4156SSadaf Ebrahimi // (LDRSBXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 9626*9a0e4156SSadaf Ebrahimi AsmString = "ldrsb $\x01, [$\x02, $\x03]"; 9627*9a0e4156SSadaf Ebrahimi break; 9628*9a0e4156SSadaf Ebrahimi } 9629*9a0e4156SSadaf Ebrahimi return NULL; 9630*9a0e4156SSadaf Ebrahimi case AArch64_LDRSBXui: 9631*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9632*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9633*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 9634*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9635*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9636*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9637*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9638*9a0e4156SSadaf Ebrahimi // (LDRSBXui GPR64:$Rt, GPR64sp:$Rn, 0) 9639*9a0e4156SSadaf Ebrahimi AsmString = "ldrsb $\x01, [$\x02]"; 9640*9a0e4156SSadaf Ebrahimi break; 9641*9a0e4156SSadaf Ebrahimi } 9642*9a0e4156SSadaf Ebrahimi return NULL; 9643*9a0e4156SSadaf Ebrahimi case AArch64_LDRSHWroX: 9644*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 9645*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9646*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 9647*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9648*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9649*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9650*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 9651*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9652*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 9653*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 9654*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 9655*9a0e4156SSadaf Ebrahimi // (LDRSHWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 9656*9a0e4156SSadaf Ebrahimi AsmString = "ldrsh $\x01, [$\x02, $\x03]"; 9657*9a0e4156SSadaf Ebrahimi break; 9658*9a0e4156SSadaf Ebrahimi } 9659*9a0e4156SSadaf Ebrahimi return NULL; 9660*9a0e4156SSadaf Ebrahimi case AArch64_LDRSHWui: 9661*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9662*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9663*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 9664*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9665*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9666*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9667*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9668*9a0e4156SSadaf Ebrahimi // (LDRSHWui GPR32:$Rt, GPR64sp:$Rn, 0) 9669*9a0e4156SSadaf Ebrahimi AsmString = "ldrsh $\x01, [$\x02]"; 9670*9a0e4156SSadaf Ebrahimi break; 9671*9a0e4156SSadaf Ebrahimi } 9672*9a0e4156SSadaf Ebrahimi return NULL; 9673*9a0e4156SSadaf Ebrahimi case AArch64_LDRSHXroX: 9674*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 9675*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9676*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 9677*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9678*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9679*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9680*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 9681*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9682*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 9683*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 9684*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 9685*9a0e4156SSadaf Ebrahimi // (LDRSHXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 9686*9a0e4156SSadaf Ebrahimi AsmString = "ldrsh $\x01, [$\x02, $\x03]"; 9687*9a0e4156SSadaf Ebrahimi break; 9688*9a0e4156SSadaf Ebrahimi } 9689*9a0e4156SSadaf Ebrahimi return NULL; 9690*9a0e4156SSadaf Ebrahimi case AArch64_LDRSHXui: 9691*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9692*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9693*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 9694*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9695*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9696*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9697*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9698*9a0e4156SSadaf Ebrahimi // (LDRSHXui GPR64:$Rt, GPR64sp:$Rn, 0) 9699*9a0e4156SSadaf Ebrahimi AsmString = "ldrsh $\x01, [$\x02]"; 9700*9a0e4156SSadaf Ebrahimi break; 9701*9a0e4156SSadaf Ebrahimi } 9702*9a0e4156SSadaf Ebrahimi return NULL; 9703*9a0e4156SSadaf Ebrahimi case AArch64_LDRSWroX: 9704*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 9705*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9706*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 9707*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9708*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9709*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9710*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 9711*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9712*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 9713*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 9714*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 9715*9a0e4156SSadaf Ebrahimi // (LDRSWroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 9716*9a0e4156SSadaf Ebrahimi AsmString = "ldrsw $\x01, [$\x02, $\x03]"; 9717*9a0e4156SSadaf Ebrahimi break; 9718*9a0e4156SSadaf Ebrahimi } 9719*9a0e4156SSadaf Ebrahimi return NULL; 9720*9a0e4156SSadaf Ebrahimi case AArch64_LDRSWui: 9721*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9722*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9723*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 9724*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9725*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9726*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9727*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9728*9a0e4156SSadaf Ebrahimi // (LDRSWui GPR64:$Rt, GPR64sp:$Rn, 0) 9729*9a0e4156SSadaf Ebrahimi AsmString = "ldrsw $\x01, [$\x02]"; 9730*9a0e4156SSadaf Ebrahimi break; 9731*9a0e4156SSadaf Ebrahimi } 9732*9a0e4156SSadaf Ebrahimi return NULL; 9733*9a0e4156SSadaf Ebrahimi case AArch64_LDRSroX: 9734*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 9735*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9736*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) && 9737*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9738*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9739*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9740*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 9741*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9742*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 9743*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 9744*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 9745*9a0e4156SSadaf Ebrahimi // (LDRSroX FPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 9746*9a0e4156SSadaf Ebrahimi AsmString = "ldr $\x01, [$\x02, $\x03]"; 9747*9a0e4156SSadaf Ebrahimi break; 9748*9a0e4156SSadaf Ebrahimi } 9749*9a0e4156SSadaf Ebrahimi return NULL; 9750*9a0e4156SSadaf Ebrahimi case AArch64_LDRSui: 9751*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9752*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9753*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) && 9754*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9755*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9756*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9757*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9758*9a0e4156SSadaf Ebrahimi // (LDRSui FPR32:$Rt, GPR64sp:$Rn, 0) 9759*9a0e4156SSadaf Ebrahimi AsmString = "ldr $\x01, [$\x02]"; 9760*9a0e4156SSadaf Ebrahimi break; 9761*9a0e4156SSadaf Ebrahimi } 9762*9a0e4156SSadaf Ebrahimi return NULL; 9763*9a0e4156SSadaf Ebrahimi case AArch64_LDRWroX: 9764*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 9765*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9766*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 9767*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9768*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9769*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9770*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 9771*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9772*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 9773*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 9774*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 9775*9a0e4156SSadaf Ebrahimi // (LDRWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 9776*9a0e4156SSadaf Ebrahimi AsmString = "ldr $\x01, [$\x02, $\x03]"; 9777*9a0e4156SSadaf Ebrahimi break; 9778*9a0e4156SSadaf Ebrahimi } 9779*9a0e4156SSadaf Ebrahimi return NULL; 9780*9a0e4156SSadaf Ebrahimi case AArch64_LDRWui: 9781*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9782*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9783*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 9784*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9785*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9786*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9787*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9788*9a0e4156SSadaf Ebrahimi // (LDRWui GPR32:$Rt, GPR64sp:$Rn, 0) 9789*9a0e4156SSadaf Ebrahimi AsmString = "ldr $\x01, [$\x02]"; 9790*9a0e4156SSadaf Ebrahimi break; 9791*9a0e4156SSadaf Ebrahimi } 9792*9a0e4156SSadaf Ebrahimi return NULL; 9793*9a0e4156SSadaf Ebrahimi case AArch64_LDRXroX: 9794*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 9795*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9796*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 9797*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9798*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9799*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 9800*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 9801*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 9802*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 9803*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 9804*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 9805*9a0e4156SSadaf Ebrahimi // (LDRXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 9806*9a0e4156SSadaf Ebrahimi AsmString = "ldr $\x01, [$\x02, $\x03]"; 9807*9a0e4156SSadaf Ebrahimi break; 9808*9a0e4156SSadaf Ebrahimi } 9809*9a0e4156SSadaf Ebrahimi return NULL; 9810*9a0e4156SSadaf Ebrahimi case AArch64_LDRXui: 9811*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9812*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9813*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 9814*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9815*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9816*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9817*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9818*9a0e4156SSadaf Ebrahimi // (LDRXui GPR64:$Rt, GPR64sp:$Rn, 0) 9819*9a0e4156SSadaf Ebrahimi AsmString = "ldr $\x01, [$\x02]"; 9820*9a0e4156SSadaf Ebrahimi break; 9821*9a0e4156SSadaf Ebrahimi } 9822*9a0e4156SSadaf Ebrahimi return NULL; 9823*9a0e4156SSadaf Ebrahimi case AArch64_LDTRBi: 9824*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9825*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9826*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 9827*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9828*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9829*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9830*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9831*9a0e4156SSadaf Ebrahimi // (LDTRBi GPR32:$Rt, GPR64sp:$Rn, 0) 9832*9a0e4156SSadaf Ebrahimi AsmString = "ldtrb $\x01, [$\x02]"; 9833*9a0e4156SSadaf Ebrahimi break; 9834*9a0e4156SSadaf Ebrahimi } 9835*9a0e4156SSadaf Ebrahimi return NULL; 9836*9a0e4156SSadaf Ebrahimi case AArch64_LDTRHi: 9837*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9838*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9839*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 9840*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9841*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9842*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9843*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9844*9a0e4156SSadaf Ebrahimi // (LDTRHi GPR32:$Rt, GPR64sp:$Rn, 0) 9845*9a0e4156SSadaf Ebrahimi AsmString = "ldtrh $\x01, [$\x02]"; 9846*9a0e4156SSadaf Ebrahimi break; 9847*9a0e4156SSadaf Ebrahimi } 9848*9a0e4156SSadaf Ebrahimi return NULL; 9849*9a0e4156SSadaf Ebrahimi case AArch64_LDTRSBWi: 9850*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9851*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9852*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 9853*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9854*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9855*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9856*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9857*9a0e4156SSadaf Ebrahimi // (LDTRSBWi GPR32:$Rt, GPR64sp:$Rn, 0) 9858*9a0e4156SSadaf Ebrahimi AsmString = "ldtrsb $\x01, [$\x02]"; 9859*9a0e4156SSadaf Ebrahimi break; 9860*9a0e4156SSadaf Ebrahimi } 9861*9a0e4156SSadaf Ebrahimi return NULL; 9862*9a0e4156SSadaf Ebrahimi case AArch64_LDTRSBXi: 9863*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9864*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9865*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 9866*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9867*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9868*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9869*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9870*9a0e4156SSadaf Ebrahimi // (LDTRSBXi GPR64:$Rt, GPR64sp:$Rn, 0) 9871*9a0e4156SSadaf Ebrahimi AsmString = "ldtrsb $\x01, [$\x02]"; 9872*9a0e4156SSadaf Ebrahimi break; 9873*9a0e4156SSadaf Ebrahimi } 9874*9a0e4156SSadaf Ebrahimi return NULL; 9875*9a0e4156SSadaf Ebrahimi case AArch64_LDTRSHWi: 9876*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9877*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9878*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 9879*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9880*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9881*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9882*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9883*9a0e4156SSadaf Ebrahimi // (LDTRSHWi GPR32:$Rt, GPR64sp:$Rn, 0) 9884*9a0e4156SSadaf Ebrahimi AsmString = "ldtrsh $\x01, [$\x02]"; 9885*9a0e4156SSadaf Ebrahimi break; 9886*9a0e4156SSadaf Ebrahimi } 9887*9a0e4156SSadaf Ebrahimi return NULL; 9888*9a0e4156SSadaf Ebrahimi case AArch64_LDTRSHXi: 9889*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9890*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9891*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 9892*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9893*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9894*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9895*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9896*9a0e4156SSadaf Ebrahimi // (LDTRSHXi GPR64:$Rt, GPR64sp:$Rn, 0) 9897*9a0e4156SSadaf Ebrahimi AsmString = "ldtrsh $\x01, [$\x02]"; 9898*9a0e4156SSadaf Ebrahimi break; 9899*9a0e4156SSadaf Ebrahimi } 9900*9a0e4156SSadaf Ebrahimi return NULL; 9901*9a0e4156SSadaf Ebrahimi case AArch64_LDTRSWi: 9902*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9903*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9904*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 9905*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9906*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9907*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9908*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9909*9a0e4156SSadaf Ebrahimi // (LDTRSWi GPR64:$Rt, GPR64sp:$Rn, 0) 9910*9a0e4156SSadaf Ebrahimi AsmString = "ldtrsw $\x01, [$\x02]"; 9911*9a0e4156SSadaf Ebrahimi break; 9912*9a0e4156SSadaf Ebrahimi } 9913*9a0e4156SSadaf Ebrahimi return NULL; 9914*9a0e4156SSadaf Ebrahimi case AArch64_LDTRWi: 9915*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9916*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9917*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 9918*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9919*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9920*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9921*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9922*9a0e4156SSadaf Ebrahimi // (LDTRWi GPR32:$Rt, GPR64sp:$Rn, 0) 9923*9a0e4156SSadaf Ebrahimi AsmString = "ldtr $\x01, [$\x02]"; 9924*9a0e4156SSadaf Ebrahimi break; 9925*9a0e4156SSadaf Ebrahimi } 9926*9a0e4156SSadaf Ebrahimi return NULL; 9927*9a0e4156SSadaf Ebrahimi case AArch64_LDTRXi: 9928*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9929*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9930*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 9931*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9932*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9933*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9934*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9935*9a0e4156SSadaf Ebrahimi // (LDTRXi GPR64:$Rt, GPR64sp:$Rn, 0) 9936*9a0e4156SSadaf Ebrahimi AsmString = "ldtr $\x01, [$\x02]"; 9937*9a0e4156SSadaf Ebrahimi break; 9938*9a0e4156SSadaf Ebrahimi } 9939*9a0e4156SSadaf Ebrahimi return NULL; 9940*9a0e4156SSadaf Ebrahimi case AArch64_LDURBBi: 9941*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9942*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9943*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 9944*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9945*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9946*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9947*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9948*9a0e4156SSadaf Ebrahimi // (LDURBBi GPR32:$Rt, GPR64sp:$Rn, 0) 9949*9a0e4156SSadaf Ebrahimi AsmString = "ldurb $\x01, [$\x02]"; 9950*9a0e4156SSadaf Ebrahimi break; 9951*9a0e4156SSadaf Ebrahimi } 9952*9a0e4156SSadaf Ebrahimi return NULL; 9953*9a0e4156SSadaf Ebrahimi case AArch64_LDURBi: 9954*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9955*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9956*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) && 9957*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9958*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9959*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9960*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9961*9a0e4156SSadaf Ebrahimi // (LDURBi FPR8:$Rt, GPR64sp:$Rn, 0) 9962*9a0e4156SSadaf Ebrahimi AsmString = "ldur $\x01, [$\x02]"; 9963*9a0e4156SSadaf Ebrahimi break; 9964*9a0e4156SSadaf Ebrahimi } 9965*9a0e4156SSadaf Ebrahimi return NULL; 9966*9a0e4156SSadaf Ebrahimi case AArch64_LDURDi: 9967*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9968*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9969*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && 9970*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9971*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9972*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9973*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9974*9a0e4156SSadaf Ebrahimi // (LDURDi FPR64:$Rt, GPR64sp:$Rn, 0) 9975*9a0e4156SSadaf Ebrahimi AsmString = "ldur $\x01, [$\x02]"; 9976*9a0e4156SSadaf Ebrahimi break; 9977*9a0e4156SSadaf Ebrahimi } 9978*9a0e4156SSadaf Ebrahimi return NULL; 9979*9a0e4156SSadaf Ebrahimi case AArch64_LDURHHi: 9980*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9981*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9982*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 9983*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9984*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9985*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9986*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 9987*9a0e4156SSadaf Ebrahimi // (LDURHHi GPR32:$Rt, GPR64sp:$Rn, 0) 9988*9a0e4156SSadaf Ebrahimi AsmString = "ldurh $\x01, [$\x02]"; 9989*9a0e4156SSadaf Ebrahimi break; 9990*9a0e4156SSadaf Ebrahimi } 9991*9a0e4156SSadaf Ebrahimi return NULL; 9992*9a0e4156SSadaf Ebrahimi case AArch64_LDURHi: 9993*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 9994*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 9995*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) && 9996*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 9997*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 9998*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 9999*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 10000*9a0e4156SSadaf Ebrahimi // (LDURHi FPR16:$Rt, GPR64sp:$Rn, 0) 10001*9a0e4156SSadaf Ebrahimi AsmString = "ldur $\x01, [$\x02]"; 10002*9a0e4156SSadaf Ebrahimi break; 10003*9a0e4156SSadaf Ebrahimi } 10004*9a0e4156SSadaf Ebrahimi return NULL; 10005*9a0e4156SSadaf Ebrahimi case AArch64_LDURQi: 10006*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10007*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10008*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 10009*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10010*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 10011*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10012*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 10013*9a0e4156SSadaf Ebrahimi // (LDURQi FPR128:$Rt, GPR64sp:$Rn, 0) 10014*9a0e4156SSadaf Ebrahimi AsmString = "ldur $\x01, [$\x02]"; 10015*9a0e4156SSadaf Ebrahimi break; 10016*9a0e4156SSadaf Ebrahimi } 10017*9a0e4156SSadaf Ebrahimi return NULL; 10018*9a0e4156SSadaf Ebrahimi case AArch64_LDURSBWi: 10019*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10020*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10021*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 10022*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10023*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 10024*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10025*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 10026*9a0e4156SSadaf Ebrahimi // (LDURSBWi GPR32:$Rt, GPR64sp:$Rn, 0) 10027*9a0e4156SSadaf Ebrahimi AsmString = "ldursb $\x01, [$\x02]"; 10028*9a0e4156SSadaf Ebrahimi break; 10029*9a0e4156SSadaf Ebrahimi } 10030*9a0e4156SSadaf Ebrahimi return NULL; 10031*9a0e4156SSadaf Ebrahimi case AArch64_LDURSBXi: 10032*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10033*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10034*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 10035*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10036*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 10037*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10038*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 10039*9a0e4156SSadaf Ebrahimi // (LDURSBXi GPR64:$Rt, GPR64sp:$Rn, 0) 10040*9a0e4156SSadaf Ebrahimi AsmString = "ldursb $\x01, [$\x02]"; 10041*9a0e4156SSadaf Ebrahimi break; 10042*9a0e4156SSadaf Ebrahimi } 10043*9a0e4156SSadaf Ebrahimi return NULL; 10044*9a0e4156SSadaf Ebrahimi case AArch64_LDURSHWi: 10045*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10046*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10047*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 10048*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10049*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 10050*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10051*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 10052*9a0e4156SSadaf Ebrahimi // (LDURSHWi GPR32:$Rt, GPR64sp:$Rn, 0) 10053*9a0e4156SSadaf Ebrahimi AsmString = "ldursh $\x01, [$\x02]"; 10054*9a0e4156SSadaf Ebrahimi break; 10055*9a0e4156SSadaf Ebrahimi } 10056*9a0e4156SSadaf Ebrahimi return NULL; 10057*9a0e4156SSadaf Ebrahimi case AArch64_LDURSHXi: 10058*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10059*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10060*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 10061*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10062*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 10063*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10064*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 10065*9a0e4156SSadaf Ebrahimi // (LDURSHXi GPR64:$Rt, GPR64sp:$Rn, 0) 10066*9a0e4156SSadaf Ebrahimi AsmString = "ldursh $\x01, [$\x02]"; 10067*9a0e4156SSadaf Ebrahimi break; 10068*9a0e4156SSadaf Ebrahimi } 10069*9a0e4156SSadaf Ebrahimi return NULL; 10070*9a0e4156SSadaf Ebrahimi case AArch64_LDURSWi: 10071*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10072*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10073*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 10074*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10075*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 10076*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10077*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 10078*9a0e4156SSadaf Ebrahimi // (LDURSWi GPR64:$Rt, GPR64sp:$Rn, 0) 10079*9a0e4156SSadaf Ebrahimi AsmString = "ldursw $\x01, [$\x02]"; 10080*9a0e4156SSadaf Ebrahimi break; 10081*9a0e4156SSadaf Ebrahimi } 10082*9a0e4156SSadaf Ebrahimi return NULL; 10083*9a0e4156SSadaf Ebrahimi case AArch64_LDURSi: 10084*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10085*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10086*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) && 10087*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10088*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 10089*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10090*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 10091*9a0e4156SSadaf Ebrahimi // (LDURSi FPR32:$Rt, GPR64sp:$Rn, 0) 10092*9a0e4156SSadaf Ebrahimi AsmString = "ldur $\x01, [$\x02]"; 10093*9a0e4156SSadaf Ebrahimi break; 10094*9a0e4156SSadaf Ebrahimi } 10095*9a0e4156SSadaf Ebrahimi return NULL; 10096*9a0e4156SSadaf Ebrahimi case AArch64_LDURWi: 10097*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10098*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10099*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 10100*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10101*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 10102*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10103*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 10104*9a0e4156SSadaf Ebrahimi // (LDURWi GPR32:$Rt, GPR64sp:$Rn, 0) 10105*9a0e4156SSadaf Ebrahimi AsmString = "ldur $\x01, [$\x02]"; 10106*9a0e4156SSadaf Ebrahimi break; 10107*9a0e4156SSadaf Ebrahimi } 10108*9a0e4156SSadaf Ebrahimi return NULL; 10109*9a0e4156SSadaf Ebrahimi case AArch64_LDURXi: 10110*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10111*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10112*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 10113*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10114*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 10115*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10116*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 10117*9a0e4156SSadaf Ebrahimi // (LDURXi GPR64:$Rt, GPR64sp:$Rn, 0) 10118*9a0e4156SSadaf Ebrahimi AsmString = "ldur $\x01, [$\x02]"; 10119*9a0e4156SSadaf Ebrahimi break; 10120*9a0e4156SSadaf Ebrahimi } 10121*9a0e4156SSadaf Ebrahimi return NULL; 10122*9a0e4156SSadaf Ebrahimi case AArch64_MADDWrrr: 10123*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10124*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10125*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 10126*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10127*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 10128*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10129*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 10130*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_WZR) { 10131*9a0e4156SSadaf Ebrahimi // (MADDWrrr GPR32:$dst, GPR32:$src1, GPR32:$src2, WZR) 10132*9a0e4156SSadaf Ebrahimi AsmString = "mul $\x01, $\x02, $\x03"; 10133*9a0e4156SSadaf Ebrahimi break; 10134*9a0e4156SSadaf Ebrahimi } 10135*9a0e4156SSadaf Ebrahimi return NULL; 10136*9a0e4156SSadaf Ebrahimi case AArch64_MADDXrrr: 10137*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10138*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10139*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 10140*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10141*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 10142*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10143*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 10144*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 10145*9a0e4156SSadaf Ebrahimi // (MADDXrrr GPR64:$dst, GPR64:$src1, GPR64:$src2, XZR) 10146*9a0e4156SSadaf Ebrahimi AsmString = "mul $\x01, $\x02, $\x03"; 10147*9a0e4156SSadaf Ebrahimi break; 10148*9a0e4156SSadaf Ebrahimi } 10149*9a0e4156SSadaf Ebrahimi return NULL; 10150*9a0e4156SSadaf Ebrahimi case AArch64_MOVKWi: 10151*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10152*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10153*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 10154*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10155*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 16) { 10156*9a0e4156SSadaf Ebrahimi // (MOVKWi GPR32:$Rd, movk_symbol_g1:$sym, 16) 10157*9a0e4156SSadaf Ebrahimi AsmString = "movk $\x01, $\x02"; 10158*9a0e4156SSadaf Ebrahimi break; 10159*9a0e4156SSadaf Ebrahimi } 10160*9a0e4156SSadaf Ebrahimi return NULL; 10161*9a0e4156SSadaf Ebrahimi case AArch64_MOVKXi: 10162*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10163*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10164*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 10165*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10166*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 48) { 10167*9a0e4156SSadaf Ebrahimi // (MOVKXi GPR64:$Rd, movk_symbol_g3:$sym, 48) 10168*9a0e4156SSadaf Ebrahimi AsmString = "movk $\x01, $\x02"; 10169*9a0e4156SSadaf Ebrahimi break; 10170*9a0e4156SSadaf Ebrahimi } 10171*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10172*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10173*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 10174*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10175*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 32) { 10176*9a0e4156SSadaf Ebrahimi // (MOVKXi GPR64:$Rd, movk_symbol_g2:$sym, 32) 10177*9a0e4156SSadaf Ebrahimi AsmString = "movk $\x01, $\x02"; 10178*9a0e4156SSadaf Ebrahimi break; 10179*9a0e4156SSadaf Ebrahimi } 10180*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10181*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10182*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 10183*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10184*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 16) { 10185*9a0e4156SSadaf Ebrahimi // (MOVKXi GPR64:$Rd, movk_symbol_g1:$sym, 16) 10186*9a0e4156SSadaf Ebrahimi AsmString = "movk $\x01, $\x02"; 10187*9a0e4156SSadaf Ebrahimi break; 10188*9a0e4156SSadaf Ebrahimi } 10189*9a0e4156SSadaf Ebrahimi return NULL; 10190*9a0e4156SSadaf Ebrahimi case AArch64_MSUBWrrr: 10191*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10192*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10193*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 10194*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10195*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 10196*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10197*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 10198*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_WZR) { 10199*9a0e4156SSadaf Ebrahimi // (MSUBWrrr GPR32:$dst, GPR32:$src1, GPR32:$src2, WZR) 10200*9a0e4156SSadaf Ebrahimi AsmString = "mneg $\x01, $\x02, $\x03"; 10201*9a0e4156SSadaf Ebrahimi break; 10202*9a0e4156SSadaf Ebrahimi } 10203*9a0e4156SSadaf Ebrahimi return NULL; 10204*9a0e4156SSadaf Ebrahimi case AArch64_MSUBXrrr: 10205*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10206*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10207*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 10208*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10209*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 10210*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10211*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 10212*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 10213*9a0e4156SSadaf Ebrahimi // (MSUBXrrr GPR64:$dst, GPR64:$src1, GPR64:$src2, XZR) 10214*9a0e4156SSadaf Ebrahimi AsmString = "mneg $\x01, $\x02, $\x03"; 10215*9a0e4156SSadaf Ebrahimi break; 10216*9a0e4156SSadaf Ebrahimi } 10217*9a0e4156SSadaf Ebrahimi return NULL; 10218*9a0e4156SSadaf Ebrahimi case AArch64_NOTv16i8: 10219*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 2 && 10220*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10221*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 10222*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10223*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1)) { 10224*9a0e4156SSadaf Ebrahimi // (NOTv16i8 V128:$Vd, V128:$Vn) 10225*9a0e4156SSadaf Ebrahimi AsmString = "mvn $\xFF\x01\x06.16b, $\xFF\x02\x06.16b"; 10226*9a0e4156SSadaf Ebrahimi break; 10227*9a0e4156SSadaf Ebrahimi } 10228*9a0e4156SSadaf Ebrahimi return NULL; 10229*9a0e4156SSadaf Ebrahimi case AArch64_NOTv8i8: 10230*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 2 && 10231*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10232*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && 10233*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10234*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1)) { 10235*9a0e4156SSadaf Ebrahimi // (NOTv8i8 V64:$Vd, V64:$Vn) 10236*9a0e4156SSadaf Ebrahimi AsmString = "mvn $\xFF\x01\x06.8b, $\xFF\x02\x06.8b"; 10237*9a0e4156SSadaf Ebrahimi break; 10238*9a0e4156SSadaf Ebrahimi } 10239*9a0e4156SSadaf Ebrahimi return NULL; 10240*9a0e4156SSadaf Ebrahimi case AArch64_ORNWrs: 10241*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10242*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10243*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 10244*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR && 10245*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10246*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 10247*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 10248*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 10249*9a0e4156SSadaf Ebrahimi // (ORNWrs GPR32:$Wd, WZR, GPR32:$Wm, 0) 10250*9a0e4156SSadaf Ebrahimi AsmString = "mvn $\x01, $\x03"; 10251*9a0e4156SSadaf Ebrahimi break; 10252*9a0e4156SSadaf Ebrahimi } 10253*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10254*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10255*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 10256*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR && 10257*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10258*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { 10259*9a0e4156SSadaf Ebrahimi // (ORNWrs GPR32:$Wd, WZR, GPR32:$Wm, logical_shift32:$sh) 10260*9a0e4156SSadaf Ebrahimi AsmString = "mvn $\x01, $\x03$\xFF\x04\x02"; 10261*9a0e4156SSadaf Ebrahimi break; 10262*9a0e4156SSadaf Ebrahimi } 10263*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10264*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10265*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 10266*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10267*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 10268*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10269*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 10270*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 10271*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 10272*9a0e4156SSadaf Ebrahimi // (ORNWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) 10273*9a0e4156SSadaf Ebrahimi AsmString = "orn $\x01, $\x02, $\x03"; 10274*9a0e4156SSadaf Ebrahimi break; 10275*9a0e4156SSadaf Ebrahimi } 10276*9a0e4156SSadaf Ebrahimi return NULL; 10277*9a0e4156SSadaf Ebrahimi case AArch64_ORNXrs: 10278*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10279*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10280*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 10281*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR && 10282*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10283*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 10284*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 10285*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 10286*9a0e4156SSadaf Ebrahimi // (ORNXrs GPR64:$Xd, XZR, GPR64:$Xm, 0) 10287*9a0e4156SSadaf Ebrahimi AsmString = "mvn $\x01, $\x03"; 10288*9a0e4156SSadaf Ebrahimi break; 10289*9a0e4156SSadaf Ebrahimi } 10290*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10291*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10292*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 10293*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR && 10294*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10295*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) { 10296*9a0e4156SSadaf Ebrahimi // (ORNXrs GPR64:$Xd, XZR, GPR64:$Xm, logical_shift64:$sh) 10297*9a0e4156SSadaf Ebrahimi AsmString = "mvn $\x01, $\x03$\xFF\x04\x02"; 10298*9a0e4156SSadaf Ebrahimi break; 10299*9a0e4156SSadaf Ebrahimi } 10300*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10301*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10302*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 10303*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10304*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 10305*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10306*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 10307*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 10308*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 10309*9a0e4156SSadaf Ebrahimi // (ORNXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) 10310*9a0e4156SSadaf Ebrahimi AsmString = "orn $\x01, $\x02, $\x03"; 10311*9a0e4156SSadaf Ebrahimi break; 10312*9a0e4156SSadaf Ebrahimi } 10313*9a0e4156SSadaf Ebrahimi return NULL; 10314*9a0e4156SSadaf Ebrahimi case AArch64_ORRWrs: 10315*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10316*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10317*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 10318*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR && 10319*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10320*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 10321*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 10322*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 10323*9a0e4156SSadaf Ebrahimi // (ORRWrs GPR32:$dst, WZR, GPR32:$src, 0) 10324*9a0e4156SSadaf Ebrahimi AsmString = "mov $\x01, $\x03"; 10325*9a0e4156SSadaf Ebrahimi break; 10326*9a0e4156SSadaf Ebrahimi } 10327*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10328*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10329*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 10330*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10331*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 10332*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10333*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 10334*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 10335*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 10336*9a0e4156SSadaf Ebrahimi // (ORRWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) 10337*9a0e4156SSadaf Ebrahimi AsmString = "orr $\x01, $\x02, $\x03"; 10338*9a0e4156SSadaf Ebrahimi break; 10339*9a0e4156SSadaf Ebrahimi } 10340*9a0e4156SSadaf Ebrahimi return NULL; 10341*9a0e4156SSadaf Ebrahimi case AArch64_ORRXrs: 10342*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10343*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10344*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 10345*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR && 10346*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10347*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 10348*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 10349*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 10350*9a0e4156SSadaf Ebrahimi // (ORRXrs GPR64:$dst, XZR, GPR64:$src, 0) 10351*9a0e4156SSadaf Ebrahimi AsmString = "mov $\x01, $\x03"; 10352*9a0e4156SSadaf Ebrahimi break; 10353*9a0e4156SSadaf Ebrahimi } 10354*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10355*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10356*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 10357*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10358*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 10359*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10360*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 10361*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 10362*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 10363*9a0e4156SSadaf Ebrahimi // (ORRXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) 10364*9a0e4156SSadaf Ebrahimi AsmString = "orr $\x01, $\x02, $\x03"; 10365*9a0e4156SSadaf Ebrahimi break; 10366*9a0e4156SSadaf Ebrahimi } 10367*9a0e4156SSadaf Ebrahimi return NULL; 10368*9a0e4156SSadaf Ebrahimi case AArch64_ORRv16i8: 10369*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10370*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10371*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 10372*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10373*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 10374*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10375*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { 10376*9a0e4156SSadaf Ebrahimi // (ORRv16i8 V128:$dst, V128:$src, V128:$src) 10377*9a0e4156SSadaf Ebrahimi AsmString = "mov $\xFF\x01\x06.16b, $\xFF\x02\x06.16b"; 10378*9a0e4156SSadaf Ebrahimi break; 10379*9a0e4156SSadaf Ebrahimi } 10380*9a0e4156SSadaf Ebrahimi return NULL; 10381*9a0e4156SSadaf Ebrahimi case AArch64_ORRv2i32: 10382*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10383*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10384*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && 10385*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10386*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 10387*9a0e4156SSadaf Ebrahimi // (ORRv2i32 V64:$Vd, imm0_255:$imm, 0) 10388*9a0e4156SSadaf Ebrahimi AsmString = "orr $\xFF\x01\x06.2s, $\xFF\x02\x07"; 10389*9a0e4156SSadaf Ebrahimi break; 10390*9a0e4156SSadaf Ebrahimi } 10391*9a0e4156SSadaf Ebrahimi return NULL; 10392*9a0e4156SSadaf Ebrahimi case AArch64_ORRv4i16: 10393*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10394*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10395*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && 10396*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10397*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 10398*9a0e4156SSadaf Ebrahimi // (ORRv4i16 V64:$Vd, imm0_255:$imm, 0) 10399*9a0e4156SSadaf Ebrahimi AsmString = "orr $\xFF\x01\x06.4h, $\xFF\x02\x07"; 10400*9a0e4156SSadaf Ebrahimi break; 10401*9a0e4156SSadaf Ebrahimi } 10402*9a0e4156SSadaf Ebrahimi return NULL; 10403*9a0e4156SSadaf Ebrahimi case AArch64_ORRv4i32: 10404*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10405*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10406*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 10407*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10408*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 10409*9a0e4156SSadaf Ebrahimi // (ORRv4i32 V128:$Vd, imm0_255:$imm, 0) 10410*9a0e4156SSadaf Ebrahimi AsmString = "orr $\xFF\x01\x06.4s, $\xFF\x02\x07"; 10411*9a0e4156SSadaf Ebrahimi break; 10412*9a0e4156SSadaf Ebrahimi } 10413*9a0e4156SSadaf Ebrahimi return NULL; 10414*9a0e4156SSadaf Ebrahimi case AArch64_ORRv8i16: 10415*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10416*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10417*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 10418*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10419*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 10420*9a0e4156SSadaf Ebrahimi // (ORRv8i16 V128:$Vd, imm0_255:$imm, 0) 10421*9a0e4156SSadaf Ebrahimi AsmString = "orr $\xFF\x01\x06.8h, $\xFF\x02\x07"; 10422*9a0e4156SSadaf Ebrahimi break; 10423*9a0e4156SSadaf Ebrahimi } 10424*9a0e4156SSadaf Ebrahimi return NULL; 10425*9a0e4156SSadaf Ebrahimi case AArch64_ORRv8i8: 10426*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10427*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10428*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && 10429*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10430*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && 10431*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10432*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == MCOperand_getReg(MCInst_getOperand(MI, 1))) { 10433*9a0e4156SSadaf Ebrahimi // (ORRv8i8 V64:$dst, V64:$src, V64:$src) 10434*9a0e4156SSadaf Ebrahimi AsmString = "mov $\xFF\x01\x06.8b, $\xFF\x02\x06.8b"; 10435*9a0e4156SSadaf Ebrahimi break; 10436*9a0e4156SSadaf Ebrahimi } 10437*9a0e4156SSadaf Ebrahimi return NULL; 10438*9a0e4156SSadaf Ebrahimi case AArch64_PRFMroX: 10439*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 10440*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10441*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 10442*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10443*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 10444*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 10445*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 10446*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 10447*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 10448*9a0e4156SSadaf Ebrahimi // (PRFMroX prfop:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 10449*9a0e4156SSadaf Ebrahimi AsmString = "prfm $\xFF\x01\x16, [$\x02, $\x03]"; 10450*9a0e4156SSadaf Ebrahimi break; 10451*9a0e4156SSadaf Ebrahimi } 10452*9a0e4156SSadaf Ebrahimi return NULL; 10453*9a0e4156SSadaf Ebrahimi case AArch64_PRFMui: 10454*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10455*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10456*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 10457*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10458*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 10459*9a0e4156SSadaf Ebrahimi // (PRFMui prfop:$Rt, GPR64sp:$Rn, 0) 10460*9a0e4156SSadaf Ebrahimi AsmString = "prfm $\xFF\x01\x16, [$\x02]"; 10461*9a0e4156SSadaf Ebrahimi break; 10462*9a0e4156SSadaf Ebrahimi } 10463*9a0e4156SSadaf Ebrahimi return NULL; 10464*9a0e4156SSadaf Ebrahimi case AArch64_PRFUMi: 10465*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10466*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10467*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 10468*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10469*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 10470*9a0e4156SSadaf Ebrahimi // (PRFUMi prfop:$Rt, GPR64sp:$Rn, 0) 10471*9a0e4156SSadaf Ebrahimi AsmString = "prfum $\xFF\x01\x16, [$\x02]"; 10472*9a0e4156SSadaf Ebrahimi break; 10473*9a0e4156SSadaf Ebrahimi } 10474*9a0e4156SSadaf Ebrahimi return NULL; 10475*9a0e4156SSadaf Ebrahimi case AArch64_RET: 10476*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 1 && 10477*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_LR) { 10478*9a0e4156SSadaf Ebrahimi // (RET LR) 10479*9a0e4156SSadaf Ebrahimi AsmString = "ret"; 10480*9a0e4156SSadaf Ebrahimi break; 10481*9a0e4156SSadaf Ebrahimi } 10482*9a0e4156SSadaf Ebrahimi return NULL; 10483*9a0e4156SSadaf Ebrahimi case AArch64_SBCSWr: 10484*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10485*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10486*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 10487*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR && 10488*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10489*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { 10490*9a0e4156SSadaf Ebrahimi // (SBCSWr GPR32:$dst, WZR, GPR32:$src) 10491*9a0e4156SSadaf Ebrahimi AsmString = "ngcs $\x01, $\x03"; 10492*9a0e4156SSadaf Ebrahimi break; 10493*9a0e4156SSadaf Ebrahimi } 10494*9a0e4156SSadaf Ebrahimi return NULL; 10495*9a0e4156SSadaf Ebrahimi case AArch64_SBCSXr: 10496*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10497*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10498*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 10499*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR && 10500*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10501*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) { 10502*9a0e4156SSadaf Ebrahimi // (SBCSXr GPR64:$dst, XZR, GPR64:$src) 10503*9a0e4156SSadaf Ebrahimi AsmString = "ngcs $\x01, $\x03"; 10504*9a0e4156SSadaf Ebrahimi break; 10505*9a0e4156SSadaf Ebrahimi } 10506*9a0e4156SSadaf Ebrahimi return NULL; 10507*9a0e4156SSadaf Ebrahimi case AArch64_SBCWr: 10508*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10509*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10510*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 10511*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR && 10512*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10513*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { 10514*9a0e4156SSadaf Ebrahimi // (SBCWr GPR32:$dst, WZR, GPR32:$src) 10515*9a0e4156SSadaf Ebrahimi AsmString = "ngc $\x01, $\x03"; 10516*9a0e4156SSadaf Ebrahimi break; 10517*9a0e4156SSadaf Ebrahimi } 10518*9a0e4156SSadaf Ebrahimi return NULL; 10519*9a0e4156SSadaf Ebrahimi case AArch64_SBCXr: 10520*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10521*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10522*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 10523*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR && 10524*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10525*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) { 10526*9a0e4156SSadaf Ebrahimi // (SBCXr GPR64:$dst, XZR, GPR64:$src) 10527*9a0e4156SSadaf Ebrahimi AsmString = "ngc $\x01, $\x03"; 10528*9a0e4156SSadaf Ebrahimi break; 10529*9a0e4156SSadaf Ebrahimi } 10530*9a0e4156SSadaf Ebrahimi return NULL; 10531*9a0e4156SSadaf Ebrahimi case AArch64_SBFMWri: 10532*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10533*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10534*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 10535*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10536*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 10537*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 10538*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 31) { 10539*9a0e4156SSadaf Ebrahimi // (SBFMWri GPR32:$dst, GPR32:$src, imm0_31:$shift, 31) 10540*9a0e4156SSadaf Ebrahimi AsmString = "asr $\x01, $\x02, $\x03"; 10541*9a0e4156SSadaf Ebrahimi break; 10542*9a0e4156SSadaf Ebrahimi } 10543*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10544*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10545*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 10546*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10547*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 10548*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10549*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && 10550*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 10551*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 7) { 10552*9a0e4156SSadaf Ebrahimi // (SBFMWri GPR32:$dst, GPR32:$src, 0, 7) 10553*9a0e4156SSadaf Ebrahimi AsmString = "sxtb $\x01, $\x02"; 10554*9a0e4156SSadaf Ebrahimi break; 10555*9a0e4156SSadaf Ebrahimi } 10556*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10557*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10558*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 10559*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10560*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 10561*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10562*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && 10563*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 10564*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 15) { 10565*9a0e4156SSadaf Ebrahimi // (SBFMWri GPR32:$dst, GPR32:$src, 0, 15) 10566*9a0e4156SSadaf Ebrahimi AsmString = "sxth $\x01, $\x02"; 10567*9a0e4156SSadaf Ebrahimi break; 10568*9a0e4156SSadaf Ebrahimi } 10569*9a0e4156SSadaf Ebrahimi return NULL; 10570*9a0e4156SSadaf Ebrahimi case AArch64_SBFMXri: 10571*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10572*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10573*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 10574*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10575*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 10576*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 10577*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 63) { 10578*9a0e4156SSadaf Ebrahimi // (SBFMXri GPR64:$dst, GPR64:$src, imm0_63:$shift, 63) 10579*9a0e4156SSadaf Ebrahimi AsmString = "asr $\x01, $\x02, $\x03"; 10580*9a0e4156SSadaf Ebrahimi break; 10581*9a0e4156SSadaf Ebrahimi } 10582*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10583*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10584*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 10585*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10586*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 10587*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10588*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && 10589*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 10590*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 7) { 10591*9a0e4156SSadaf Ebrahimi // (SBFMXri GPR64:$dst, GPR64:$src, 0, 7) 10592*9a0e4156SSadaf Ebrahimi AsmString = "sxtb $\x01, $\x02"; 10593*9a0e4156SSadaf Ebrahimi break; 10594*9a0e4156SSadaf Ebrahimi } 10595*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10596*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10597*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 10598*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10599*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 10600*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10601*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && 10602*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 10603*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 15) { 10604*9a0e4156SSadaf Ebrahimi // (SBFMXri GPR64:$dst, GPR64:$src, 0, 15) 10605*9a0e4156SSadaf Ebrahimi AsmString = "sxth $\x01, $\x02"; 10606*9a0e4156SSadaf Ebrahimi break; 10607*9a0e4156SSadaf Ebrahimi } 10608*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10609*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10610*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 10611*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10612*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 10613*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 10614*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && 10615*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 10616*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 31) { 10617*9a0e4156SSadaf Ebrahimi // (SBFMXri GPR64:$dst, GPR64:$src, 0, 31) 10618*9a0e4156SSadaf Ebrahimi AsmString = "sxtw $\x01, $\x02"; 10619*9a0e4156SSadaf Ebrahimi break; 10620*9a0e4156SSadaf Ebrahimi } 10621*9a0e4156SSadaf Ebrahimi return NULL; 10622*9a0e4156SSadaf Ebrahimi case AArch64_SMADDLrrr: 10623*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10624*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10625*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 10626*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10627*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 10628*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10629*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 10630*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 10631*9a0e4156SSadaf Ebrahimi // (SMADDLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) 10632*9a0e4156SSadaf Ebrahimi AsmString = "smull $\x01, $\x02, $\x03"; 10633*9a0e4156SSadaf Ebrahimi break; 10634*9a0e4156SSadaf Ebrahimi } 10635*9a0e4156SSadaf Ebrahimi return NULL; 10636*9a0e4156SSadaf Ebrahimi case AArch64_SMSUBLrrr: 10637*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 10638*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10639*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 10640*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10641*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 10642*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 10643*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 10644*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 10645*9a0e4156SSadaf Ebrahimi // (SMSUBLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) 10646*9a0e4156SSadaf Ebrahimi AsmString = "smnegl $\x01, $\x02, $\x03"; 10647*9a0e4156SSadaf Ebrahimi break; 10648*9a0e4156SSadaf Ebrahimi } 10649*9a0e4156SSadaf Ebrahimi return NULL; 10650*9a0e4156SSadaf Ebrahimi case AArch64_ST1Fourv16b_POST: 10651*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10652*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10653*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10654*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10655*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 10656*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10657*9a0e4156SSadaf Ebrahimi // (ST1Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) 10658*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0A, [$\x01], #64"; 10659*9a0e4156SSadaf Ebrahimi break; 10660*9a0e4156SSadaf Ebrahimi } 10661*9a0e4156SSadaf Ebrahimi return NULL; 10662*9a0e4156SSadaf Ebrahimi case AArch64_ST1Fourv1d_POST: 10663*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10664*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10665*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10666*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10667*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && 10668*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10669*9a0e4156SSadaf Ebrahimi // (ST1Fourv1d_POST GPR64sp:$Rn, VecListFour1d:$Vt, XZR) 10670*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0B, [$\x01], #32"; 10671*9a0e4156SSadaf Ebrahimi break; 10672*9a0e4156SSadaf Ebrahimi } 10673*9a0e4156SSadaf Ebrahimi return NULL; 10674*9a0e4156SSadaf Ebrahimi case AArch64_ST1Fourv2d_POST: 10675*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10676*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10677*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10678*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10679*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 10680*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10681*9a0e4156SSadaf Ebrahimi // (ST1Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) 10682*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0C, [$\x01], #64"; 10683*9a0e4156SSadaf Ebrahimi break; 10684*9a0e4156SSadaf Ebrahimi } 10685*9a0e4156SSadaf Ebrahimi return NULL; 10686*9a0e4156SSadaf Ebrahimi case AArch64_ST1Fourv2s_POST: 10687*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10688*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10689*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10690*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10691*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && 10692*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10693*9a0e4156SSadaf Ebrahimi // (ST1Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) 10694*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0D, [$\x01], #32"; 10695*9a0e4156SSadaf Ebrahimi break; 10696*9a0e4156SSadaf Ebrahimi } 10697*9a0e4156SSadaf Ebrahimi return NULL; 10698*9a0e4156SSadaf Ebrahimi case AArch64_ST1Fourv4h_POST: 10699*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10700*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10701*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10702*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10703*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && 10704*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10705*9a0e4156SSadaf Ebrahimi // (ST1Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) 10706*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0E, [$\x01], #32"; 10707*9a0e4156SSadaf Ebrahimi break; 10708*9a0e4156SSadaf Ebrahimi } 10709*9a0e4156SSadaf Ebrahimi return NULL; 10710*9a0e4156SSadaf Ebrahimi case AArch64_ST1Fourv4s_POST: 10711*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10712*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10713*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10714*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10715*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 10716*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10717*9a0e4156SSadaf Ebrahimi // (ST1Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) 10718*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0F, [$\x01], #64"; 10719*9a0e4156SSadaf Ebrahimi break; 10720*9a0e4156SSadaf Ebrahimi } 10721*9a0e4156SSadaf Ebrahimi return NULL; 10722*9a0e4156SSadaf Ebrahimi case AArch64_ST1Fourv8b_POST: 10723*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10724*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10725*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10726*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10727*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && 10728*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10729*9a0e4156SSadaf Ebrahimi // (ST1Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) 10730*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x10, [$\x01], #32"; 10731*9a0e4156SSadaf Ebrahimi break; 10732*9a0e4156SSadaf Ebrahimi } 10733*9a0e4156SSadaf Ebrahimi return NULL; 10734*9a0e4156SSadaf Ebrahimi case AArch64_ST1Fourv8h_POST: 10735*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10736*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10737*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10738*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10739*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 10740*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10741*9a0e4156SSadaf Ebrahimi // (ST1Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) 10742*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x11, [$\x01], #64"; 10743*9a0e4156SSadaf Ebrahimi break; 10744*9a0e4156SSadaf Ebrahimi } 10745*9a0e4156SSadaf Ebrahimi return NULL; 10746*9a0e4156SSadaf Ebrahimi case AArch64_ST1Onev16b_POST: 10747*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10748*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10749*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10750*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10751*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 10752*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10753*9a0e4156SSadaf Ebrahimi // (ST1Onev16b_POST GPR64sp:$Rn, VecListOne16b:$Vt, XZR) 10754*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0A, [$\x01], #16"; 10755*9a0e4156SSadaf Ebrahimi break; 10756*9a0e4156SSadaf Ebrahimi } 10757*9a0e4156SSadaf Ebrahimi return NULL; 10758*9a0e4156SSadaf Ebrahimi case AArch64_ST1Onev1d_POST: 10759*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10760*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10761*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10762*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10763*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && 10764*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10765*9a0e4156SSadaf Ebrahimi // (ST1Onev1d_POST GPR64sp:$Rn, VecListOne1d:$Vt, XZR) 10766*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0B, [$\x01], #8"; 10767*9a0e4156SSadaf Ebrahimi break; 10768*9a0e4156SSadaf Ebrahimi } 10769*9a0e4156SSadaf Ebrahimi return NULL; 10770*9a0e4156SSadaf Ebrahimi case AArch64_ST1Onev2d_POST: 10771*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10772*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10773*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10774*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10775*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 10776*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10777*9a0e4156SSadaf Ebrahimi // (ST1Onev2d_POST GPR64sp:$Rn, VecListOne2d:$Vt, XZR) 10778*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0C, [$\x01], #16"; 10779*9a0e4156SSadaf Ebrahimi break; 10780*9a0e4156SSadaf Ebrahimi } 10781*9a0e4156SSadaf Ebrahimi return NULL; 10782*9a0e4156SSadaf Ebrahimi case AArch64_ST1Onev2s_POST: 10783*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10784*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10785*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10786*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10787*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && 10788*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10789*9a0e4156SSadaf Ebrahimi // (ST1Onev2s_POST GPR64sp:$Rn, VecListOne2s:$Vt, XZR) 10790*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0D, [$\x01], #8"; 10791*9a0e4156SSadaf Ebrahimi break; 10792*9a0e4156SSadaf Ebrahimi } 10793*9a0e4156SSadaf Ebrahimi return NULL; 10794*9a0e4156SSadaf Ebrahimi case AArch64_ST1Onev4h_POST: 10795*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10796*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10797*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10798*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10799*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && 10800*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10801*9a0e4156SSadaf Ebrahimi // (ST1Onev4h_POST GPR64sp:$Rn, VecListOne4h:$Vt, XZR) 10802*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0E, [$\x01], #8"; 10803*9a0e4156SSadaf Ebrahimi break; 10804*9a0e4156SSadaf Ebrahimi } 10805*9a0e4156SSadaf Ebrahimi return NULL; 10806*9a0e4156SSadaf Ebrahimi case AArch64_ST1Onev4s_POST: 10807*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10808*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10809*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10810*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10811*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 10812*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10813*9a0e4156SSadaf Ebrahimi // (ST1Onev4s_POST GPR64sp:$Rn, VecListOne4s:$Vt, XZR) 10814*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0F, [$\x01], #16"; 10815*9a0e4156SSadaf Ebrahimi break; 10816*9a0e4156SSadaf Ebrahimi } 10817*9a0e4156SSadaf Ebrahimi return NULL; 10818*9a0e4156SSadaf Ebrahimi case AArch64_ST1Onev8b_POST: 10819*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10820*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10821*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10822*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10823*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && 10824*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10825*9a0e4156SSadaf Ebrahimi // (ST1Onev8b_POST GPR64sp:$Rn, VecListOne8b:$Vt, XZR) 10826*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x10, [$\x01], #8"; 10827*9a0e4156SSadaf Ebrahimi break; 10828*9a0e4156SSadaf Ebrahimi } 10829*9a0e4156SSadaf Ebrahimi return NULL; 10830*9a0e4156SSadaf Ebrahimi case AArch64_ST1Onev8h_POST: 10831*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10832*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10833*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10834*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10835*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 10836*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10837*9a0e4156SSadaf Ebrahimi // (ST1Onev8h_POST GPR64sp:$Rn, VecListOne8h:$Vt, XZR) 10838*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x11, [$\x01], #16"; 10839*9a0e4156SSadaf Ebrahimi break; 10840*9a0e4156SSadaf Ebrahimi } 10841*9a0e4156SSadaf Ebrahimi return NULL; 10842*9a0e4156SSadaf Ebrahimi case AArch64_ST1Threev16b_POST: 10843*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10844*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10845*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10846*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10847*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 10848*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10849*9a0e4156SSadaf Ebrahimi // (ST1Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) 10850*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0A, [$\x01], #48"; 10851*9a0e4156SSadaf Ebrahimi break; 10852*9a0e4156SSadaf Ebrahimi } 10853*9a0e4156SSadaf Ebrahimi return NULL; 10854*9a0e4156SSadaf Ebrahimi case AArch64_ST1Threev1d_POST: 10855*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10856*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10857*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10858*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10859*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && 10860*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10861*9a0e4156SSadaf Ebrahimi // (ST1Threev1d_POST GPR64sp:$Rn, VecListThree1d:$Vt, XZR) 10862*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0B, [$\x01], #24"; 10863*9a0e4156SSadaf Ebrahimi break; 10864*9a0e4156SSadaf Ebrahimi } 10865*9a0e4156SSadaf Ebrahimi return NULL; 10866*9a0e4156SSadaf Ebrahimi case AArch64_ST1Threev2d_POST: 10867*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10868*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10869*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10870*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10871*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 10872*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10873*9a0e4156SSadaf Ebrahimi // (ST1Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) 10874*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0C, [$\x01], #48"; 10875*9a0e4156SSadaf Ebrahimi break; 10876*9a0e4156SSadaf Ebrahimi } 10877*9a0e4156SSadaf Ebrahimi return NULL; 10878*9a0e4156SSadaf Ebrahimi case AArch64_ST1Threev2s_POST: 10879*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10880*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10881*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10882*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10883*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && 10884*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10885*9a0e4156SSadaf Ebrahimi // (ST1Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) 10886*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0D, [$\x01], #24"; 10887*9a0e4156SSadaf Ebrahimi break; 10888*9a0e4156SSadaf Ebrahimi } 10889*9a0e4156SSadaf Ebrahimi return NULL; 10890*9a0e4156SSadaf Ebrahimi case AArch64_ST1Threev4h_POST: 10891*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10892*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10893*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10894*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10895*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && 10896*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10897*9a0e4156SSadaf Ebrahimi // (ST1Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) 10898*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0E, [$\x01], #24"; 10899*9a0e4156SSadaf Ebrahimi break; 10900*9a0e4156SSadaf Ebrahimi } 10901*9a0e4156SSadaf Ebrahimi return NULL; 10902*9a0e4156SSadaf Ebrahimi case AArch64_ST1Threev4s_POST: 10903*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10904*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10905*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10906*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10907*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 10908*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10909*9a0e4156SSadaf Ebrahimi // (ST1Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) 10910*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0F, [$\x01], #48"; 10911*9a0e4156SSadaf Ebrahimi break; 10912*9a0e4156SSadaf Ebrahimi } 10913*9a0e4156SSadaf Ebrahimi return NULL; 10914*9a0e4156SSadaf Ebrahimi case AArch64_ST1Threev8b_POST: 10915*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10916*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10917*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10918*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10919*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && 10920*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10921*9a0e4156SSadaf Ebrahimi // (ST1Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) 10922*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x10, [$\x01], #24"; 10923*9a0e4156SSadaf Ebrahimi break; 10924*9a0e4156SSadaf Ebrahimi } 10925*9a0e4156SSadaf Ebrahimi return NULL; 10926*9a0e4156SSadaf Ebrahimi case AArch64_ST1Threev8h_POST: 10927*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10928*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10929*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10930*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10931*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 10932*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10933*9a0e4156SSadaf Ebrahimi // (ST1Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) 10934*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x11, [$\x01], #48"; 10935*9a0e4156SSadaf Ebrahimi break; 10936*9a0e4156SSadaf Ebrahimi } 10937*9a0e4156SSadaf Ebrahimi return NULL; 10938*9a0e4156SSadaf Ebrahimi case AArch64_ST1Twov16b_POST: 10939*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10940*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10941*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10942*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10943*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 10944*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10945*9a0e4156SSadaf Ebrahimi // (ST1Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) 10946*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0A, [$\x01], #32"; 10947*9a0e4156SSadaf Ebrahimi break; 10948*9a0e4156SSadaf Ebrahimi } 10949*9a0e4156SSadaf Ebrahimi return NULL; 10950*9a0e4156SSadaf Ebrahimi case AArch64_ST1Twov1d_POST: 10951*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10952*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10953*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10954*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10955*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && 10956*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10957*9a0e4156SSadaf Ebrahimi // (ST1Twov1d_POST GPR64sp:$Rn, VecListTwo1d:$Vt, XZR) 10958*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0B, [$\x01], #16"; 10959*9a0e4156SSadaf Ebrahimi break; 10960*9a0e4156SSadaf Ebrahimi } 10961*9a0e4156SSadaf Ebrahimi return NULL; 10962*9a0e4156SSadaf Ebrahimi case AArch64_ST1Twov2d_POST: 10963*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10964*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10965*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10966*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10967*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 10968*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10969*9a0e4156SSadaf Ebrahimi // (ST1Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) 10970*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0C, [$\x01], #32"; 10971*9a0e4156SSadaf Ebrahimi break; 10972*9a0e4156SSadaf Ebrahimi } 10973*9a0e4156SSadaf Ebrahimi return NULL; 10974*9a0e4156SSadaf Ebrahimi case AArch64_ST1Twov2s_POST: 10975*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10976*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10977*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10978*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10979*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && 10980*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10981*9a0e4156SSadaf Ebrahimi // (ST1Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) 10982*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0D, [$\x01], #16"; 10983*9a0e4156SSadaf Ebrahimi break; 10984*9a0e4156SSadaf Ebrahimi } 10985*9a0e4156SSadaf Ebrahimi return NULL; 10986*9a0e4156SSadaf Ebrahimi case AArch64_ST1Twov4h_POST: 10987*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 10988*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 10989*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 10990*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 10991*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && 10992*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 10993*9a0e4156SSadaf Ebrahimi // (ST1Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) 10994*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0E, [$\x01], #16"; 10995*9a0e4156SSadaf Ebrahimi break; 10996*9a0e4156SSadaf Ebrahimi } 10997*9a0e4156SSadaf Ebrahimi return NULL; 10998*9a0e4156SSadaf Ebrahimi case AArch64_ST1Twov4s_POST: 10999*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11000*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11001*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11002*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11003*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 11004*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11005*9a0e4156SSadaf Ebrahimi // (ST1Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) 11006*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x0F, [$\x01], #32"; 11007*9a0e4156SSadaf Ebrahimi break; 11008*9a0e4156SSadaf Ebrahimi } 11009*9a0e4156SSadaf Ebrahimi return NULL; 11010*9a0e4156SSadaf Ebrahimi case AArch64_ST1Twov8b_POST: 11011*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11012*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11013*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11014*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11015*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && 11016*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11017*9a0e4156SSadaf Ebrahimi // (ST1Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) 11018*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x10, [$\x01], #16"; 11019*9a0e4156SSadaf Ebrahimi break; 11020*9a0e4156SSadaf Ebrahimi } 11021*9a0e4156SSadaf Ebrahimi return NULL; 11022*9a0e4156SSadaf Ebrahimi case AArch64_ST1Twov8h_POST: 11023*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11024*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11025*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11026*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11027*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 11028*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11029*9a0e4156SSadaf Ebrahimi // (ST1Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) 11030*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x11, [$\x01], #32"; 11031*9a0e4156SSadaf Ebrahimi break; 11032*9a0e4156SSadaf Ebrahimi } 11033*9a0e4156SSadaf Ebrahimi return NULL; 11034*9a0e4156SSadaf Ebrahimi case AArch64_ST1i16_POST: 11035*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11036*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11037*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11038*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11039*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 11040*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 11041*9a0e4156SSadaf Ebrahimi // (ST1i16_POST GPR64sp:$Rn, VecListOneh:$Vt, VectorIndexH:$idx, XZR) 11042*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #2"; 11043*9a0e4156SSadaf Ebrahimi break; 11044*9a0e4156SSadaf Ebrahimi } 11045*9a0e4156SSadaf Ebrahimi return NULL; 11046*9a0e4156SSadaf Ebrahimi case AArch64_ST1i32_POST: 11047*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11048*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11049*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11050*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11051*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 11052*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 11053*9a0e4156SSadaf Ebrahimi // (ST1i32_POST GPR64sp:$Rn, VecListOnes:$Vt, VectorIndexS:$idx, XZR) 11054*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #4"; 11055*9a0e4156SSadaf Ebrahimi break; 11056*9a0e4156SSadaf Ebrahimi } 11057*9a0e4156SSadaf Ebrahimi return NULL; 11058*9a0e4156SSadaf Ebrahimi case AArch64_ST1i64_POST: 11059*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11060*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11061*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11062*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11063*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 11064*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 11065*9a0e4156SSadaf Ebrahimi // (ST1i64_POST GPR64sp:$Rn, VecListOned:$Vt, VectorIndexD:$idx, XZR) 11066*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #8"; 11067*9a0e4156SSadaf Ebrahimi break; 11068*9a0e4156SSadaf Ebrahimi } 11069*9a0e4156SSadaf Ebrahimi return NULL; 11070*9a0e4156SSadaf Ebrahimi case AArch64_ST1i8_POST: 11071*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11072*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11073*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11074*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11075*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 11076*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 11077*9a0e4156SSadaf Ebrahimi // (ST1i8_POST GPR64sp:$Rn, VecListOneb:$Vt, VectorIndexB:$idx, XZR) 11078*9a0e4156SSadaf Ebrahimi AsmString = "st1 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #1"; 11079*9a0e4156SSadaf Ebrahimi break; 11080*9a0e4156SSadaf Ebrahimi } 11081*9a0e4156SSadaf Ebrahimi return NULL; 11082*9a0e4156SSadaf Ebrahimi case AArch64_ST2Twov16b_POST: 11083*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11084*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11085*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11086*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11087*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 11088*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11089*9a0e4156SSadaf Ebrahimi // (ST2Twov16b_POST GPR64sp:$Rn, VecListTwo16b:$Vt, XZR) 11090*9a0e4156SSadaf Ebrahimi AsmString = "st2 $\xFF\x02\x0A, [$\x01], #32"; 11091*9a0e4156SSadaf Ebrahimi break; 11092*9a0e4156SSadaf Ebrahimi } 11093*9a0e4156SSadaf Ebrahimi return NULL; 11094*9a0e4156SSadaf Ebrahimi case AArch64_ST2Twov2d_POST: 11095*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11096*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11097*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11098*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11099*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 11100*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11101*9a0e4156SSadaf Ebrahimi // (ST2Twov2d_POST GPR64sp:$Rn, VecListTwo2d:$Vt, XZR) 11102*9a0e4156SSadaf Ebrahimi AsmString = "st2 $\xFF\x02\x0C, [$\x01], #32"; 11103*9a0e4156SSadaf Ebrahimi break; 11104*9a0e4156SSadaf Ebrahimi } 11105*9a0e4156SSadaf Ebrahimi return NULL; 11106*9a0e4156SSadaf Ebrahimi case AArch64_ST2Twov2s_POST: 11107*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11108*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11109*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11110*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11111*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && 11112*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11113*9a0e4156SSadaf Ebrahimi // (ST2Twov2s_POST GPR64sp:$Rn, VecListTwo2s:$Vt, XZR) 11114*9a0e4156SSadaf Ebrahimi AsmString = "st2 $\xFF\x02\x0D, [$\x01], #16"; 11115*9a0e4156SSadaf Ebrahimi break; 11116*9a0e4156SSadaf Ebrahimi } 11117*9a0e4156SSadaf Ebrahimi return NULL; 11118*9a0e4156SSadaf Ebrahimi case AArch64_ST2Twov4h_POST: 11119*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11120*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11121*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11122*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11123*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && 11124*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11125*9a0e4156SSadaf Ebrahimi // (ST2Twov4h_POST GPR64sp:$Rn, VecListTwo4h:$Vt, XZR) 11126*9a0e4156SSadaf Ebrahimi AsmString = "st2 $\xFF\x02\x0E, [$\x01], #16"; 11127*9a0e4156SSadaf Ebrahimi break; 11128*9a0e4156SSadaf Ebrahimi } 11129*9a0e4156SSadaf Ebrahimi return NULL; 11130*9a0e4156SSadaf Ebrahimi case AArch64_ST2Twov4s_POST: 11131*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11132*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11133*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11134*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11135*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 11136*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11137*9a0e4156SSadaf Ebrahimi // (ST2Twov4s_POST GPR64sp:$Rn, VecListTwo4s:$Vt, XZR) 11138*9a0e4156SSadaf Ebrahimi AsmString = "st2 $\xFF\x02\x0F, [$\x01], #32"; 11139*9a0e4156SSadaf Ebrahimi break; 11140*9a0e4156SSadaf Ebrahimi } 11141*9a0e4156SSadaf Ebrahimi return NULL; 11142*9a0e4156SSadaf Ebrahimi case AArch64_ST2Twov8b_POST: 11143*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11144*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11145*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11146*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11147*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDRegClassID, 1) && 11148*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11149*9a0e4156SSadaf Ebrahimi // (ST2Twov8b_POST GPR64sp:$Rn, VecListTwo8b:$Vt, XZR) 11150*9a0e4156SSadaf Ebrahimi AsmString = "st2 $\xFF\x02\x10, [$\x01], #16"; 11151*9a0e4156SSadaf Ebrahimi break; 11152*9a0e4156SSadaf Ebrahimi } 11153*9a0e4156SSadaf Ebrahimi return NULL; 11154*9a0e4156SSadaf Ebrahimi case AArch64_ST2Twov8h_POST: 11155*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11156*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11157*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11158*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11159*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 11160*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11161*9a0e4156SSadaf Ebrahimi // (ST2Twov8h_POST GPR64sp:$Rn, VecListTwo8h:$Vt, XZR) 11162*9a0e4156SSadaf Ebrahimi AsmString = "st2 $\xFF\x02\x11, [$\x01], #32"; 11163*9a0e4156SSadaf Ebrahimi break; 11164*9a0e4156SSadaf Ebrahimi } 11165*9a0e4156SSadaf Ebrahimi return NULL; 11166*9a0e4156SSadaf Ebrahimi case AArch64_ST2i16_POST: 11167*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11168*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11169*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11170*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11171*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 11172*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 11173*9a0e4156SSadaf Ebrahimi // (ST2i16_POST GPR64sp:$Rn, VecListTwoh:$Vt, VectorIndexH:$idx, XZR) 11174*9a0e4156SSadaf Ebrahimi AsmString = "st2 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #4"; 11175*9a0e4156SSadaf Ebrahimi break; 11176*9a0e4156SSadaf Ebrahimi } 11177*9a0e4156SSadaf Ebrahimi return NULL; 11178*9a0e4156SSadaf Ebrahimi case AArch64_ST2i32_POST: 11179*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11180*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11181*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11182*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11183*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 11184*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 11185*9a0e4156SSadaf Ebrahimi // (ST2i32_POST GPR64sp:$Rn, VecListTwos:$Vt, VectorIndexS:$idx, XZR) 11186*9a0e4156SSadaf Ebrahimi AsmString = "st2 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #8"; 11187*9a0e4156SSadaf Ebrahimi break; 11188*9a0e4156SSadaf Ebrahimi } 11189*9a0e4156SSadaf Ebrahimi return NULL; 11190*9a0e4156SSadaf Ebrahimi case AArch64_ST2i64_POST: 11191*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11192*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11193*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11194*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11195*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 11196*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 11197*9a0e4156SSadaf Ebrahimi // (ST2i64_POST GPR64sp:$Rn, VecListTwod:$Vt, VectorIndexD:$idx, XZR) 11198*9a0e4156SSadaf Ebrahimi AsmString = "st2 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #16"; 11199*9a0e4156SSadaf Ebrahimi break; 11200*9a0e4156SSadaf Ebrahimi } 11201*9a0e4156SSadaf Ebrahimi return NULL; 11202*9a0e4156SSadaf Ebrahimi case AArch64_ST2i8_POST: 11203*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11204*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11205*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11206*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11207*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQRegClassID, 1) && 11208*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 11209*9a0e4156SSadaf Ebrahimi // (ST2i8_POST GPR64sp:$Rn, VecListTwob:$Vt, VectorIndexB:$idx, XZR) 11210*9a0e4156SSadaf Ebrahimi AsmString = "st2 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #2"; 11211*9a0e4156SSadaf Ebrahimi break; 11212*9a0e4156SSadaf Ebrahimi } 11213*9a0e4156SSadaf Ebrahimi return NULL; 11214*9a0e4156SSadaf Ebrahimi case AArch64_ST3Threev16b_POST: 11215*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11216*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11217*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11218*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11219*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 11220*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11221*9a0e4156SSadaf Ebrahimi // (ST3Threev16b_POST GPR64sp:$Rn, VecListThree16b:$Vt, XZR) 11222*9a0e4156SSadaf Ebrahimi AsmString = "st3 $\xFF\x02\x0A, [$\x01], #48"; 11223*9a0e4156SSadaf Ebrahimi break; 11224*9a0e4156SSadaf Ebrahimi } 11225*9a0e4156SSadaf Ebrahimi return NULL; 11226*9a0e4156SSadaf Ebrahimi case AArch64_ST3Threev2d_POST: 11227*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11228*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11229*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11230*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11231*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 11232*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11233*9a0e4156SSadaf Ebrahimi // (ST3Threev2d_POST GPR64sp:$Rn, VecListThree2d:$Vt, XZR) 11234*9a0e4156SSadaf Ebrahimi AsmString = "st3 $\xFF\x02\x0C, [$\x01], #48"; 11235*9a0e4156SSadaf Ebrahimi break; 11236*9a0e4156SSadaf Ebrahimi } 11237*9a0e4156SSadaf Ebrahimi return NULL; 11238*9a0e4156SSadaf Ebrahimi case AArch64_ST3Threev2s_POST: 11239*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11240*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11241*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11242*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11243*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && 11244*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11245*9a0e4156SSadaf Ebrahimi // (ST3Threev2s_POST GPR64sp:$Rn, VecListThree2s:$Vt, XZR) 11246*9a0e4156SSadaf Ebrahimi AsmString = "st3 $\xFF\x02\x0D, [$\x01], #24"; 11247*9a0e4156SSadaf Ebrahimi break; 11248*9a0e4156SSadaf Ebrahimi } 11249*9a0e4156SSadaf Ebrahimi return NULL; 11250*9a0e4156SSadaf Ebrahimi case AArch64_ST3Threev4h_POST: 11251*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11252*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11253*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11254*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11255*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && 11256*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11257*9a0e4156SSadaf Ebrahimi // (ST3Threev4h_POST GPR64sp:$Rn, VecListThree4h:$Vt, XZR) 11258*9a0e4156SSadaf Ebrahimi AsmString = "st3 $\xFF\x02\x0E, [$\x01], #24"; 11259*9a0e4156SSadaf Ebrahimi break; 11260*9a0e4156SSadaf Ebrahimi } 11261*9a0e4156SSadaf Ebrahimi return NULL; 11262*9a0e4156SSadaf Ebrahimi case AArch64_ST3Threev4s_POST: 11263*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11264*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11265*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11266*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11267*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 11268*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11269*9a0e4156SSadaf Ebrahimi // (ST3Threev4s_POST GPR64sp:$Rn, VecListThree4s:$Vt, XZR) 11270*9a0e4156SSadaf Ebrahimi AsmString = "st3 $\xFF\x02\x0F, [$\x01], #48"; 11271*9a0e4156SSadaf Ebrahimi break; 11272*9a0e4156SSadaf Ebrahimi } 11273*9a0e4156SSadaf Ebrahimi return NULL; 11274*9a0e4156SSadaf Ebrahimi case AArch64_ST3Threev8b_POST: 11275*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11276*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11277*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11278*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11279*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDRegClassID, 1) && 11280*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11281*9a0e4156SSadaf Ebrahimi // (ST3Threev8b_POST GPR64sp:$Rn, VecListThree8b:$Vt, XZR) 11282*9a0e4156SSadaf Ebrahimi AsmString = "st3 $\xFF\x02\x10, [$\x01], #24"; 11283*9a0e4156SSadaf Ebrahimi break; 11284*9a0e4156SSadaf Ebrahimi } 11285*9a0e4156SSadaf Ebrahimi return NULL; 11286*9a0e4156SSadaf Ebrahimi case AArch64_ST3Threev8h_POST: 11287*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11288*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11289*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11290*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11291*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 11292*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11293*9a0e4156SSadaf Ebrahimi // (ST3Threev8h_POST GPR64sp:$Rn, VecListThree8h:$Vt, XZR) 11294*9a0e4156SSadaf Ebrahimi AsmString = "st3 $\xFF\x02\x11, [$\x01], #48"; 11295*9a0e4156SSadaf Ebrahimi break; 11296*9a0e4156SSadaf Ebrahimi } 11297*9a0e4156SSadaf Ebrahimi return NULL; 11298*9a0e4156SSadaf Ebrahimi case AArch64_ST3i16_POST: 11299*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11300*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11301*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11302*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11303*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 11304*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 11305*9a0e4156SSadaf Ebrahimi // (ST3i16_POST GPR64sp:$Rn, VecListThreeh:$Vt, VectorIndexH:$idx, XZR) 11306*9a0e4156SSadaf Ebrahimi AsmString = "st3 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #6"; 11307*9a0e4156SSadaf Ebrahimi break; 11308*9a0e4156SSadaf Ebrahimi } 11309*9a0e4156SSadaf Ebrahimi return NULL; 11310*9a0e4156SSadaf Ebrahimi case AArch64_ST3i32_POST: 11311*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11312*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11313*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11314*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11315*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 11316*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 11317*9a0e4156SSadaf Ebrahimi // (ST3i32_POST GPR64sp:$Rn, VecListThrees:$Vt, VectorIndexS:$idx, XZR) 11318*9a0e4156SSadaf Ebrahimi AsmString = "st3 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #12"; 11319*9a0e4156SSadaf Ebrahimi break; 11320*9a0e4156SSadaf Ebrahimi } 11321*9a0e4156SSadaf Ebrahimi return NULL; 11322*9a0e4156SSadaf Ebrahimi case AArch64_ST3i64_POST: 11323*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11324*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11325*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11326*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11327*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 11328*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 11329*9a0e4156SSadaf Ebrahimi // (ST3i64_POST GPR64sp:$Rn, VecListThreed:$Vt, VectorIndexD:$idx, XZR) 11330*9a0e4156SSadaf Ebrahimi AsmString = "st3 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #24"; 11331*9a0e4156SSadaf Ebrahimi break; 11332*9a0e4156SSadaf Ebrahimi } 11333*9a0e4156SSadaf Ebrahimi return NULL; 11334*9a0e4156SSadaf Ebrahimi case AArch64_ST3i8_POST: 11335*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11336*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11337*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11338*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11339*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQRegClassID, 1) && 11340*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 11341*9a0e4156SSadaf Ebrahimi // (ST3i8_POST GPR64sp:$Rn, VecListThreeb:$Vt, VectorIndexB:$idx, XZR) 11342*9a0e4156SSadaf Ebrahimi AsmString = "st3 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #3"; 11343*9a0e4156SSadaf Ebrahimi break; 11344*9a0e4156SSadaf Ebrahimi } 11345*9a0e4156SSadaf Ebrahimi return NULL; 11346*9a0e4156SSadaf Ebrahimi case AArch64_ST4Fourv16b_POST: 11347*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11348*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11349*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11350*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11351*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 11352*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11353*9a0e4156SSadaf Ebrahimi // (ST4Fourv16b_POST GPR64sp:$Rn, VecListFour16b:$Vt, XZR) 11354*9a0e4156SSadaf Ebrahimi AsmString = "st4 $\xFF\x02\x0A, [$\x01], #64"; 11355*9a0e4156SSadaf Ebrahimi break; 11356*9a0e4156SSadaf Ebrahimi } 11357*9a0e4156SSadaf Ebrahimi return NULL; 11358*9a0e4156SSadaf Ebrahimi case AArch64_ST4Fourv2d_POST: 11359*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11360*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11361*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11362*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11363*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 11364*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11365*9a0e4156SSadaf Ebrahimi // (ST4Fourv2d_POST GPR64sp:$Rn, VecListFour2d:$Vt, XZR) 11366*9a0e4156SSadaf Ebrahimi AsmString = "st4 $\xFF\x02\x0C, [$\x01], #64"; 11367*9a0e4156SSadaf Ebrahimi break; 11368*9a0e4156SSadaf Ebrahimi } 11369*9a0e4156SSadaf Ebrahimi return NULL; 11370*9a0e4156SSadaf Ebrahimi case AArch64_ST4Fourv2s_POST: 11371*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11372*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11373*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11374*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11375*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && 11376*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11377*9a0e4156SSadaf Ebrahimi // (ST4Fourv2s_POST GPR64sp:$Rn, VecListFour2s:$Vt, XZR) 11378*9a0e4156SSadaf Ebrahimi AsmString = "st4 $\xFF\x02\x0D, [$\x01], #32"; 11379*9a0e4156SSadaf Ebrahimi break; 11380*9a0e4156SSadaf Ebrahimi } 11381*9a0e4156SSadaf Ebrahimi return NULL; 11382*9a0e4156SSadaf Ebrahimi case AArch64_ST4Fourv4h_POST: 11383*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11384*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11385*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11386*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11387*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && 11388*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11389*9a0e4156SSadaf Ebrahimi // (ST4Fourv4h_POST GPR64sp:$Rn, VecListFour4h:$Vt, XZR) 11390*9a0e4156SSadaf Ebrahimi AsmString = "st4 $\xFF\x02\x0E, [$\x01], #32"; 11391*9a0e4156SSadaf Ebrahimi break; 11392*9a0e4156SSadaf Ebrahimi } 11393*9a0e4156SSadaf Ebrahimi return NULL; 11394*9a0e4156SSadaf Ebrahimi case AArch64_ST4Fourv4s_POST: 11395*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11396*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11397*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11398*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11399*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 11400*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11401*9a0e4156SSadaf Ebrahimi // (ST4Fourv4s_POST GPR64sp:$Rn, VecListFour4s:$Vt, XZR) 11402*9a0e4156SSadaf Ebrahimi AsmString = "st4 $\xFF\x02\x0F, [$\x01], #64"; 11403*9a0e4156SSadaf Ebrahimi break; 11404*9a0e4156SSadaf Ebrahimi } 11405*9a0e4156SSadaf Ebrahimi return NULL; 11406*9a0e4156SSadaf Ebrahimi case AArch64_ST4Fourv8b_POST: 11407*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11408*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11409*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11410*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11411*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_DDDDRegClassID, 1) && 11412*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11413*9a0e4156SSadaf Ebrahimi // (ST4Fourv8b_POST GPR64sp:$Rn, VecListFour8b:$Vt, XZR) 11414*9a0e4156SSadaf Ebrahimi AsmString = "st4 $\xFF\x02\x10, [$\x01], #32"; 11415*9a0e4156SSadaf Ebrahimi break; 11416*9a0e4156SSadaf Ebrahimi } 11417*9a0e4156SSadaf Ebrahimi return NULL; 11418*9a0e4156SSadaf Ebrahimi case AArch64_ST4Fourv8h_POST: 11419*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11420*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11421*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11422*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11423*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 11424*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 2)) == AArch64_XZR) { 11425*9a0e4156SSadaf Ebrahimi // (ST4Fourv8h_POST GPR64sp:$Rn, VecListFour8h:$Vt, XZR) 11426*9a0e4156SSadaf Ebrahimi AsmString = "st4 $\xFF\x02\x11, [$\x01], #64"; 11427*9a0e4156SSadaf Ebrahimi break; 11428*9a0e4156SSadaf Ebrahimi } 11429*9a0e4156SSadaf Ebrahimi return NULL; 11430*9a0e4156SSadaf Ebrahimi case AArch64_ST4i16_POST: 11431*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11432*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11433*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11434*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11435*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 11436*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 11437*9a0e4156SSadaf Ebrahimi // (ST4i16_POST GPR64sp:$Rn, VecListFourh:$Vt, VectorIndexH:$idx, XZR) 11438*9a0e4156SSadaf Ebrahimi AsmString = "st4 $\xFF\x02\x12$\xFF\x03\x09, [$\x01], #8"; 11439*9a0e4156SSadaf Ebrahimi break; 11440*9a0e4156SSadaf Ebrahimi } 11441*9a0e4156SSadaf Ebrahimi return NULL; 11442*9a0e4156SSadaf Ebrahimi case AArch64_ST4i32_POST: 11443*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11444*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11445*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11446*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11447*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 11448*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 11449*9a0e4156SSadaf Ebrahimi // (ST4i32_POST GPR64sp:$Rn, VecListFours:$Vt, VectorIndexS:$idx, XZR) 11450*9a0e4156SSadaf Ebrahimi AsmString = "st4 $\xFF\x02\x13$\xFF\x03\x09, [$\x01], #16"; 11451*9a0e4156SSadaf Ebrahimi break; 11452*9a0e4156SSadaf Ebrahimi } 11453*9a0e4156SSadaf Ebrahimi return NULL; 11454*9a0e4156SSadaf Ebrahimi case AArch64_ST4i64_POST: 11455*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11456*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11457*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11458*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11459*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 11460*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 11461*9a0e4156SSadaf Ebrahimi // (ST4i64_POST GPR64sp:$Rn, VecListFourd:$Vt, VectorIndexD:$idx, XZR) 11462*9a0e4156SSadaf Ebrahimi AsmString = "st4 $\xFF\x02\x14$\xFF\x03\x09, [$\x01], #32"; 11463*9a0e4156SSadaf Ebrahimi break; 11464*9a0e4156SSadaf Ebrahimi } 11465*9a0e4156SSadaf Ebrahimi return NULL; 11466*9a0e4156SSadaf Ebrahimi case AArch64_ST4i8_POST: 11467*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11468*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11469*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 11470*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11471*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_QQQQRegClassID, 1) && 11472*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 11473*9a0e4156SSadaf Ebrahimi // (ST4i8_POST GPR64sp:$Rn, VecListFourb:$Vt, VectorIndexB:$idx, XZR) 11474*9a0e4156SSadaf Ebrahimi AsmString = "st4 $\xFF\x02\x15$\xFF\x03\x09, [$\x01], #4"; 11475*9a0e4156SSadaf Ebrahimi break; 11476*9a0e4156SSadaf Ebrahimi } 11477*9a0e4156SSadaf Ebrahimi return NULL; 11478*9a0e4156SSadaf Ebrahimi case AArch64_STNPDi: 11479*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11480*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11481*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && 11482*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11483*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && 11484*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 11485*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && 11486*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 11487*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 11488*9a0e4156SSadaf Ebrahimi // (STNPDi FPR64:$Rt, FPR64:$Rt2, GPR64sp:$Rn, 0) 11489*9a0e4156SSadaf Ebrahimi AsmString = "stnp $\x01, $\x02, [$\x03]"; 11490*9a0e4156SSadaf Ebrahimi break; 11491*9a0e4156SSadaf Ebrahimi } 11492*9a0e4156SSadaf Ebrahimi return NULL; 11493*9a0e4156SSadaf Ebrahimi case AArch64_STNPQi: 11494*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11495*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11496*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 11497*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11498*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 11499*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 11500*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && 11501*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 11502*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 11503*9a0e4156SSadaf Ebrahimi // (STNPQi FPR128:$Rt, FPR128:$Rt2, GPR64sp:$Rn, 0) 11504*9a0e4156SSadaf Ebrahimi AsmString = "stnp $\x01, $\x02, [$\x03]"; 11505*9a0e4156SSadaf Ebrahimi break; 11506*9a0e4156SSadaf Ebrahimi } 11507*9a0e4156SSadaf Ebrahimi return NULL; 11508*9a0e4156SSadaf Ebrahimi case AArch64_STNPSi: 11509*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11510*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11511*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) && 11512*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11513*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 1) && 11514*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 11515*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && 11516*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 11517*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 11518*9a0e4156SSadaf Ebrahimi // (STNPSi FPR32:$Rt, FPR32:$Rt2, GPR64sp:$Rn, 0) 11519*9a0e4156SSadaf Ebrahimi AsmString = "stnp $\x01, $\x02, [$\x03]"; 11520*9a0e4156SSadaf Ebrahimi break; 11521*9a0e4156SSadaf Ebrahimi } 11522*9a0e4156SSadaf Ebrahimi return NULL; 11523*9a0e4156SSadaf Ebrahimi case AArch64_STNPWi: 11524*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11525*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11526*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 11527*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11528*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 11529*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 11530*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && 11531*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 11532*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 11533*9a0e4156SSadaf Ebrahimi // (STNPWi GPR32:$Rt, GPR32:$Rt2, GPR64sp:$Rn, 0) 11534*9a0e4156SSadaf Ebrahimi AsmString = "stnp $\x01, $\x02, [$\x03]"; 11535*9a0e4156SSadaf Ebrahimi break; 11536*9a0e4156SSadaf Ebrahimi } 11537*9a0e4156SSadaf Ebrahimi return NULL; 11538*9a0e4156SSadaf Ebrahimi case AArch64_STNPXi: 11539*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11540*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11541*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 11542*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11543*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 11544*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 11545*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && 11546*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 11547*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 11548*9a0e4156SSadaf Ebrahimi // (STNPXi GPR64:$Rt, GPR64:$Rt2, GPR64sp:$Rn, 0) 11549*9a0e4156SSadaf Ebrahimi AsmString = "stnp $\x01, $\x02, [$\x03]"; 11550*9a0e4156SSadaf Ebrahimi break; 11551*9a0e4156SSadaf Ebrahimi } 11552*9a0e4156SSadaf Ebrahimi return NULL; 11553*9a0e4156SSadaf Ebrahimi case AArch64_STPDi: 11554*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11555*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11556*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && 11557*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11558*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 1) && 11559*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 11560*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && 11561*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 11562*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 11563*9a0e4156SSadaf Ebrahimi // (STPDi FPR64:$Rt, FPR64:$Rt2, GPR64sp:$Rn, 0) 11564*9a0e4156SSadaf Ebrahimi AsmString = "stp $\x01, $\x02, [$\x03]"; 11565*9a0e4156SSadaf Ebrahimi break; 11566*9a0e4156SSadaf Ebrahimi } 11567*9a0e4156SSadaf Ebrahimi return NULL; 11568*9a0e4156SSadaf Ebrahimi case AArch64_STPQi: 11569*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11570*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11571*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 11572*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11573*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1) && 11574*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 11575*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && 11576*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 11577*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 11578*9a0e4156SSadaf Ebrahimi // (STPQi FPR128:$Rt, FPR128:$Rt2, GPR64sp:$Rn, 0) 11579*9a0e4156SSadaf Ebrahimi AsmString = "stp $\x01, $\x02, [$\x03]"; 11580*9a0e4156SSadaf Ebrahimi break; 11581*9a0e4156SSadaf Ebrahimi } 11582*9a0e4156SSadaf Ebrahimi return NULL; 11583*9a0e4156SSadaf Ebrahimi case AArch64_STPSi: 11584*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11585*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11586*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) && 11587*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11588*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 1) && 11589*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 11590*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && 11591*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 11592*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 11593*9a0e4156SSadaf Ebrahimi // (STPSi FPR32:$Rt, FPR32:$Rt2, GPR64sp:$Rn, 0) 11594*9a0e4156SSadaf Ebrahimi AsmString = "stp $\x01, $\x02, [$\x03]"; 11595*9a0e4156SSadaf Ebrahimi break; 11596*9a0e4156SSadaf Ebrahimi } 11597*9a0e4156SSadaf Ebrahimi return NULL; 11598*9a0e4156SSadaf Ebrahimi case AArch64_STPWi: 11599*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11600*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11601*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 11602*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11603*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 11604*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 11605*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && 11606*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 11607*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 11608*9a0e4156SSadaf Ebrahimi // (STPWi GPR32:$Rt, GPR32:$Rt2, GPR64sp:$Rn, 0) 11609*9a0e4156SSadaf Ebrahimi AsmString = "stp $\x01, $\x02, [$\x03]"; 11610*9a0e4156SSadaf Ebrahimi break; 11611*9a0e4156SSadaf Ebrahimi } 11612*9a0e4156SSadaf Ebrahimi return NULL; 11613*9a0e4156SSadaf Ebrahimi case AArch64_STPXi: 11614*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 11615*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11616*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 11617*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11618*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 11619*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 11620*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 2) && 11621*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 11622*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 11623*9a0e4156SSadaf Ebrahimi // (STPXi GPR64:$Rt, GPR64:$Rt2, GPR64sp:$Rn, 0) 11624*9a0e4156SSadaf Ebrahimi AsmString = "stp $\x01, $\x02, [$\x03]"; 11625*9a0e4156SSadaf Ebrahimi break; 11626*9a0e4156SSadaf Ebrahimi } 11627*9a0e4156SSadaf Ebrahimi return NULL; 11628*9a0e4156SSadaf Ebrahimi case AArch64_STRBBroX: 11629*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 11630*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11631*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 11632*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11633*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11634*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 11635*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 11636*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 11637*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 11638*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 11639*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 11640*9a0e4156SSadaf Ebrahimi // (STRBBroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 11641*9a0e4156SSadaf Ebrahimi AsmString = "strb $\x01, [$\x02, $\x03]"; 11642*9a0e4156SSadaf Ebrahimi break; 11643*9a0e4156SSadaf Ebrahimi } 11644*9a0e4156SSadaf Ebrahimi return NULL; 11645*9a0e4156SSadaf Ebrahimi case AArch64_STRBBui: 11646*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11647*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11648*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 11649*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11650*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11651*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 11652*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 11653*9a0e4156SSadaf Ebrahimi // (STRBBui GPR32:$Rt, GPR64sp:$Rn, 0) 11654*9a0e4156SSadaf Ebrahimi AsmString = "strb $\x01, [$\x02]"; 11655*9a0e4156SSadaf Ebrahimi break; 11656*9a0e4156SSadaf Ebrahimi } 11657*9a0e4156SSadaf Ebrahimi return NULL; 11658*9a0e4156SSadaf Ebrahimi case AArch64_STRBroX: 11659*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 11660*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11661*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) && 11662*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11663*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11664*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 11665*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 11666*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 11667*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 11668*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 11669*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 11670*9a0e4156SSadaf Ebrahimi // (STRBroX FPR8:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 11671*9a0e4156SSadaf Ebrahimi AsmString = "str $\x01, [$\x02, $\x03]"; 11672*9a0e4156SSadaf Ebrahimi break; 11673*9a0e4156SSadaf Ebrahimi } 11674*9a0e4156SSadaf Ebrahimi return NULL; 11675*9a0e4156SSadaf Ebrahimi case AArch64_STRBui: 11676*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11677*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11678*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) && 11679*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11680*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11681*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 11682*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 11683*9a0e4156SSadaf Ebrahimi // (STRBui FPR8:$Rt, GPR64sp:$Rn, 0) 11684*9a0e4156SSadaf Ebrahimi AsmString = "str $\x01, [$\x02]"; 11685*9a0e4156SSadaf Ebrahimi break; 11686*9a0e4156SSadaf Ebrahimi } 11687*9a0e4156SSadaf Ebrahimi return NULL; 11688*9a0e4156SSadaf Ebrahimi case AArch64_STRDroX: 11689*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 11690*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11691*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && 11692*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11693*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11694*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 11695*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 11696*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 11697*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 11698*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 11699*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 11700*9a0e4156SSadaf Ebrahimi // (STRDroX FPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 11701*9a0e4156SSadaf Ebrahimi AsmString = "str $\x01, [$\x02, $\x03]"; 11702*9a0e4156SSadaf Ebrahimi break; 11703*9a0e4156SSadaf Ebrahimi } 11704*9a0e4156SSadaf Ebrahimi return NULL; 11705*9a0e4156SSadaf Ebrahimi case AArch64_STRDui: 11706*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11707*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11708*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && 11709*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11710*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11711*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 11712*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 11713*9a0e4156SSadaf Ebrahimi // (STRDui FPR64:$Rt, GPR64sp:$Rn, 0) 11714*9a0e4156SSadaf Ebrahimi AsmString = "str $\x01, [$\x02]"; 11715*9a0e4156SSadaf Ebrahimi break; 11716*9a0e4156SSadaf Ebrahimi } 11717*9a0e4156SSadaf Ebrahimi return NULL; 11718*9a0e4156SSadaf Ebrahimi case AArch64_STRHHroX: 11719*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 11720*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11721*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 11722*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11723*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11724*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 11725*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 11726*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 11727*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 11728*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 11729*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 11730*9a0e4156SSadaf Ebrahimi // (STRHHroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 11731*9a0e4156SSadaf Ebrahimi AsmString = "strh $\x01, [$\x02, $\x03]"; 11732*9a0e4156SSadaf Ebrahimi break; 11733*9a0e4156SSadaf Ebrahimi } 11734*9a0e4156SSadaf Ebrahimi return NULL; 11735*9a0e4156SSadaf Ebrahimi case AArch64_STRHHui: 11736*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11737*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11738*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 11739*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11740*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11741*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 11742*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 11743*9a0e4156SSadaf Ebrahimi // (STRHHui GPR32:$Rt, GPR64sp:$Rn, 0) 11744*9a0e4156SSadaf Ebrahimi AsmString = "strh $\x01, [$\x02]"; 11745*9a0e4156SSadaf Ebrahimi break; 11746*9a0e4156SSadaf Ebrahimi } 11747*9a0e4156SSadaf Ebrahimi return NULL; 11748*9a0e4156SSadaf Ebrahimi case AArch64_STRHroX: 11749*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 11750*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11751*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) && 11752*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11753*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11754*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 11755*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 11756*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 11757*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 11758*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 11759*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 11760*9a0e4156SSadaf Ebrahimi // (STRHroX FPR16:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 11761*9a0e4156SSadaf Ebrahimi AsmString = "str $\x01, [$\x02, $\x03]"; 11762*9a0e4156SSadaf Ebrahimi break; 11763*9a0e4156SSadaf Ebrahimi } 11764*9a0e4156SSadaf Ebrahimi return NULL; 11765*9a0e4156SSadaf Ebrahimi case AArch64_STRHui: 11766*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11767*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11768*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) && 11769*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11770*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11771*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 11772*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 11773*9a0e4156SSadaf Ebrahimi // (STRHui FPR16:$Rt, GPR64sp:$Rn, 0) 11774*9a0e4156SSadaf Ebrahimi AsmString = "str $\x01, [$\x02]"; 11775*9a0e4156SSadaf Ebrahimi break; 11776*9a0e4156SSadaf Ebrahimi } 11777*9a0e4156SSadaf Ebrahimi return NULL; 11778*9a0e4156SSadaf Ebrahimi case AArch64_STRQroX: 11779*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 11780*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11781*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 11782*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11783*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11784*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 11785*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 11786*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 11787*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 11788*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 11789*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 11790*9a0e4156SSadaf Ebrahimi // (STRQroX FPR128:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 11791*9a0e4156SSadaf Ebrahimi AsmString = "str $\x01, [$\x02, $\x03]"; 11792*9a0e4156SSadaf Ebrahimi break; 11793*9a0e4156SSadaf Ebrahimi } 11794*9a0e4156SSadaf Ebrahimi return NULL; 11795*9a0e4156SSadaf Ebrahimi case AArch64_STRQui: 11796*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11797*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11798*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 11799*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11800*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11801*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 11802*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 11803*9a0e4156SSadaf Ebrahimi // (STRQui FPR128:$Rt, GPR64sp:$Rn, 0) 11804*9a0e4156SSadaf Ebrahimi AsmString = "str $\x01, [$\x02]"; 11805*9a0e4156SSadaf Ebrahimi break; 11806*9a0e4156SSadaf Ebrahimi } 11807*9a0e4156SSadaf Ebrahimi return NULL; 11808*9a0e4156SSadaf Ebrahimi case AArch64_STRSroX: 11809*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 11810*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11811*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) && 11812*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11813*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11814*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 11815*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 11816*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 11817*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 11818*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 11819*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 11820*9a0e4156SSadaf Ebrahimi // (STRSroX FPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 11821*9a0e4156SSadaf Ebrahimi AsmString = "str $\x01, [$\x02, $\x03]"; 11822*9a0e4156SSadaf Ebrahimi break; 11823*9a0e4156SSadaf Ebrahimi } 11824*9a0e4156SSadaf Ebrahimi return NULL; 11825*9a0e4156SSadaf Ebrahimi case AArch64_STRSui: 11826*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11827*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11828*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) && 11829*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11830*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11831*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 11832*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 11833*9a0e4156SSadaf Ebrahimi // (STRSui FPR32:$Rt, GPR64sp:$Rn, 0) 11834*9a0e4156SSadaf Ebrahimi AsmString = "str $\x01, [$\x02]"; 11835*9a0e4156SSadaf Ebrahimi break; 11836*9a0e4156SSadaf Ebrahimi } 11837*9a0e4156SSadaf Ebrahimi return NULL; 11838*9a0e4156SSadaf Ebrahimi case AArch64_STRWroX: 11839*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 11840*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11841*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 11842*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11843*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11844*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 11845*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 11846*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 11847*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 11848*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 11849*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 11850*9a0e4156SSadaf Ebrahimi // (STRWroX GPR32:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 11851*9a0e4156SSadaf Ebrahimi AsmString = "str $\x01, [$\x02, $\x03]"; 11852*9a0e4156SSadaf Ebrahimi break; 11853*9a0e4156SSadaf Ebrahimi } 11854*9a0e4156SSadaf Ebrahimi return NULL; 11855*9a0e4156SSadaf Ebrahimi case AArch64_STRWui: 11856*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11857*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11858*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 11859*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11860*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11861*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 11862*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 11863*9a0e4156SSadaf Ebrahimi // (STRWui GPR32:$Rt, GPR64sp:$Rn, 0) 11864*9a0e4156SSadaf Ebrahimi AsmString = "str $\x01, [$\x02]"; 11865*9a0e4156SSadaf Ebrahimi break; 11866*9a0e4156SSadaf Ebrahimi } 11867*9a0e4156SSadaf Ebrahimi return NULL; 11868*9a0e4156SSadaf Ebrahimi case AArch64_STRXroX: 11869*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 11870*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11871*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 11872*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11873*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11874*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 11875*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 11876*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 11877*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0 && 11878*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 4)) && 11879*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 4)) == 0) { 11880*9a0e4156SSadaf Ebrahimi // (STRXroX GPR64:$Rt, GPR64sp:$Rn, GPR64:$Rm, 0, 0) 11881*9a0e4156SSadaf Ebrahimi AsmString = "str $\x01, [$\x02, $\x03]"; 11882*9a0e4156SSadaf Ebrahimi break; 11883*9a0e4156SSadaf Ebrahimi } 11884*9a0e4156SSadaf Ebrahimi return NULL; 11885*9a0e4156SSadaf Ebrahimi case AArch64_STRXui: 11886*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11887*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11888*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 11889*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11890*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11891*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 11892*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 11893*9a0e4156SSadaf Ebrahimi // (STRXui GPR64:$Rt, GPR64sp:$Rn, 0) 11894*9a0e4156SSadaf Ebrahimi AsmString = "str $\x01, [$\x02]"; 11895*9a0e4156SSadaf Ebrahimi break; 11896*9a0e4156SSadaf Ebrahimi } 11897*9a0e4156SSadaf Ebrahimi return NULL; 11898*9a0e4156SSadaf Ebrahimi case AArch64_STTRBi: 11899*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11900*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11901*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 11902*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11903*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11904*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 11905*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 11906*9a0e4156SSadaf Ebrahimi // (STTRBi GPR32:$Rt, GPR64sp:$Rn, 0) 11907*9a0e4156SSadaf Ebrahimi AsmString = "sttrb $\x01, [$\x02]"; 11908*9a0e4156SSadaf Ebrahimi break; 11909*9a0e4156SSadaf Ebrahimi } 11910*9a0e4156SSadaf Ebrahimi return NULL; 11911*9a0e4156SSadaf Ebrahimi case AArch64_STTRHi: 11912*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11913*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11914*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 11915*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11916*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11917*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 11918*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 11919*9a0e4156SSadaf Ebrahimi // (STTRHi GPR32:$Rt, GPR64sp:$Rn, 0) 11920*9a0e4156SSadaf Ebrahimi AsmString = "sttrh $\x01, [$\x02]"; 11921*9a0e4156SSadaf Ebrahimi break; 11922*9a0e4156SSadaf Ebrahimi } 11923*9a0e4156SSadaf Ebrahimi return NULL; 11924*9a0e4156SSadaf Ebrahimi case AArch64_STTRWi: 11925*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11926*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11927*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 11928*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11929*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11930*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 11931*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 11932*9a0e4156SSadaf Ebrahimi // (STTRWi GPR32:$Rt, GPR64sp:$Rn, 0) 11933*9a0e4156SSadaf Ebrahimi AsmString = "sttr $\x01, [$\x02]"; 11934*9a0e4156SSadaf Ebrahimi break; 11935*9a0e4156SSadaf Ebrahimi } 11936*9a0e4156SSadaf Ebrahimi return NULL; 11937*9a0e4156SSadaf Ebrahimi case AArch64_STTRXi: 11938*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11939*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11940*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 11941*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11942*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11943*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 11944*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 11945*9a0e4156SSadaf Ebrahimi // (STTRXi GPR64:$Rt, GPR64sp:$Rn, 0) 11946*9a0e4156SSadaf Ebrahimi AsmString = "sttr $\x01, [$\x02]"; 11947*9a0e4156SSadaf Ebrahimi break; 11948*9a0e4156SSadaf Ebrahimi } 11949*9a0e4156SSadaf Ebrahimi return NULL; 11950*9a0e4156SSadaf Ebrahimi case AArch64_STURBBi: 11951*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11952*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11953*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 11954*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11955*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11956*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 11957*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 11958*9a0e4156SSadaf Ebrahimi // (STURBBi GPR32:$Rt, GPR64sp:$Rn, 0) 11959*9a0e4156SSadaf Ebrahimi AsmString = "sturb $\x01, [$\x02]"; 11960*9a0e4156SSadaf Ebrahimi break; 11961*9a0e4156SSadaf Ebrahimi } 11962*9a0e4156SSadaf Ebrahimi return NULL; 11963*9a0e4156SSadaf Ebrahimi case AArch64_STURBi: 11964*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11965*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11966*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR8RegClassID, 0) && 11967*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11968*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11969*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 11970*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 11971*9a0e4156SSadaf Ebrahimi // (STURBi FPR8:$Rt, GPR64sp:$Rn, 0) 11972*9a0e4156SSadaf Ebrahimi AsmString = "stur $\x01, [$\x02]"; 11973*9a0e4156SSadaf Ebrahimi break; 11974*9a0e4156SSadaf Ebrahimi } 11975*9a0e4156SSadaf Ebrahimi return NULL; 11976*9a0e4156SSadaf Ebrahimi case AArch64_STURDi: 11977*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11978*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11979*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR64RegClassID, 0) && 11980*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11981*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11982*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 11983*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 11984*9a0e4156SSadaf Ebrahimi // (STURDi FPR64:$Rt, GPR64sp:$Rn, 0) 11985*9a0e4156SSadaf Ebrahimi AsmString = "stur $\x01, [$\x02]"; 11986*9a0e4156SSadaf Ebrahimi break; 11987*9a0e4156SSadaf Ebrahimi } 11988*9a0e4156SSadaf Ebrahimi return NULL; 11989*9a0e4156SSadaf Ebrahimi case AArch64_STURHHi: 11990*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 11991*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 11992*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 11993*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 11994*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 11995*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 11996*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 11997*9a0e4156SSadaf Ebrahimi // (STURHHi GPR32:$Rt, GPR64sp:$Rn, 0) 11998*9a0e4156SSadaf Ebrahimi AsmString = "sturh $\x01, [$\x02]"; 11999*9a0e4156SSadaf Ebrahimi break; 12000*9a0e4156SSadaf Ebrahimi } 12001*9a0e4156SSadaf Ebrahimi return NULL; 12002*9a0e4156SSadaf Ebrahimi case AArch64_STURHi: 12003*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 12004*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12005*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR16RegClassID, 0) && 12006*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12007*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 12008*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 12009*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 12010*9a0e4156SSadaf Ebrahimi // (STURHi FPR16:$Rt, GPR64sp:$Rn, 0) 12011*9a0e4156SSadaf Ebrahimi AsmString = "stur $\x01, [$\x02]"; 12012*9a0e4156SSadaf Ebrahimi break; 12013*9a0e4156SSadaf Ebrahimi } 12014*9a0e4156SSadaf Ebrahimi return NULL; 12015*9a0e4156SSadaf Ebrahimi case AArch64_STURQi: 12016*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 12017*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12018*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 0) && 12019*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12020*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 12021*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 12022*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 12023*9a0e4156SSadaf Ebrahimi // (STURQi FPR128:$Rt, GPR64sp:$Rn, 0) 12024*9a0e4156SSadaf Ebrahimi AsmString = "stur $\x01, [$\x02]"; 12025*9a0e4156SSadaf Ebrahimi break; 12026*9a0e4156SSadaf Ebrahimi } 12027*9a0e4156SSadaf Ebrahimi return NULL; 12028*9a0e4156SSadaf Ebrahimi case AArch64_STURSi: 12029*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 12030*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12031*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR32RegClassID, 0) && 12032*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12033*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 12034*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 12035*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 12036*9a0e4156SSadaf Ebrahimi // (STURSi FPR32:$Rt, GPR64sp:$Rn, 0) 12037*9a0e4156SSadaf Ebrahimi AsmString = "stur $\x01, [$\x02]"; 12038*9a0e4156SSadaf Ebrahimi break; 12039*9a0e4156SSadaf Ebrahimi } 12040*9a0e4156SSadaf Ebrahimi return NULL; 12041*9a0e4156SSadaf Ebrahimi case AArch64_STURWi: 12042*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 12043*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12044*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 12045*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12046*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 12047*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 12048*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 12049*9a0e4156SSadaf Ebrahimi // (STURWi GPR32:$Rt, GPR64sp:$Rn, 0) 12050*9a0e4156SSadaf Ebrahimi AsmString = "stur $\x01, [$\x02]"; 12051*9a0e4156SSadaf Ebrahimi break; 12052*9a0e4156SSadaf Ebrahimi } 12053*9a0e4156SSadaf Ebrahimi return NULL; 12054*9a0e4156SSadaf Ebrahimi case AArch64_STURXi: 12055*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 12056*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12057*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 12058*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12059*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 12060*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 12061*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) { 12062*9a0e4156SSadaf Ebrahimi // (STURXi GPR64:$Rt, GPR64sp:$Rn, 0) 12063*9a0e4156SSadaf Ebrahimi AsmString = "stur $\x01, [$\x02]"; 12064*9a0e4156SSadaf Ebrahimi break; 12065*9a0e4156SSadaf Ebrahimi } 12066*9a0e4156SSadaf Ebrahimi return NULL; 12067*9a0e4156SSadaf Ebrahimi case AArch64_SUBSWri: 12068*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12069*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && 12070*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12071*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1)) { 12072*9a0e4156SSadaf Ebrahimi // (SUBSWri WZR, GPR32sp:$src, addsub_shifted_imm32:$imm) 12073*9a0e4156SSadaf Ebrahimi AsmString = "cmp $\x02, $\xFF\x03\x01"; 12074*9a0e4156SSadaf Ebrahimi break; 12075*9a0e4156SSadaf Ebrahimi } 12076*9a0e4156SSadaf Ebrahimi return NULL; 12077*9a0e4156SSadaf Ebrahimi case AArch64_SUBSWrs: 12078*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12079*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && 12080*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12081*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 12082*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12083*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 12084*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12085*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 12086*9a0e4156SSadaf Ebrahimi // (SUBSWrs WZR, GPR32:$src1, GPR32:$src2, 0) 12087*9a0e4156SSadaf Ebrahimi AsmString = "cmp $\x02, $\x03"; 12088*9a0e4156SSadaf Ebrahimi break; 12089*9a0e4156SSadaf Ebrahimi } 12090*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12091*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && 12092*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12093*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 12094*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12095*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { 12096*9a0e4156SSadaf Ebrahimi // (SUBSWrs WZR, GPR32:$src1, GPR32:$src2, arith_shift32:$sh) 12097*9a0e4156SSadaf Ebrahimi AsmString = "cmp $\x02, $\x03$\xFF\x04\x02"; 12098*9a0e4156SSadaf Ebrahimi break; 12099*9a0e4156SSadaf Ebrahimi } 12100*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12101*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12102*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 12103*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR && 12104*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12105*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 12106*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12107*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 12108*9a0e4156SSadaf Ebrahimi // (SUBSWrs GPR32:$dst, WZR, GPR32:$src, 0) 12109*9a0e4156SSadaf Ebrahimi AsmString = "negs $\x01, $\x03"; 12110*9a0e4156SSadaf Ebrahimi break; 12111*9a0e4156SSadaf Ebrahimi } 12112*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12113*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12114*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 12115*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR && 12116*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12117*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { 12118*9a0e4156SSadaf Ebrahimi // (SUBSWrs GPR32:$dst, WZR, GPR32:$src, arith_shift32:$shift) 12119*9a0e4156SSadaf Ebrahimi AsmString = "negs $\x01, $\x03$\xFF\x04\x02"; 12120*9a0e4156SSadaf Ebrahimi break; 12121*9a0e4156SSadaf Ebrahimi } 12122*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12123*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12124*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 12125*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12126*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 12127*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12128*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 12129*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12130*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 12131*9a0e4156SSadaf Ebrahimi // (SUBSWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) 12132*9a0e4156SSadaf Ebrahimi AsmString = "subs $\x01, $\x02, $\x03"; 12133*9a0e4156SSadaf Ebrahimi break; 12134*9a0e4156SSadaf Ebrahimi } 12135*9a0e4156SSadaf Ebrahimi return NULL; 12136*9a0e4156SSadaf Ebrahimi case AArch64_SUBSWrx: 12137*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12138*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && 12139*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12140*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) && 12141*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12142*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 12143*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12144*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) { 12145*9a0e4156SSadaf Ebrahimi // (SUBSWrx WZR, GPR32sponly:$src1, GPR32:$src2, 16) 12146*9a0e4156SSadaf Ebrahimi AsmString = "cmp $\x02, $\x03"; 12147*9a0e4156SSadaf Ebrahimi break; 12148*9a0e4156SSadaf Ebrahimi } 12149*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12150*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_WZR && 12151*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12152*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1) && 12153*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12154*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { 12155*9a0e4156SSadaf Ebrahimi // (SUBSWrx WZR, GPR32sp:$src1, GPR32:$src2, arith_extend:$sh) 12156*9a0e4156SSadaf Ebrahimi AsmString = "cmp $\x02, $\x03$\xFF\x04\x03"; 12157*9a0e4156SSadaf Ebrahimi break; 12158*9a0e4156SSadaf Ebrahimi } 12159*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12160*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12161*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 12162*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12163*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) && 12164*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12165*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 12166*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12167*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) { 12168*9a0e4156SSadaf Ebrahimi // (SUBSWrx GPR32:$dst, GPR32sponly:$src1, GPR32:$src2, 16) 12169*9a0e4156SSadaf Ebrahimi AsmString = "subs $\x01, $\x02, $\x03"; 12170*9a0e4156SSadaf Ebrahimi break; 12171*9a0e4156SSadaf Ebrahimi } 12172*9a0e4156SSadaf Ebrahimi return NULL; 12173*9a0e4156SSadaf Ebrahimi case AArch64_SUBSXri: 12174*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12175*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && 12176*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12177*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1)) { 12178*9a0e4156SSadaf Ebrahimi // (SUBSXri XZR, GPR64sp:$src, addsub_shifted_imm64:$imm) 12179*9a0e4156SSadaf Ebrahimi AsmString = "cmp $\x02, $\xFF\x03\x01"; 12180*9a0e4156SSadaf Ebrahimi break; 12181*9a0e4156SSadaf Ebrahimi } 12182*9a0e4156SSadaf Ebrahimi return NULL; 12183*9a0e4156SSadaf Ebrahimi case AArch64_SUBSXrs: 12184*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12185*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && 12186*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12187*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 12188*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12189*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 12190*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12191*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 12192*9a0e4156SSadaf Ebrahimi // (SUBSXrs XZR, GPR64:$src1, GPR64:$src2, 0) 12193*9a0e4156SSadaf Ebrahimi AsmString = "cmp $\x02, $\x03"; 12194*9a0e4156SSadaf Ebrahimi break; 12195*9a0e4156SSadaf Ebrahimi } 12196*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12197*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && 12198*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12199*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 12200*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12201*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) { 12202*9a0e4156SSadaf Ebrahimi // (SUBSXrs XZR, GPR64:$src1, GPR64:$src2, arith_shift64:$sh) 12203*9a0e4156SSadaf Ebrahimi AsmString = "cmp $\x02, $\x03$\xFF\x04\x02"; 12204*9a0e4156SSadaf Ebrahimi break; 12205*9a0e4156SSadaf Ebrahimi } 12206*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12207*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12208*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 12209*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR && 12210*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12211*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 12212*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12213*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 12214*9a0e4156SSadaf Ebrahimi // (SUBSXrs GPR64:$dst, XZR, GPR64:$src, 0) 12215*9a0e4156SSadaf Ebrahimi AsmString = "negs $\x01, $\x03"; 12216*9a0e4156SSadaf Ebrahimi break; 12217*9a0e4156SSadaf Ebrahimi } 12218*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12219*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12220*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 12221*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR && 12222*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12223*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) { 12224*9a0e4156SSadaf Ebrahimi // (SUBSXrs GPR64:$dst, XZR, GPR64:$src, arith_shift64:$shift) 12225*9a0e4156SSadaf Ebrahimi AsmString = "negs $\x01, $\x03$\xFF\x04\x02"; 12226*9a0e4156SSadaf Ebrahimi break; 12227*9a0e4156SSadaf Ebrahimi } 12228*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12229*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12230*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 12231*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12232*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 12233*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12234*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 12235*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12236*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 12237*9a0e4156SSadaf Ebrahimi // (SUBSXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) 12238*9a0e4156SSadaf Ebrahimi AsmString = "subs $\x01, $\x02, $\x03"; 12239*9a0e4156SSadaf Ebrahimi break; 12240*9a0e4156SSadaf Ebrahimi } 12241*9a0e4156SSadaf Ebrahimi return NULL; 12242*9a0e4156SSadaf Ebrahimi case AArch64_SUBSXrx: 12243*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12244*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && 12245*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12246*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 12247*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12248*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { 12249*9a0e4156SSadaf Ebrahimi // (SUBSXrx XZR, GPR64sp:$src1, GPR32:$src2, arith_extend:$sh) 12250*9a0e4156SSadaf Ebrahimi AsmString = "cmp $\x02, $\x03$\xFF\x04\x03"; 12251*9a0e4156SSadaf Ebrahimi break; 12252*9a0e4156SSadaf Ebrahimi } 12253*9a0e4156SSadaf Ebrahimi return NULL; 12254*9a0e4156SSadaf Ebrahimi case AArch64_SUBSXrx64: 12255*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12256*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && 12257*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12258*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) && 12259*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12260*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 12261*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12262*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) { 12263*9a0e4156SSadaf Ebrahimi // (SUBSXrx64 XZR, GPR64sponly:$src1, GPR64:$src2, 24) 12264*9a0e4156SSadaf Ebrahimi AsmString = "cmp $\x02, $\x03"; 12265*9a0e4156SSadaf Ebrahimi break; 12266*9a0e4156SSadaf Ebrahimi } 12267*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12268*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 0)) == AArch64_XZR && 12269*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12270*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 12271*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12272*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) { 12273*9a0e4156SSadaf Ebrahimi // (SUBSXrx64 XZR, GPR64sp:$src1, GPR64:$src2, arith_extendlsl64:$sh) 12274*9a0e4156SSadaf Ebrahimi AsmString = "cmp $\x02, $\x03$\xFF\x04\x03"; 12275*9a0e4156SSadaf Ebrahimi break; 12276*9a0e4156SSadaf Ebrahimi } 12277*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12278*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12279*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 12280*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12281*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) && 12282*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12283*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 12284*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12285*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) { 12286*9a0e4156SSadaf Ebrahimi // (SUBSXrx64 GPR64:$dst, GPR64sponly:$src1, GPR64:$src2, 24) 12287*9a0e4156SSadaf Ebrahimi AsmString = "subs $\x01, $\x02, $\x03"; 12288*9a0e4156SSadaf Ebrahimi break; 12289*9a0e4156SSadaf Ebrahimi } 12290*9a0e4156SSadaf Ebrahimi return NULL; 12291*9a0e4156SSadaf Ebrahimi case AArch64_SUBWrs: 12292*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12293*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12294*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 12295*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR && 12296*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12297*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 12298*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12299*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 12300*9a0e4156SSadaf Ebrahimi // (SUBWrs GPR32:$dst, WZR, GPR32:$src, 0) 12301*9a0e4156SSadaf Ebrahimi AsmString = "neg $\x01, $\x03"; 12302*9a0e4156SSadaf Ebrahimi break; 12303*9a0e4156SSadaf Ebrahimi } 12304*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12305*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12306*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 12307*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_WZR && 12308*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12309*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2)) { 12310*9a0e4156SSadaf Ebrahimi // (SUBWrs GPR32:$dst, WZR, GPR32:$src, arith_shift32:$shift) 12311*9a0e4156SSadaf Ebrahimi AsmString = "neg $\x01, $\x03$\xFF\x04\x02"; 12312*9a0e4156SSadaf Ebrahimi break; 12313*9a0e4156SSadaf Ebrahimi } 12314*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12315*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12316*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 12317*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12318*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 12319*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12320*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 12321*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12322*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 12323*9a0e4156SSadaf Ebrahimi // (SUBWrs GPR32:$dst, GPR32:$src1, GPR32:$src2, 0) 12324*9a0e4156SSadaf Ebrahimi AsmString = "sub $\x01, $\x02, $\x03"; 12325*9a0e4156SSadaf Ebrahimi break; 12326*9a0e4156SSadaf Ebrahimi } 12327*9a0e4156SSadaf Ebrahimi return NULL; 12328*9a0e4156SSadaf Ebrahimi case AArch64_SUBWrx: 12329*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12330*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12331*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 0) && 12332*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12333*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 1) && 12334*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12335*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 12336*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12337*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) { 12338*9a0e4156SSadaf Ebrahimi // (SUBWrx GPR32sponly:$dst, GPR32sp:$src1, GPR32:$src2, 16) 12339*9a0e4156SSadaf Ebrahimi AsmString = "sub $\x01, $\x02, $\x03"; 12340*9a0e4156SSadaf Ebrahimi break; 12341*9a0e4156SSadaf Ebrahimi } 12342*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12343*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12344*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32spRegClassID, 0) && 12345*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12346*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32sponlyRegClassID, 1) && 12347*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12348*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 12349*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12350*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 16) { 12351*9a0e4156SSadaf Ebrahimi // (SUBWrx GPR32sp:$dst, GPR32sponly:$src1, GPR32:$src2, 16) 12352*9a0e4156SSadaf Ebrahimi AsmString = "sub $\x01, $\x02, $\x03"; 12353*9a0e4156SSadaf Ebrahimi break; 12354*9a0e4156SSadaf Ebrahimi } 12355*9a0e4156SSadaf Ebrahimi return NULL; 12356*9a0e4156SSadaf Ebrahimi case AArch64_SUBXrs: 12357*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12358*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12359*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 12360*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR && 12361*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12362*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 12363*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12364*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 12365*9a0e4156SSadaf Ebrahimi // (SUBXrs GPR64:$dst, XZR, GPR64:$src, 0) 12366*9a0e4156SSadaf Ebrahimi AsmString = "neg $\x01, $\x03"; 12367*9a0e4156SSadaf Ebrahimi break; 12368*9a0e4156SSadaf Ebrahimi } 12369*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12370*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12371*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 12372*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 1)) == AArch64_XZR && 12373*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12374*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2)) { 12375*9a0e4156SSadaf Ebrahimi // (SUBXrs GPR64:$dst, XZR, GPR64:$src, arith_shift64:$shift) 12376*9a0e4156SSadaf Ebrahimi AsmString = "neg $\x01, $\x03$\xFF\x04\x02"; 12377*9a0e4156SSadaf Ebrahimi break; 12378*9a0e4156SSadaf Ebrahimi } 12379*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12380*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12381*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 12382*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12383*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 12384*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12385*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 12386*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12387*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 0) { 12388*9a0e4156SSadaf Ebrahimi // (SUBXrs GPR64:$dst, GPR64:$src1, GPR64:$src2, 0) 12389*9a0e4156SSadaf Ebrahimi AsmString = "sub $\x01, $\x02, $\x03"; 12390*9a0e4156SSadaf Ebrahimi break; 12391*9a0e4156SSadaf Ebrahimi } 12392*9a0e4156SSadaf Ebrahimi return NULL; 12393*9a0e4156SSadaf Ebrahimi case AArch64_SUBXrx64: 12394*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12395*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12396*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 0) && 12397*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12398*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 1) && 12399*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12400*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 12401*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12402*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) { 12403*9a0e4156SSadaf Ebrahimi // (SUBXrx64 GPR64sponly:$dst, GPR64sp:$src1, GPR64:$src2, 24) 12404*9a0e4156SSadaf Ebrahimi AsmString = "sub $\x01, $\x02, $\x03"; 12405*9a0e4156SSadaf Ebrahimi break; 12406*9a0e4156SSadaf Ebrahimi } 12407*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12408*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12409*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64spRegClassID, 0) && 12410*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12411*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64sponlyRegClassID, 1) && 12412*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12413*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 2) && 12414*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12415*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 24) { 12416*9a0e4156SSadaf Ebrahimi // (SUBXrx64 GPR64sp:$dst, GPR64sponly:$src1, GPR64:$src2, 24) 12417*9a0e4156SSadaf Ebrahimi AsmString = "sub $\x01, $\x02, $\x03"; 12418*9a0e4156SSadaf Ebrahimi break; 12419*9a0e4156SSadaf Ebrahimi } 12420*9a0e4156SSadaf Ebrahimi return NULL; 12421*9a0e4156SSadaf Ebrahimi case AArch64_SYSxt: 12422*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 5 && 12423*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 4)) == AArch64_XZR) { 12424*9a0e4156SSadaf Ebrahimi // (SYSxt imm0_7:$op1, sys_cr_op:$Cn, sys_cr_op:$Cm, imm0_7:$op2, XZR) 12425*9a0e4156SSadaf Ebrahimi AsmString = "sys $\x01, $\xFF\x02\x17, $\xFF\x03\x17, $\x04"; 12426*9a0e4156SSadaf Ebrahimi break; 12427*9a0e4156SSadaf Ebrahimi } 12428*9a0e4156SSadaf Ebrahimi return NULL; 12429*9a0e4156SSadaf Ebrahimi case AArch64_UBFMWri: 12430*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12431*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12432*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 12433*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12434*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 12435*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12436*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 31) { 12437*9a0e4156SSadaf Ebrahimi // (UBFMWri GPR32:$dst, GPR32:$src, imm0_31:$shift, 31) 12438*9a0e4156SSadaf Ebrahimi AsmString = "lsr $\x01, $\x02, $\x03"; 12439*9a0e4156SSadaf Ebrahimi break; 12440*9a0e4156SSadaf Ebrahimi } 12441*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12442*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12443*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 12444*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12445*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 12446*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 12447*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && 12448*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12449*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 7) { 12450*9a0e4156SSadaf Ebrahimi // (UBFMWri GPR32:$dst, GPR32:$src, 0, 7) 12451*9a0e4156SSadaf Ebrahimi AsmString = "uxtb $\x01, $\x02"; 12452*9a0e4156SSadaf Ebrahimi break; 12453*9a0e4156SSadaf Ebrahimi } 12454*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12455*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12456*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 12457*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12458*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 12459*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 12460*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && 12461*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12462*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 15) { 12463*9a0e4156SSadaf Ebrahimi // (UBFMWri GPR32:$dst, GPR32:$src, 0, 15) 12464*9a0e4156SSadaf Ebrahimi AsmString = "uxth $\x01, $\x02"; 12465*9a0e4156SSadaf Ebrahimi break; 12466*9a0e4156SSadaf Ebrahimi } 12467*9a0e4156SSadaf Ebrahimi return NULL; 12468*9a0e4156SSadaf Ebrahimi case AArch64_UBFMXri: 12469*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12470*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12471*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 12472*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12473*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 12474*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12475*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 63) { 12476*9a0e4156SSadaf Ebrahimi // (UBFMXri GPR64:$dst, GPR64:$src, imm0_63:$shift, 63) 12477*9a0e4156SSadaf Ebrahimi AsmString = "lsr $\x01, $\x02, $\x03"; 12478*9a0e4156SSadaf Ebrahimi break; 12479*9a0e4156SSadaf Ebrahimi } 12480*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12481*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12482*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 12483*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12484*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 12485*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 12486*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && 12487*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12488*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 7) { 12489*9a0e4156SSadaf Ebrahimi // (UBFMXri GPR64:$dst, GPR64:$src, 0, 7) 12490*9a0e4156SSadaf Ebrahimi AsmString = "uxtb $\x01, $\x02"; 12491*9a0e4156SSadaf Ebrahimi break; 12492*9a0e4156SSadaf Ebrahimi } 12493*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12494*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12495*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 12496*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12497*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 12498*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 12499*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && 12500*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12501*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 15) { 12502*9a0e4156SSadaf Ebrahimi // (UBFMXri GPR64:$dst, GPR64:$src, 0, 15) 12503*9a0e4156SSadaf Ebrahimi AsmString = "uxth $\x01, $\x02"; 12504*9a0e4156SSadaf Ebrahimi break; 12505*9a0e4156SSadaf Ebrahimi } 12506*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12507*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12508*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 12509*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12510*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 1) && 12511*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 2)) && 12512*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0 && 12513*9a0e4156SSadaf Ebrahimi MCOperand_isImm(MCInst_getOperand(MI, 3)) && 12514*9a0e4156SSadaf Ebrahimi MCOperand_getImm(MCInst_getOperand(MI, 3)) == 31) { 12515*9a0e4156SSadaf Ebrahimi // (UBFMXri GPR64:$dst, GPR64:$src, 0, 31) 12516*9a0e4156SSadaf Ebrahimi AsmString = "uxtw $\x01, $\x02"; 12517*9a0e4156SSadaf Ebrahimi break; 12518*9a0e4156SSadaf Ebrahimi } 12519*9a0e4156SSadaf Ebrahimi return NULL; 12520*9a0e4156SSadaf Ebrahimi case AArch64_UMADDLrrr: 12521*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12522*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12523*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 12524*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12525*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 12526*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12527*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 12528*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 12529*9a0e4156SSadaf Ebrahimi // (UMADDLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) 12530*9a0e4156SSadaf Ebrahimi AsmString = "umull $\x01, $\x02, $\x03"; 12531*9a0e4156SSadaf Ebrahimi break; 12532*9a0e4156SSadaf Ebrahimi } 12533*9a0e4156SSadaf Ebrahimi return NULL; 12534*9a0e4156SSadaf Ebrahimi case AArch64_UMOVvi32: 12535*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 12536*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12537*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 0) && 12538*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12539*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1)) { 12540*9a0e4156SSadaf Ebrahimi // (UMOVvi32 GPR32:$dst, V128:$src, VectorIndexS:$idx) 12541*9a0e4156SSadaf Ebrahimi AsmString = "mov $\x01, $\xFF\x02\x06.s$\xFF\x03\x09"; 12542*9a0e4156SSadaf Ebrahimi break; 12543*9a0e4156SSadaf Ebrahimi } 12544*9a0e4156SSadaf Ebrahimi return NULL; 12545*9a0e4156SSadaf Ebrahimi case AArch64_UMOVvi64: 12546*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 3 && 12547*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12548*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 12549*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12550*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_FPR128RegClassID, 1)) { 12551*9a0e4156SSadaf Ebrahimi // (UMOVvi64 GPR64:$dst, V128:$src, VectorIndexD:$idx) 12552*9a0e4156SSadaf Ebrahimi AsmString = "mov $\x01, $\xFF\x02\x06.d$\xFF\x03\x09"; 12553*9a0e4156SSadaf Ebrahimi break; 12554*9a0e4156SSadaf Ebrahimi } 12555*9a0e4156SSadaf Ebrahimi return NULL; 12556*9a0e4156SSadaf Ebrahimi case AArch64_UMSUBLrrr: 12557*9a0e4156SSadaf Ebrahimi if (MCInst_getNumOperands(MI) == 4 && 12558*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 0)) && 12559*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR64RegClassID, 0) && 12560*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 1)) && 12561*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 1) && 12562*9a0e4156SSadaf Ebrahimi MCOperand_isReg(MCInst_getOperand(MI, 2)) && 12563*9a0e4156SSadaf Ebrahimi GETREGCLASS_CONTAIN(AArch64_GPR32RegClassID, 2) && 12564*9a0e4156SSadaf Ebrahimi MCOperand_getReg(MCInst_getOperand(MI, 3)) == AArch64_XZR) { 12565*9a0e4156SSadaf Ebrahimi // (UMSUBLrrr GPR64:$dst, GPR32:$src1, GPR32:$src2, XZR) 12566*9a0e4156SSadaf Ebrahimi AsmString = "umnegl $\x01, $\x02, $\x03"; 12567*9a0e4156SSadaf Ebrahimi break; 12568*9a0e4156SSadaf Ebrahimi } 12569*9a0e4156SSadaf Ebrahimi return NULL; 12570*9a0e4156SSadaf Ebrahimi } 12571*9a0e4156SSadaf Ebrahimi 12572*9a0e4156SSadaf Ebrahimi tmp = cs_strdup(AsmString); 12573*9a0e4156SSadaf Ebrahimi AsmMnem = tmp; 12574*9a0e4156SSadaf Ebrahimi for(AsmOps = tmp; *AsmOps; AsmOps++) { 12575*9a0e4156SSadaf Ebrahimi if (*AsmOps == ' ' || *AsmOps == '\t') { 12576*9a0e4156SSadaf Ebrahimi *AsmOps = '\0'; 12577*9a0e4156SSadaf Ebrahimi AsmOps++; 12578*9a0e4156SSadaf Ebrahimi break; 12579*9a0e4156SSadaf Ebrahimi } 12580*9a0e4156SSadaf Ebrahimi } 12581*9a0e4156SSadaf Ebrahimi SStream_concat0(OS, AsmMnem); 12582*9a0e4156SSadaf Ebrahimi if (*AsmOps) { 12583*9a0e4156SSadaf Ebrahimi SStream_concat0(OS, "\t"); 12584*9a0e4156SSadaf Ebrahimi for (c = AsmOps; *c; c++) { 12585*9a0e4156SSadaf Ebrahimi if (*c == '[') { 12586*9a0e4156SSadaf Ebrahimi SStream_concat0(OS, "["); 12587*9a0e4156SSadaf Ebrahimi set_mem_access(MI, true); 12588*9a0e4156SSadaf Ebrahimi } 12589*9a0e4156SSadaf Ebrahimi else if (*c == ']') { 12590*9a0e4156SSadaf Ebrahimi SStream_concat0(OS, "]"); 12591*9a0e4156SSadaf Ebrahimi set_mem_access(MI, false); 12592*9a0e4156SSadaf Ebrahimi } 12593*9a0e4156SSadaf Ebrahimi else if (*c == '$') { 12594*9a0e4156SSadaf Ebrahimi c += 1; 12595*9a0e4156SSadaf Ebrahimi if (*c == (char)0xff) { 12596*9a0e4156SSadaf Ebrahimi c += 1; 12597*9a0e4156SSadaf Ebrahimi OpIdx = *c - 1; 12598*9a0e4156SSadaf Ebrahimi c += 1; 12599*9a0e4156SSadaf Ebrahimi PrintMethodIdx = *c - 1; 12600*9a0e4156SSadaf Ebrahimi printCustomAliasOperand(MI, OpIdx, PrintMethodIdx, OS, MRI); 12601*9a0e4156SSadaf Ebrahimi } else 12602*9a0e4156SSadaf Ebrahimi printOperand(MI, *c - 1, OS); 12603*9a0e4156SSadaf Ebrahimi } else { 12604*9a0e4156SSadaf Ebrahimi SStream_concat(OS, "%c", *c); 12605*9a0e4156SSadaf Ebrahimi } 12606*9a0e4156SSadaf Ebrahimi } 12607*9a0e4156SSadaf Ebrahimi } 12608*9a0e4156SSadaf Ebrahimi return tmp; 12609*9a0e4156SSadaf Ebrahimi} 12610*9a0e4156SSadaf Ebrahimi 12611*9a0e4156SSadaf Ebrahimi#endif // PRINT_ALIAS_INSTR 12612