1*9a0e4156SSadaf Ebrahimi //===-- llvm/MC/MCInst.h - MCInst class -------------------------*- C++ -*-===// 2*9a0e4156SSadaf Ebrahimi // 3*9a0e4156SSadaf Ebrahimi // The LLVM Compiler Infrastructure 4*9a0e4156SSadaf Ebrahimi // 5*9a0e4156SSadaf Ebrahimi // This file is distributed under the University of Illinois Open Source 6*9a0e4156SSadaf Ebrahimi // License. See LICENSE.TXT for details. 7*9a0e4156SSadaf Ebrahimi // 8*9a0e4156SSadaf Ebrahimi //===----------------------------------------------------------------------===// 9*9a0e4156SSadaf Ebrahimi // 10*9a0e4156SSadaf Ebrahimi // This file contains the declaration of the MCInst and MCOperand classes, which 11*9a0e4156SSadaf Ebrahimi // is the basic representation used to represent low-level machine code 12*9a0e4156SSadaf Ebrahimi // instructions. 13*9a0e4156SSadaf Ebrahimi // 14*9a0e4156SSadaf Ebrahimi //===----------------------------------------------------------------------===// 15*9a0e4156SSadaf Ebrahimi 16*9a0e4156SSadaf Ebrahimi /* Capstone Disassembly Engine */ 17*9a0e4156SSadaf Ebrahimi /* By Nguyen Anh Quynh <[email protected]>, 2013-2015 */ 18*9a0e4156SSadaf Ebrahimi 19*9a0e4156SSadaf Ebrahimi #ifndef CS_MCINST_H 20*9a0e4156SSadaf Ebrahimi #define CS_MCINST_H 21*9a0e4156SSadaf Ebrahimi 22*9a0e4156SSadaf Ebrahimi #include "include/capstone/capstone.h" 23*9a0e4156SSadaf Ebrahimi 24*9a0e4156SSadaf Ebrahimi typedef struct MCInst MCInst; 25*9a0e4156SSadaf Ebrahimi typedef struct cs_struct cs_struct; 26*9a0e4156SSadaf Ebrahimi typedef struct MCOperand MCOperand; 27*9a0e4156SSadaf Ebrahimi 28*9a0e4156SSadaf Ebrahimi /// MCOperand - Instances of this class represent operands of the MCInst class. 29*9a0e4156SSadaf Ebrahimi /// This is a simple discriminated union. 30*9a0e4156SSadaf Ebrahimi struct MCOperand { 31*9a0e4156SSadaf Ebrahimi enum { 32*9a0e4156SSadaf Ebrahimi kInvalid = 0, ///< Uninitialized. 33*9a0e4156SSadaf Ebrahimi kRegister, ///< Register operand. 34*9a0e4156SSadaf Ebrahimi kImmediate, ///< Immediate operand. 35*9a0e4156SSadaf Ebrahimi kFPImmediate, ///< Floating-point immediate operand. 36*9a0e4156SSadaf Ebrahimi } MachineOperandType; 37*9a0e4156SSadaf Ebrahimi unsigned char Kind; 38*9a0e4156SSadaf Ebrahimi 39*9a0e4156SSadaf Ebrahimi union { 40*9a0e4156SSadaf Ebrahimi unsigned RegVal; 41*9a0e4156SSadaf Ebrahimi int64_t ImmVal; 42*9a0e4156SSadaf Ebrahimi double FPImmVal; 43*9a0e4156SSadaf Ebrahimi }; 44*9a0e4156SSadaf Ebrahimi }; 45*9a0e4156SSadaf Ebrahimi 46*9a0e4156SSadaf Ebrahimi bool MCOperand_isValid(const MCOperand *op); 47*9a0e4156SSadaf Ebrahimi 48*9a0e4156SSadaf Ebrahimi bool MCOperand_isReg(const MCOperand *op); 49*9a0e4156SSadaf Ebrahimi 50*9a0e4156SSadaf Ebrahimi bool MCOperand_isImm(const MCOperand *op); 51*9a0e4156SSadaf Ebrahimi 52*9a0e4156SSadaf Ebrahimi bool MCOperand_isFPImm(const MCOperand *op); 53*9a0e4156SSadaf Ebrahimi 54*9a0e4156SSadaf Ebrahimi bool MCOperand_isInst(const MCOperand *op); 55*9a0e4156SSadaf Ebrahimi 56*9a0e4156SSadaf Ebrahimi /// getReg - Returns the register number. 57*9a0e4156SSadaf Ebrahimi unsigned MCOperand_getReg(const MCOperand *op); 58*9a0e4156SSadaf Ebrahimi 59*9a0e4156SSadaf Ebrahimi /// setReg - Set the register number. 60*9a0e4156SSadaf Ebrahimi void MCOperand_setReg(MCOperand *op, unsigned Reg); 61*9a0e4156SSadaf Ebrahimi 62*9a0e4156SSadaf Ebrahimi int64_t MCOperand_getImm(MCOperand *op); 63*9a0e4156SSadaf Ebrahimi 64*9a0e4156SSadaf Ebrahimi void MCOperand_setImm(MCOperand *op, int64_t Val); 65*9a0e4156SSadaf Ebrahimi 66*9a0e4156SSadaf Ebrahimi double MCOperand_getFPImm(const MCOperand *op); 67*9a0e4156SSadaf Ebrahimi 68*9a0e4156SSadaf Ebrahimi void MCOperand_setFPImm(MCOperand *op, double Val); 69*9a0e4156SSadaf Ebrahimi 70*9a0e4156SSadaf Ebrahimi const MCInst *MCOperand_getInst(const MCOperand *op); 71*9a0e4156SSadaf Ebrahimi 72*9a0e4156SSadaf Ebrahimi void MCOperand_setInst(MCOperand *op, const MCInst *Val); 73*9a0e4156SSadaf Ebrahimi 74*9a0e4156SSadaf Ebrahimi // create Reg operand in the next slot 75*9a0e4156SSadaf Ebrahimi void MCOperand_CreateReg0(MCInst *inst, unsigned Reg); 76*9a0e4156SSadaf Ebrahimi 77*9a0e4156SSadaf Ebrahimi // create Reg operand use the last-unused slot 78*9a0e4156SSadaf Ebrahimi MCOperand *MCOperand_CreateReg1(MCInst *inst, unsigned Reg); 79*9a0e4156SSadaf Ebrahimi 80*9a0e4156SSadaf Ebrahimi // create Imm operand in the next slot 81*9a0e4156SSadaf Ebrahimi void MCOperand_CreateImm0(MCInst *inst, int64_t Val); 82*9a0e4156SSadaf Ebrahimi 83*9a0e4156SSadaf Ebrahimi // create Imm operand in the last-unused slot 84*9a0e4156SSadaf Ebrahimi MCOperand *MCOperand_CreateImm1(MCInst *inst, int64_t Val); 85*9a0e4156SSadaf Ebrahimi 86*9a0e4156SSadaf Ebrahimi /// MCInst - Instances of this class represent a single low-level machine 87*9a0e4156SSadaf Ebrahimi /// instruction. 88*9a0e4156SSadaf Ebrahimi struct MCInst { 89*9a0e4156SSadaf Ebrahimi unsigned OpcodePub; 90*9a0e4156SSadaf Ebrahimi uint8_t size; // number of operands 91*9a0e4156SSadaf Ebrahimi bool has_imm; // indicate this instruction has an X86_OP_IMM operand - used for ATT syntax 92*9a0e4156SSadaf Ebrahimi uint8_t op1_size; // size of 1st operand - for X86 Intel syntax 93*9a0e4156SSadaf Ebrahimi unsigned Opcode; 94*9a0e4156SSadaf Ebrahimi MCOperand Operands[48]; 95*9a0e4156SSadaf Ebrahimi cs_insn *flat_insn; // insn to be exposed to public 96*9a0e4156SSadaf Ebrahimi uint64_t address; // address of this insn 97*9a0e4156SSadaf Ebrahimi cs_struct *csh; // save the main csh 98*9a0e4156SSadaf Ebrahimi uint8_t x86opsize; // opsize for [mem] operand 99*9a0e4156SSadaf Ebrahimi 100*9a0e4156SSadaf Ebrahimi // (Optional) instruction prefix, which can be up to 4 bytes. 101*9a0e4156SSadaf Ebrahimi // A prefix byte gets value 0 when irrelevant. 102*9a0e4156SSadaf Ebrahimi // This is copied from cs_x86 struct 103*9a0e4156SSadaf Ebrahimi uint8_t x86_prefix[4]; 104*9a0e4156SSadaf Ebrahimi uint8_t imm_size; // immediate size for X86_OP_IMM operand 105*9a0e4156SSadaf Ebrahimi bool writeback; // writeback for ARM 106*9a0e4156SSadaf Ebrahimi // operand access index for list of registers sharing the same access right (for ARM) 107*9a0e4156SSadaf Ebrahimi uint8_t ac_idx; 108*9a0e4156SSadaf Ebrahimi uint8_t popcode_adjust; // Pseudo X86 instruction adjust 109*9a0e4156SSadaf Ebrahimi char assembly[8]; // for special instruction, so that we dont need printer 110*9a0e4156SSadaf Ebrahimi unsigned char evm_data[32]; // for EVM PUSH operand 111*9a0e4156SSadaf Ebrahimi }; 112*9a0e4156SSadaf Ebrahimi 113*9a0e4156SSadaf Ebrahimi void MCInst_Init(MCInst *inst); 114*9a0e4156SSadaf Ebrahimi 115*9a0e4156SSadaf Ebrahimi void MCInst_clear(MCInst *inst); 116*9a0e4156SSadaf Ebrahimi 117*9a0e4156SSadaf Ebrahimi // do not free operand after inserting 118*9a0e4156SSadaf Ebrahimi void MCInst_insert0(MCInst *inst, int index, MCOperand *Op); 119*9a0e4156SSadaf Ebrahimi 120*9a0e4156SSadaf Ebrahimi void MCInst_setOpcode(MCInst *inst, unsigned Op); 121*9a0e4156SSadaf Ebrahimi 122*9a0e4156SSadaf Ebrahimi unsigned MCInst_getOpcode(const MCInst*); 123*9a0e4156SSadaf Ebrahimi 124*9a0e4156SSadaf Ebrahimi void MCInst_setOpcodePub(MCInst *inst, unsigned Op); 125*9a0e4156SSadaf Ebrahimi 126*9a0e4156SSadaf Ebrahimi unsigned MCInst_getOpcodePub(const MCInst*); 127*9a0e4156SSadaf Ebrahimi 128*9a0e4156SSadaf Ebrahimi MCOperand *MCInst_getOperand(MCInst *inst, unsigned i); 129*9a0e4156SSadaf Ebrahimi 130*9a0e4156SSadaf Ebrahimi unsigned MCInst_getNumOperands(const MCInst *inst); 131*9a0e4156SSadaf Ebrahimi 132*9a0e4156SSadaf Ebrahimi // This addOperand2 function doesnt free Op 133*9a0e4156SSadaf Ebrahimi void MCInst_addOperand2(MCInst *inst, MCOperand *Op); 134*9a0e4156SSadaf Ebrahimi 135*9a0e4156SSadaf Ebrahimi #endif 136