xref: /aosp_15_r20/external/bazelbuild-platforms/cpu/BUILD (revision ef3a692c0746f7dadd4fb3b5728d17696f151f9c)
1*ef3a692cSMatthias Maennich# Standard cpu name constraint_setting and constraint_values
2*ef3a692cSMatthias Maennichlicenses(["notice"])
3*ef3a692cSMatthias Maennich
4*ef3a692cSMatthias Maennichpackage(
5*ef3a692cSMatthias Maennich    default_visibility = ["//visibility:public"],
6*ef3a692cSMatthias Maennich)
7*ef3a692cSMatthias Maennich
8*ef3a692cSMatthias Maennichfilegroup(
9*ef3a692cSMatthias Maennich    name = "srcs",
10*ef3a692cSMatthias Maennich    srcs = glob(["**"]),
11*ef3a692cSMatthias Maennich)
12*ef3a692cSMatthias Maennich
13*ef3a692cSMatthias Maennich# To add a new constraint_value see https://github.com/bazelbuild/platforms.
14*ef3a692cSMatthias Maennichconstraint_setting(name = "cpu")
15*ef3a692cSMatthias Maennich
16*ef3a692cSMatthias Maennich# New cpu values should refer to specific, highly available CPU implementations,
17*ef3a692cSMatthias Maennich# not broad architectures.  It should be possible to select the right compiler
18*ef3a692cSMatthias Maennich# options by just by knowing the cpu. This can be a difficult evaluation for
19*ef3a692cSMatthias Maennich# ARM variations, where there are many possibilities for customization within
20*ef3a692cSMatthias Maennich# an architecture.
21*ef3a692cSMatthias Maennich#
22*ef3a692cSMatthias Maennich# 1. No private names are be allowed. If you build your own custom ARM chips,
23*ef3a692cSMatthias Maennich#    then define them locally within your organization.
24*ef3a692cSMatthias Maennich# 2. All CPU values must be clear that they are for a 32 or a 64 bit
25*ef3a692cSMatthias Maennich#    implementation. For example, cortex-r52 is a 32 bit processor, and
26*ef3a692cSMatthias Maennich#    cortex-r82 is a 64 bit processor, but both are armv8-r architecture.
27*ef3a692cSMatthias Maennich#    We use the specific processor names because armv8-r is insufficient to
28*ef3a692cSMatthias Maennich#    select proper compiler options.
29*ef3a692cSMatthias Maennich#
30*ef3a692cSMatthias Maennich# Many of the name here are legacy values and probably violate these conditions.
31*ef3a692cSMatthias Maennich# We'll try to clean those up over time.
32*ef3a692cSMatthias Maennich
33*ef3a692cSMatthias Maennich# Special case: Architecture-independent outputs only
34*ef3a692cSMatthias Maennich#
35*ef3a692cSMatthias Maennich# Some builds are expected to only produce architecture-independent data files,
36*ef3a692cSMatthias Maennich# such as configuration files, database seed data, composited images, or even
37*ef3a692cSMatthias Maennich# some kinds of interpreted scripts (Shell, Python, Perl, etc).
38*ef3a692cSMatthias Maennich#
39*ef3a692cSMatthias Maennich# When such a build is being performed, this constraint value may be used to
40*ef3a692cSMatthias Maennich# ensure that architecture-dependent builds cannot be performed (except by way
41*ef3a692cSMatthias Maennich# of another transition).
42*ef3a692cSMatthias Maennich#
43*ef3a692cSMatthias Maennich# As a final example, consider building a package of NIC firmware images for
44*ef3a692cSMatthias Maennich# many different NIC models.  The package overall is architecture-independent,
45*ef3a692cSMatthias Maennich# and should be built with `//cpu:all`, then each individual image rule has a
46*ef3a692cSMatthias Maennich# transition to the suitable architecture for that specific NIC model.
47*ef3a692cSMatthias Maennichconstraint_value(
48*ef3a692cSMatthias Maennich    name = "all",
49*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
50*ef3a692cSMatthias Maennich)
51*ef3a692cSMatthias Maennich
52*ef3a692cSMatthias Maennichconstraint_value(
53*ef3a692cSMatthias Maennich    name = "aarch32",
54*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
55*ef3a692cSMatthias Maennich)
56*ef3a692cSMatthias Maennich
57*ef3a692cSMatthias Maennichconstraint_value(
58*ef3a692cSMatthias Maennich    name = "aarch64",
59*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
60*ef3a692cSMatthias Maennich)
61*ef3a692cSMatthias Maennich
62*ef3a692cSMatthias Maennichalias(
63*ef3a692cSMatthias Maennich    name = "arm",
64*ef3a692cSMatthias Maennich    actual = ":aarch32",
65*ef3a692cSMatthias Maennich)
66*ef3a692cSMatthias Maennich
67*ef3a692cSMatthias Maennich# Cortex-M0, Cortex-M0+, Cortex-M1
68*ef3a692cSMatthias Maennichconstraint_value(
69*ef3a692cSMatthias Maennich    name = "armv6-m",  # Commonly known as thumbv6
70*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
71*ef3a692cSMatthias Maennich)
72*ef3a692cSMatthias Maennich
73*ef3a692cSMatthias Maennich# Cortex-M3
74*ef3a692cSMatthias Maennichconstraint_value(
75*ef3a692cSMatthias Maennich    name = "armv7-m",
76*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
77*ef3a692cSMatthias Maennich)
78*ef3a692cSMatthias Maennich
79*ef3a692cSMatthias Maennich# Cortex-M4, Cortex-M7
80*ef3a692cSMatthias Maennichconstraint_value(
81*ef3a692cSMatthias Maennich    name = "armv7e-m",
82*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
83*ef3a692cSMatthias Maennich)
84*ef3a692cSMatthias Maennich
85*ef3a692cSMatthias Maennich# Cortex-M4, Cortex-M7 with fpu
86*ef3a692cSMatthias Maennichconstraint_value(
87*ef3a692cSMatthias Maennich    name = "armv7e-mf",  # armv7e-m with fpu
88*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
89*ef3a692cSMatthias Maennich)
90*ef3a692cSMatthias Maennich
91*ef3a692cSMatthias Maennich# Cortex-M23, Cortex-M33, Cortex-M35P
92*ef3a692cSMatthias Maennichconstraint_value(
93*ef3a692cSMatthias Maennich    name = "armv8-m",
94*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
95*ef3a692cSMatthias Maennich)
96*ef3a692cSMatthias Maennich
97*ef3a692cSMatthias Maennichalias(
98*ef3a692cSMatthias Maennich    name = "arm64",
99*ef3a692cSMatthias Maennich    actual = ":aarch64",
100*ef3a692cSMatthias Maennich)
101*ef3a692cSMatthias Maennich
102*ef3a692cSMatthias Maennichconstraint_value(
103*ef3a692cSMatthias Maennich    name = "arm64_32",
104*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
105*ef3a692cSMatthias Maennich)
106*ef3a692cSMatthias Maennich
107*ef3a692cSMatthias Maennichconstraint_value(
108*ef3a692cSMatthias Maennich    name = "arm64e",
109*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
110*ef3a692cSMatthias Maennich)
111*ef3a692cSMatthias Maennich
112*ef3a692cSMatthias Maennichconstraint_value(
113*ef3a692cSMatthias Maennich    name = "armv7",
114*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
115*ef3a692cSMatthias Maennich)
116*ef3a692cSMatthias Maennich
117*ef3a692cSMatthias Maennichconstraint_value(
118*ef3a692cSMatthias Maennich    name = "armv7k",
119*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
120*ef3a692cSMatthias Maennich)
121*ef3a692cSMatthias Maennich
122*ef3a692cSMatthias Maennichconstraint_value(
123*ef3a692cSMatthias Maennich    name = "cortex-r52",
124*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
125*ef3a692cSMatthias Maennich)
126*ef3a692cSMatthias Maennich
127*ef3a692cSMatthias Maennichconstraint_value(
128*ef3a692cSMatthias Maennich    name = "cortex-r82",
129*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
130*ef3a692cSMatthias Maennich)
131*ef3a692cSMatthias Maennich
132*ef3a692cSMatthias Maennichconstraint_value(
133*ef3a692cSMatthias Maennich    name = "i386",
134*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
135*ef3a692cSMatthias Maennich)
136*ef3a692cSMatthias Maennich
137*ef3a692cSMatthias Maennichconstraint_value(
138*ef3a692cSMatthias Maennich    name = "ppc",
139*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
140*ef3a692cSMatthias Maennich)
141*ef3a692cSMatthias Maennich
142*ef3a692cSMatthias Maennichconstraint_value(
143*ef3a692cSMatthias Maennich    name = "ppc32",
144*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
145*ef3a692cSMatthias Maennich)
146*ef3a692cSMatthias Maennich
147*ef3a692cSMatthias Maennichconstraint_value(
148*ef3a692cSMatthias Maennich    name = "ppc64le",
149*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
150*ef3a692cSMatthias Maennich)
151*ef3a692cSMatthias Maennich
152*ef3a692cSMatthias Maennichconstraint_value(
153*ef3a692cSMatthias Maennich    name = "s390x",
154*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
155*ef3a692cSMatthias Maennich)
156*ef3a692cSMatthias Maennich
157*ef3a692cSMatthias Maennichconstraint_value(
158*ef3a692cSMatthias Maennich    name = "x86_32",
159*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
160*ef3a692cSMatthias Maennich)
161*ef3a692cSMatthias Maennich
162*ef3a692cSMatthias Maennichconstraint_value(
163*ef3a692cSMatthias Maennich    name = "x86_64",
164*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
165*ef3a692cSMatthias Maennich)
166*ef3a692cSMatthias Maennich
167*ef3a692cSMatthias Maennichconstraint_value(
168*ef3a692cSMatthias Maennich    name = "wasm32",
169*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
170*ef3a692cSMatthias Maennich)
171*ef3a692cSMatthias Maennich
172*ef3a692cSMatthias Maennichconstraint_value(
173*ef3a692cSMatthias Maennich    name = "wasm64",
174*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
175*ef3a692cSMatthias Maennich)
176*ef3a692cSMatthias Maennich
177*ef3a692cSMatthias Maennichconstraint_value(
178*ef3a692cSMatthias Maennich    name = "mips64",
179*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
180*ef3a692cSMatthias Maennich)
181*ef3a692cSMatthias Maennich
182*ef3a692cSMatthias Maennichconstraint_value(
183*ef3a692cSMatthias Maennich    name = "riscv32",
184*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
185*ef3a692cSMatthias Maennich)
186*ef3a692cSMatthias Maennich
187*ef3a692cSMatthias Maennichconstraint_value(
188*ef3a692cSMatthias Maennich    name = "riscv64",
189*ef3a692cSMatthias Maennich    constraint_setting = ":cpu",
190*ef3a692cSMatthias Maennich)
191