1 //
2 // Copyright © 2021, 2023 Arm Ltd and Contributors. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5
6 #include "ReduceTestHelper.hpp"
7
8 #include <armnn_delegate.hpp>
9
10 #include <flatbuffers/flatbuffers.h>
11 #include <schema_generated.h>
12
13 #include <doctest/doctest.h>
14
15 namespace armnnDelegate
16 {
17
ReduceUint8KeepDimsTest(tflite::BuiltinOperator reduceOperatorCode,std::vector<armnn::BackendId> & backends,std::vector<uint8_t> & expectedOutputValues)18 void ReduceUint8KeepDimsTest(tflite::BuiltinOperator reduceOperatorCode,
19 std::vector<armnn::BackendId>& backends,
20 std::vector<uint8_t>& expectedOutputValues)
21 {
22 std::vector<int32_t> input0Shape { 1, 1, 2, 3 };
23 std::vector<int32_t> input1Shape { 1 };
24 std::vector<int32_t> expectedOutputShape { 1, 1, 1, 3 };
25
26 std::vector<uint8_t> input0Values { 1, 2, 3,
27 4, 3, 1 }; // Inputs
28 std::vector<int32_t> input1Values { 2 }; // Axis
29
30 ReduceTest<uint8_t>(reduceOperatorCode,
31 ::tflite::TensorType_UINT8,
32 backends,
33 input0Shape,
34 input1Shape,
35 expectedOutputShape,
36 input0Values,
37 input1Values,
38 expectedOutputValues,
39 true);
40 }
41
ReduceUint8Test(tflite::BuiltinOperator reduceOperatorCode,std::vector<armnn::BackendId> & backends,std::vector<uint8_t> & expectedOutputValues)42 void ReduceUint8Test(tflite::BuiltinOperator reduceOperatorCode,
43 std::vector<armnn::BackendId>& backends,
44 std::vector<uint8_t>& expectedOutputValues)
45 {
46 std::vector<int32_t> input0Shape { 1, 1, 2, 3 };
47 std::vector<int32_t> input1Shape { 1 };
48 std::vector<int32_t> expectedOutputShape { 1, 1, 3 };
49
50 std::vector<uint8_t> input0Values { 1, 2, 3,
51 4, 3, 1 }; // Inputs
52 std::vector<int32_t> input1Values { 2 }; // Axis
53
54 ReduceTest<uint8_t>(reduceOperatorCode,
55 ::tflite::TensorType_UINT8,
56 backends,
57 input0Shape,
58 input1Shape,
59 expectedOutputShape,
60 input0Values,
61 input1Values,
62 expectedOutputValues,
63 false);
64 }
65
ReduceFp32KeepDimsTest(tflite::BuiltinOperator reduceOperatorCode,std::vector<armnn::BackendId> & backends,std::vector<float> & expectedOutputValues)66 void ReduceFp32KeepDimsTest(tflite::BuiltinOperator reduceOperatorCode,
67 std::vector<armnn::BackendId>& backends,
68 std::vector<float>& expectedOutputValues)
69 {
70 std::vector<int32_t> input0Shape { 1, 1, 2, 3 };
71 std::vector<int32_t> input1Shape { 1 };
72 std::vector<int32_t> expectedOutputShape { 1, 1, 1, 3 };
73
74 std::vector<float> input0Values { 1001.0f, 11.0f, 1003.0f,
75 10.0f, 1002.0f, 12.0f }; // Inputs
76 std::vector<int32_t> input1Values { 2 }; // Axis
77
78 ReduceTest<float>(reduceOperatorCode,
79 ::tflite::TensorType_FLOAT32,
80 backends,
81 input0Shape,
82 input1Shape,
83 expectedOutputShape,
84 input0Values,
85 input1Values,
86 expectedOutputValues,
87 true);
88 }
89
ReduceFp32Test(tflite::BuiltinOperator reduceOperatorCode,std::vector<armnn::BackendId> & backends,std::vector<float> & expectedOutputValues)90 void ReduceFp32Test(tflite::BuiltinOperator reduceOperatorCode,
91 std::vector<armnn::BackendId>& backends,
92 std::vector<float>& expectedOutputValues)
93 {
94 std::vector<int32_t> input0Shape { 1, 1, 2, 3 };
95 std::vector<int32_t> input1Shape { 1 };
96 std::vector<int32_t> expectedOutputShape { 1, 1, 3 };
97
98 std::vector<float> input0Values { 1001.0f, 11.0f, 1003.0f,
99 10.0f, 1002.0f, 12.0f }; // Inputs
100 std::vector<int32_t> input1Values { 2 }; // Axis
101
102 ReduceTest<float>(reduceOperatorCode,
103 ::tflite::TensorType_FLOAT32,
104 backends,
105 input0Shape,
106 input1Shape,
107 expectedOutputShape,
108 input0Values,
109 input1Values,
110 expectedOutputValues,
111 false);
112 }
113
114 // REDUCE_MAX Tests
115 TEST_SUITE("ReduceMax_CpuRefTests")
116 {
117
118 TEST_CASE ("ReduceMax_Uint8_KeepDims_CpuRef_Test")
119 {
120 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
121 std::vector<uint8_t> expectedOutputValues { 4, 3, 3 };
122 ReduceUint8KeepDimsTest(tflite::BuiltinOperator_REDUCE_MAX,
123 backends,
124 expectedOutputValues);
125 }
126
127 TEST_CASE ("ReduceMax_Uint8_CpuRef_Test")
128 {
129 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
130 std::vector<uint8_t> expectedOutputValues { 4, 3, 3 };
131 ReduceUint8Test(tflite::BuiltinOperator_REDUCE_MAX,
132 backends,
133 expectedOutputValues);
134 }
135
136 TEST_CASE ("ReduceMax_Fp32_KeepDims_CpuRef_Test")
137 {
138 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
139 std::vector<float> expectedOutputValues { 1001.0f, 1002.0f, 1003.0f };
140 ReduceFp32KeepDimsTest(tflite::BuiltinOperator_REDUCE_MAX,
141 backends,
142 expectedOutputValues);
143 }
144
145 TEST_CASE ("ReduceMax_Fp32_CpuRef_Test")
146 {
147 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
148 std::vector<float> expectedOutputValues { 1001.0f, 1002.0f, 1003.0f };
149 ReduceFp32Test(tflite::BuiltinOperator_REDUCE_MAX,
150 backends,
151 expectedOutputValues);
152 }
153
154 } // End of ReduceMax_CpuRefTests
155
156 TEST_SUITE("ReduceMax_CpuAccTests")
157 {
158
159 TEST_CASE ("ReduceMax_Uint8_KeepDims_CpuAcc_Test")
160 {
161 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
162 std::vector<uint8_t> expectedOutputValues { 4, 3, 3 };
163 ReduceUint8KeepDimsTest(tflite::BuiltinOperator_REDUCE_MAX,
164 backends,
165 expectedOutputValues);
166 }
167
168 TEST_CASE ("ReduceMax_Uint8_CpuAcc_Test")
169 {
170 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
171 std::vector<uint8_t> expectedOutputValues { 4, 3, 3 };
172 ReduceUint8Test(tflite::BuiltinOperator_REDUCE_MAX,
173 backends,
174 expectedOutputValues);
175 }
176
177
178 TEST_CASE ("ReduceMax_Fp32_KeepDims_CpuAcc_Test")
179 {
180 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
181 std::vector<float> expectedOutputValues { 1001.0f, 1002.0f, 1003.0f };
182 ReduceFp32KeepDimsTest(tflite::BuiltinOperator_REDUCE_MAX,
183 backends,
184 expectedOutputValues);
185 }
186
187 TEST_CASE ("ReduceMax_Fp32_CpuAcc_Test")
188 {
189 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
190 std::vector<float> expectedOutputValues { 1001.0f, 1002.0f, 1003.0f };
191 ReduceFp32Test(tflite::BuiltinOperator_REDUCE_MAX,
192 backends,
193 expectedOutputValues);
194 }
195
196 } // End of ReduceMax_CpuAccTests
197
198 TEST_SUITE("ReduceMax_GpuAccTests")
199 {
200
201 TEST_CASE ("ReduceMax_Uint8_KeepDims_GpuAcc_Test")
202 {
203 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
204 std::vector<uint8_t> expectedOutputValues { 4, 3, 3 };
205 ReduceUint8KeepDimsTest(tflite::BuiltinOperator_REDUCE_MAX,
206 backends,
207 expectedOutputValues);
208 }
209
210 TEST_CASE ("ReduceMax_Uint8_GpuAcc_Test")
211 {
212 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
213 std::vector<uint8_t> expectedOutputValues { 4, 3, 3 };
214 ReduceUint8Test(tflite::BuiltinOperator_REDUCE_MAX,
215 backends,
216 expectedOutputValues);
217 }
218
219
220 TEST_CASE ("ReduceMax_Fp32_KeepDims_GpuAcc_Test")
221 {
222 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
223 std::vector<float> expectedOutputValues { 1001.0f, 1002.0f, 1003.0f };
224 ReduceFp32KeepDimsTest(tflite::BuiltinOperator_REDUCE_MAX,
225 backends,
226 expectedOutputValues);
227 }
228
229 TEST_CASE ("ReduceMax_Fp32_GpuAcc_Test")
230 {
231 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
232 std::vector<float> expectedOutputValues { 1001.0f, 1002.0f, 1003.0f };
233 ReduceFp32Test(tflite::BuiltinOperator_REDUCE_MAX,
234 backends,
235 expectedOutputValues);
236 }
237
238 } // End of ReduceMax_GpuAccTests
239
240 // REDUCE_MIN Tests
241 TEST_SUITE("ReduceMin_CpuRefTests")
242 {
243
244 TEST_CASE ("ReduceMin_Fp32_CpuRef_Test")
245 {
246 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
247 std::vector<float> expectedOutputValues { 10.0f, 11.0f, 12.0f };
248 ReduceFp32Test(tflite::BuiltinOperator_REDUCE_MIN,
249 backends,
250 expectedOutputValues);
251 }
252
253 } // End of ReduceMin_CpuRefTests
254
255 TEST_SUITE("ReduceMin_CpuAccTests")
256 {
257
258 TEST_CASE ("ReduceMin_Fp32_CpuAcc_Test")
259 {
260 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
261 std::vector<float> expectedOutputValues { 10.0f, 11.0f, 12.0f };
262 ReduceFp32Test(tflite::BuiltinOperator_REDUCE_MIN,
263 backends,
264 expectedOutputValues);
265 }
266
267 } // End of ReduceMin_CpuAccTests
268
269 TEST_SUITE("ReduceMin_GpuAccTests")
270 {
271
272 TEST_CASE ("ReduceMin_Fp32_GpuAcc_Test")
273 {
274 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
275 std::vector<float> expectedOutputValues { 10.0f, 11.0f, 12.0f };
276 ReduceFp32Test(tflite::BuiltinOperator_REDUCE_MIN,
277 backends,
278 expectedOutputValues);
279 }
280
281 } // End of ReduceMin_GpuAccTests
282
283 // SUM Tests
284 TEST_SUITE("Sum_CpuRefTests")
285 {
286
287 TEST_CASE ("Sum_Uint8_KeepDims_CpuRef_Test")
288 {
289 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
290 std::vector<uint8_t> expectedOutputValues { 5, 5, 4 };
291 ReduceUint8KeepDimsTest(tflite::BuiltinOperator_SUM,
292 backends,
293 expectedOutputValues);
294 }
295
296 TEST_CASE ("Sum_Fp32_CpuRef_Test")
297 {
298 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
299 std::vector<float> expectedOutputValues { 1011.0f, 1013.0f, 1015.0f };
300 ReduceFp32Test(tflite::BuiltinOperator_SUM,
301 backends,
302 expectedOutputValues);
303 }
304
305 } // End of Sum_CpuRefTests
306
307 TEST_SUITE("Sum_CpuAccTests")
308 {
309
310 TEST_CASE ("Sum_Uint8_KeepDims_CpuAcc_Test")
311 {
312 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
313 std::vector<uint8_t> expectedOutputValues { 5, 5, 4 };
314 ReduceUint8KeepDimsTest(tflite::BuiltinOperator_SUM,
315 backends,
316 expectedOutputValues);
317 }
318
319 TEST_CASE ("Sum_Fp32_CpuAcc_Test")
320 {
321 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
322 std::vector<float> expectedOutputValues { 1011.0f, 1013.0f, 1015.0f };
323 ReduceFp32Test(tflite::BuiltinOperator_SUM,
324 backends,
325 expectedOutputValues);
326 }
327
328 } // End of Sum_CpuAccTests
329
330 TEST_SUITE("Sum_GpuAccTests")
331 {
332
333 TEST_CASE ("Sum_Uint8_KeepDims_GpuAcc_Test")
334 {
335 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
336 std::vector<uint8_t> expectedOutputValues { 5, 5, 4 };
337 ReduceUint8KeepDimsTest(tflite::BuiltinOperator_SUM,
338 backends,
339 expectedOutputValues);
340 }
341
342 TEST_CASE ("Sum_Fp32_GpuAcc_Test")
343 {
344 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
345 std::vector<float> expectedOutputValues { 1011.0f, 1013.0f, 1015.0f };
346 ReduceFp32Test(tflite::BuiltinOperator_SUM,
347 backends,
348 expectedOutputValues);
349 }
350
351 } // End of Sum_GpuAccTests
352
353 // PROD Tests
354 TEST_SUITE("Prod_CpuRefTests")
355 {
356
357 TEST_CASE ("Prod_Uint8_KeepDims_CpuRef_Test")
358 {
359 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
360 std::vector<uint8_t> expectedOutputValues { 4, 6, 3 };
361 ReduceUint8KeepDimsTest(tflite::BuiltinOperator_REDUCE_PROD,
362 backends,
363 expectedOutputValues);
364 }
365
366 TEST_CASE ("Prod_Fp32_CpuRef_Test")
367 {
368 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
369 std::vector<float> expectedOutputValues { 10010.0f, 11022.0f, 12036.0f };
370 ReduceFp32Test(tflite::BuiltinOperator_REDUCE_PROD,
371 backends,
372 expectedOutputValues);
373 }
374
375 } // End of Prod_CpuRefTests
376
377 TEST_SUITE("Prod_CpuAccTests")
378 {
379
380 TEST_CASE ("Prod_Uint8_KeepDims_CpuAcc_Test" )
381 {
382 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
383 std::vector<uint8_t> expectedOutputValues { 4, 6, 3 };
384 ReduceUint8KeepDimsTest(tflite::BuiltinOperator_REDUCE_PROD,
385 backends,
386 expectedOutputValues);
387 }
388
389 TEST_CASE ("Prod_Fp32_CpuAcc_Test")
390 {
391 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
392 std::vector<float> expectedOutputValues { 10010.0f, 11022.0f, 12036.0f };
393 ReduceFp32Test(tflite::BuiltinOperator_REDUCE_PROD,
394 backends,
395 expectedOutputValues);
396 }
397
398 } // End of Prod_CpuAccTests
399
400 TEST_SUITE("Prod_GpuAccTests")
401 {
402
403 TEST_CASE ("Prod_Uint8_KeepDims_GpuAcc_Test")
404 {
405 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
406 std::vector<uint8_t> expectedOutputValues { 4, 6, 3 };
407 ReduceUint8KeepDimsTest(tflite::BuiltinOperator_REDUCE_PROD,
408 backends,
409 expectedOutputValues);
410 }
411
412 TEST_CASE ("Prod_Fp32_GpuAcc_Test")
413 {
414 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
415 std::vector<float> expectedOutputValues { 10010.0f, 11022.0f, 12036.0f };
416 ReduceFp32Test(tflite::BuiltinOperator_REDUCE_PROD,
417 backends,
418 expectedOutputValues);
419 }
420
421 } // End of Prod_GpuAccTests
422
423 } // namespace armnnDelegate