1 //
2 // Copyright © 2021, 2023 Arm Ltd and Contributors. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5
6 #include "ArgMinMaxTestHelper.hpp"
7
8 #include <armnn_delegate.hpp>
9
10 #include <flatbuffers/flatbuffers.h>
11 #include <schema_generated.h>
12
13 #include <doctest/doctest.h>
14
15 namespace armnnDelegate
16 {
17
ArgMaxFP32Test(std::vector<armnn::BackendId> & backends,int axisValue)18 void ArgMaxFP32Test(std::vector<armnn::BackendId>& backends, int axisValue)
19 {
20 // Set input data
21 std::vector<int32_t> inputShape { 1, 3, 2, 4 };
22 std::vector<int32_t> outputShape { 1, 3, 4 };
23 std::vector<int32_t> axisShape { 1 };
24
25 std::vector<float> inputValues = { 1.0f, 2.0f, 3.0f, 4.0f,
26 5.0f, 6.0f, 7.0f, 8.0f,
27
28 10.0f, 20.0f, 30.0f, 40.0f,
29 50.0f, 60.0f, 70.0f, 80.0f,
30
31 100.0f, 200.0f, 300.0f, 400.0f,
32 500.0f, 600.0f, 700.0f, 800.0f };
33
34 std::vector<int32_t> expectedOutputValues = { 1, 1, 1, 1,
35 1, 1, 1, 1,
36 1, 1, 1, 1 };
37
38 ArgMinMaxTest<float, int32_t>(tflite::BuiltinOperator_ARG_MAX,
39 ::tflite::TensorType_FLOAT32,
40 backends,
41 inputShape,
42 axisShape,
43 outputShape,
44 inputValues,
45 expectedOutputValues,
46 axisValue,
47 ::tflite::TensorType_INT32);
48 }
49
ArgMinFP32Test(std::vector<armnn::BackendId> & backends,int axisValue)50 void ArgMinFP32Test(std::vector<armnn::BackendId>& backends, int axisValue)
51 {
52 // Set input data
53 std::vector<int32_t> inputShape { 1, 3, 2, 4 };
54 std::vector<int32_t> outputShape { 1, 3, 2 };
55 std::vector<int32_t> axisShape { 1 };
56
57 std::vector<float> inputValues = { 1.0f, 2.0f, 3.0f, 4.0f,
58 5.0f, 6.0f, 7.0f, 8.0f,
59
60 10.0f, 20.0f, 30.0f, 40.0f,
61 50.0f, 60.0f, 70.0f, 80.0f,
62
63 100.0f, 200.0f, 300.0f, 400.0f,
64 500.0f, 600.0f, 700.0f, 800.0f };
65
66 std::vector<int32_t> expectedOutputValues = { 0, 0,
67 0, 0,
68 0, 0 };
69
70 ArgMinMaxTest<float, int32_t>(tflite::BuiltinOperator_ARG_MIN,
71 ::tflite::TensorType_FLOAT32,
72 backends,
73 inputShape,
74 axisShape,
75 outputShape,
76 inputValues,
77 expectedOutputValues,
78 axisValue,
79 ::tflite::TensorType_INT32);
80 }
81
ArgMaxUint8Test(std::vector<armnn::BackendId> & backends,int axisValue)82 void ArgMaxUint8Test(std::vector<armnn::BackendId>& backends, int axisValue)
83 {
84 // Set input data
85 std::vector<int32_t> inputShape { 1, 1, 1, 5 };
86 std::vector<int32_t> outputShape { 1, 1, 1 };
87 std::vector<int32_t> axisShape { 1 };
88
89 std::vector<uint8_t> inputValues = { 5, 2, 8, 10, 9 };
90
91 std::vector<int32_t> expectedOutputValues = { 3 };
92
93 ArgMinMaxTest<uint8_t, int32_t>(tflite::BuiltinOperator_ARG_MAX,
94 ::tflite::TensorType_UINT8,
95 backends,
96 inputShape,
97 axisShape,
98 outputShape,
99 inputValues,
100 expectedOutputValues,
101 axisValue,
102 ::tflite::TensorType_INT32);
103 }
104
105 TEST_SUITE("ArgMinMax_CpuRefTests")
106 {
107
108 TEST_CASE ("ArgMaxFP32Test_CpuRef_Test")
109 {
110 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
111 ArgMaxFP32Test(backends, 2);
112 }
113
114 TEST_CASE ("ArgMinFP32Test_CpuRef_Test")
115 {
116 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
117 ArgMinFP32Test(backends, 3);
118 }
119
120 TEST_CASE ("ArgMaxUint8Test_CpuRef_Test")
121 {
122 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
123 ArgMaxUint8Test(backends, -1);
124 }
125
126 } // TEST_SUITE("ArgMinMax_CpuRefTests")
127
128 TEST_SUITE("ArgMinMax_CpuAccTests")
129 {
130
131 TEST_CASE ("ArgMaxFP32Test_CpuAcc_Test")
132 {
133 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
134 ArgMaxFP32Test(backends, 2);
135 }
136
137 TEST_CASE ("ArgMinFP32Test_CpuAcc_Test")
138 {
139 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
140 ArgMinFP32Test(backends, 3);
141 }
142
143 TEST_CASE ("ArgMaxUint8Test_CpuAcc_Test")
144 {
145 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
146 ArgMaxUint8Test(backends, -1);
147 }
148
149 } // TEST_SUITE("ArgMinMax_CpuAccTests")
150
151 TEST_SUITE("ArgMinMax_GpuAccTests")
152 {
153
154 TEST_CASE ("ArgMaxFP32Test_GpuAcc_Test")
155 {
156 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
157 ArgMaxFP32Test(backends, 2);
158 }
159
160 TEST_CASE ("ArgMinFP32Test_GpuAcc_Test")
161 {
162 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
163 ArgMinFP32Test(backends, 3);
164 }
165
166 TEST_CASE ("ArgMaxUint8Test_GpuAcc_Test")
167 {
168 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
169 ArgMaxUint8Test(backends, -1);
170 }
171
172 } // TEST_SUITE("ArgMinMax_GpuAccTests")
173
174 } // namespace armnnDelegate