1*54fd6939SJiyong Park /* 2*54fd6939SJiyong Park * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park #ifndef TLKD_PRIVATE_H 8*54fd6939SJiyong Park #define TLKD_PRIVATE_H 9*54fd6939SJiyong Park 10*54fd6939SJiyong Park #include <platform_def.h> 11*54fd6939SJiyong Park 12*54fd6939SJiyong Park #include <arch.h> 13*54fd6939SJiyong Park #include <bl31/interrupt_mgmt.h> 14*54fd6939SJiyong Park #include <context.h> 15*54fd6939SJiyong Park #include <lib/psci/psci.h> 16*54fd6939SJiyong Park 17*54fd6939SJiyong Park /* 18*54fd6939SJiyong Park * This flag is used by the TLKD to determine if the SP is servicing a yielding 19*54fd6939SJiyong Park * SMC request prior to programming the next entry into the SP e.g. if SP 20*54fd6939SJiyong Park * execution is preempted by a non-secure interrupt and handed control to the 21*54fd6939SJiyong Park * normal world. If another request which is distinct from what the SP was 22*54fd6939SJiyong Park * previously doing arrives, then this flag will be help the TLKD to either 23*54fd6939SJiyong Park * reject the new request or service it while ensuring that the previous context 24*54fd6939SJiyong Park * is not corrupted. 25*54fd6939SJiyong Park */ 26*54fd6939SJiyong Park #define YIELD_SMC_ACTIVE_FLAG_SHIFT 2 27*54fd6939SJiyong Park #define YIELD_SMC_ACTIVE_FLAG_MASK 1 28*54fd6939SJiyong Park #define get_yield_smc_active_flag(state) \ 29*54fd6939SJiyong Park (((state) >> YIELD_SMC_ACTIVE_FLAG_SHIFT) \ 30*54fd6939SJiyong Park & YIELD_SMC_ACTIVE_FLAG_MASK) 31*54fd6939SJiyong Park #define set_yield_smc_active_flag(state) ((state) |= \ 32*54fd6939SJiyong Park (1 << YIELD_SMC_ACTIVE_FLAG_SHIFT)) 33*54fd6939SJiyong Park #define clr_yield_smc_active_flag(state) ((state) &= \ 34*54fd6939SJiyong Park ~(YIELD_SMC_ACTIVE_FLAG_MASK \ 35*54fd6939SJiyong Park << YIELD_SMC_ACTIVE_FLAG_SHIFT)) 36*54fd6939SJiyong Park 37*54fd6939SJiyong Park /******************************************************************************* 38*54fd6939SJiyong Park * Translate virtual address received from the NS world 39*54fd6939SJiyong Park ******************************************************************************/ 40*54fd6939SJiyong Park #define TLK_TRANSLATE_NS_VADDR 4 41*54fd6939SJiyong Park 42*54fd6939SJiyong Park /******************************************************************************* 43*54fd6939SJiyong Park * Secure Payload execution state information i.e. aarch32 or aarch64 44*54fd6939SJiyong Park ******************************************************************************/ 45*54fd6939SJiyong Park #define SP_AARCH32 MODE_RW_32 46*54fd6939SJiyong Park #define SP_AARCH64 MODE_RW_64 47*54fd6939SJiyong Park 48*54fd6939SJiyong Park /******************************************************************************* 49*54fd6939SJiyong Park * Number of cpus that the present on this platform. TODO: Rely on a topology 50*54fd6939SJiyong Park * tree to determine this in the future to avoid assumptions about mpidr 51*54fd6939SJiyong Park * allocation 52*54fd6939SJiyong Park ******************************************************************************/ 53*54fd6939SJiyong Park #define TLKD_CORE_COUNT PLATFORM_CORE_COUNT 54*54fd6939SJiyong Park 55*54fd6939SJiyong Park /******************************************************************************* 56*54fd6939SJiyong Park * Constants that allow assembler code to preserve callee-saved registers of the 57*54fd6939SJiyong Park * C runtime context while performing a security state switch. 58*54fd6939SJiyong Park ******************************************************************************/ 59*54fd6939SJiyong Park #define TLKD_C_RT_CTX_X19 0x0 60*54fd6939SJiyong Park #define TLKD_C_RT_CTX_X20 0x8 61*54fd6939SJiyong Park #define TLKD_C_RT_CTX_X21 0x10 62*54fd6939SJiyong Park #define TLKD_C_RT_CTX_X22 0x18 63*54fd6939SJiyong Park #define TLKD_C_RT_CTX_X23 0x20 64*54fd6939SJiyong Park #define TLKD_C_RT_CTX_X24 0x28 65*54fd6939SJiyong Park #define TLKD_C_RT_CTX_X25 0x30 66*54fd6939SJiyong Park #define TLKD_C_RT_CTX_X26 0x38 67*54fd6939SJiyong Park #define TLKD_C_RT_CTX_X27 0x40 68*54fd6939SJiyong Park #define TLKD_C_RT_CTX_X28 0x48 69*54fd6939SJiyong Park #define TLKD_C_RT_CTX_X29 0x50 70*54fd6939SJiyong Park #define TLKD_C_RT_CTX_X30 0x58 71*54fd6939SJiyong Park #define TLKD_C_RT_CTX_SIZE 0x60 72*54fd6939SJiyong Park #define TLKD_C_RT_CTX_ENTRIES (TLKD_C_RT_CTX_SIZE >> DWORD_SHIFT) 73*54fd6939SJiyong Park 74*54fd6939SJiyong Park #ifndef __ASSEMBLER__ 75*54fd6939SJiyong Park 76*54fd6939SJiyong Park #include <stdint.h> 77*54fd6939SJiyong Park 78*54fd6939SJiyong Park #include <lib/cassert.h> 79*54fd6939SJiyong Park 80*54fd6939SJiyong Park /* AArch64 callee saved general purpose register context structure. */ 81*54fd6939SJiyong Park DEFINE_REG_STRUCT(c_rt_regs, TLKD_C_RT_CTX_ENTRIES); 82*54fd6939SJiyong Park 83*54fd6939SJiyong Park /* 84*54fd6939SJiyong Park * Compile time assertion to ensure that both the compiler and linker 85*54fd6939SJiyong Park * have the same double word aligned view of the size of the C runtime 86*54fd6939SJiyong Park * register context. 87*54fd6939SJiyong Park */ 88*54fd6939SJiyong Park CASSERT(TLKD_C_RT_CTX_SIZE == sizeof(c_rt_regs_t), \ 89*54fd6939SJiyong Park assert_tlkd_c_rt_regs_size_mismatch); 90*54fd6939SJiyong Park 91*54fd6939SJiyong Park /******************************************************************************* 92*54fd6939SJiyong Park * Structure which helps the SPD to maintain the per-cpu state of the SP. 93*54fd6939SJiyong Park * 'state' - collection of flags to track SP state e.g. on/off 94*54fd6939SJiyong Park * 'mpidr' - mpidr to associate a context with a cpu 95*54fd6939SJiyong Park * 'c_rt_ctx' - stack address to restore C runtime context from after 96*54fd6939SJiyong Park * returning from a synchronous entry into the SP. 97*54fd6939SJiyong Park * 'cpu_ctx' - space to maintain SP architectural state 98*54fd6939SJiyong Park * 'saved_tsp_args' - space to store arguments for TSP arithmetic operations 99*54fd6939SJiyong Park * which will queried using the TSP_GET_ARGS SMC by TSP. 100*54fd6939SJiyong Park ******************************************************************************/ 101*54fd6939SJiyong Park typedef struct tlk_context { 102*54fd6939SJiyong Park uint32_t state; 103*54fd6939SJiyong Park uint64_t mpidr; 104*54fd6939SJiyong Park uint64_t c_rt_ctx; 105*54fd6939SJiyong Park cpu_context_t cpu_ctx; 106*54fd6939SJiyong Park } tlk_context_t; 107*54fd6939SJiyong Park 108*54fd6939SJiyong Park /******************************************************************************* 109*54fd6939SJiyong Park * Function & Data prototypes 110*54fd6939SJiyong Park ******************************************************************************/ 111*54fd6939SJiyong Park uint64_t tlkd_va_translate(uintptr_t va, int type); 112*54fd6939SJiyong Park uint64_t tlkd_enter_sp(uint64_t *c_rt_ctx); 113*54fd6939SJiyong Park void __dead2 tlkd_exit_sp(uint64_t c_rt_ctx, uint64_t ret); 114*54fd6939SJiyong Park uint64_t tlkd_synchronous_sp_entry(tlk_context_t *tlk_ctx); 115*54fd6939SJiyong Park void __dead2 tlkd_synchronous_sp_exit(tlk_context_t *tlk_ctx, 116*54fd6939SJiyong Park uint64_t ret); 117*54fd6939SJiyong Park void tlkd_init_tlk_ep_state(struct entry_point_info *tlk_entry_point, 118*54fd6939SJiyong Park uint32_t rw, 119*54fd6939SJiyong Park uint64_t pc, 120*54fd6939SJiyong Park tlk_context_t *tlk_ctx); 121*54fd6939SJiyong Park 122*54fd6939SJiyong Park #endif /*__ASSEMBLER__*/ 123*54fd6939SJiyong Park 124*54fd6939SJiyong Park #endif /* TLKD_PRIVATE_H */ 125