1*54fd6939SJiyong Park# Copyright (c) 2018-2021, ARM Limited and Contributors. All rights reserved. 2*54fd6939SJiyong Park# 3*54fd6939SJiyong Park# SPDX-License-Identifier: BSD-3-Clause 4*54fd6939SJiyong Park 5*54fd6939SJiyong Parkoverride PROGRAMMABLE_RESET_ADDRESS := 1 6*54fd6939SJiyong ParkPSCI_EXTENDED_STATE_ID := 1 7*54fd6939SJiyong ParkA53_DISABLE_NON_TEMPORAL_HINT := 0 8*54fd6939SJiyong ParkSEPARATE_CODE_AND_RODATA := 1 9*54fd6939SJiyong Parkoverride RESET_TO_BL31 := 1 10*54fd6939SJiyong ParkPL011_GENERIC_UART := 1 11*54fd6939SJiyong ParkIPI_CRC_CHECK := 0 12*54fd6939SJiyong ParkHARDEN_SLS_ALL := 0 13*54fd6939SJiyong Park 14*54fd6939SJiyong Parkifdef VERSAL_ATF_MEM_BASE 15*54fd6939SJiyong Park $(eval $(call add_define,VERSAL_ATF_MEM_BASE)) 16*54fd6939SJiyong Park 17*54fd6939SJiyong Park ifndef VERSAL_ATF_MEM_SIZE 18*54fd6939SJiyong Park $(error "VERSAL_ATF_BASE defined without VERSAL_ATF_SIZE") 19*54fd6939SJiyong Park endif 20*54fd6939SJiyong Park $(eval $(call add_define,VERSAL_ATF_MEM_SIZE)) 21*54fd6939SJiyong Park 22*54fd6939SJiyong Park ifdef VERSAL_ATF_MEM_PROGBITS_SIZE 23*54fd6939SJiyong Park $(eval $(call add_define,VERSAL_ATF_MEM_PROGBITS_SIZE)) 24*54fd6939SJiyong Park endif 25*54fd6939SJiyong Parkendif 26*54fd6939SJiyong Park 27*54fd6939SJiyong Parkifdef VERSAL_BL32_MEM_BASE 28*54fd6939SJiyong Park $(eval $(call add_define,VERSAL_BL32_MEM_BASE)) 29*54fd6939SJiyong Park 30*54fd6939SJiyong Park ifndef VERSAL_BL32_MEM_SIZE 31*54fd6939SJiyong Park $(error "VERSAL_BL32_BASE defined without VERSAL_BL32_SIZE") 32*54fd6939SJiyong Park endif 33*54fd6939SJiyong Park $(eval $(call add_define,VERSAL_BL32_MEM_SIZE)) 34*54fd6939SJiyong Parkendif 35*54fd6939SJiyong Park 36*54fd6939SJiyong Parkifdef IPI_CRC_CHECK 37*54fd6939SJiyong Park $(eval $(call add_define,IPI_CRC_CHECK)) 38*54fd6939SJiyong Parkendif 39*54fd6939SJiyong Park 40*54fd6939SJiyong ParkVERSAL_PLATFORM ?= silicon 41*54fd6939SJiyong Park$(eval $(call add_define_val,VERSAL_PLATFORM,VERSAL_PLATFORM_ID_${VERSAL_PLATFORM})) 42*54fd6939SJiyong Park 43*54fd6939SJiyong ParkPLAT_INCLUDES := -Iinclude/plat/arm/common/ \ 44*54fd6939SJiyong Park -Iplat/xilinx/common/include/ \ 45*54fd6939SJiyong Park -Iplat/xilinx/common/ipi_mailbox_service/ \ 46*54fd6939SJiyong Park -Iplat/xilinx/versal/include/ \ 47*54fd6939SJiyong Park -Iplat/xilinx/versal/pm_service/ 48*54fd6939SJiyong Park 49*54fd6939SJiyong Park# Include GICv3 driver files 50*54fd6939SJiyong Parkinclude drivers/arm/gic/v3/gicv3.mk 51*54fd6939SJiyong Park 52*54fd6939SJiyong ParkPLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \ 53*54fd6939SJiyong Park lib/xlat_tables/aarch64/xlat_tables.c \ 54*54fd6939SJiyong Park drivers/arm/dcc/dcc_console.c \ 55*54fd6939SJiyong Park drivers/delay_timer/delay_timer.c \ 56*54fd6939SJiyong Park drivers/delay_timer/generic_delay_timer.c \ 57*54fd6939SJiyong Park ${GICV3_SOURCES} \ 58*54fd6939SJiyong Park drivers/arm/pl011/aarch64/pl011_console.S \ 59*54fd6939SJiyong Park plat/common/aarch64/crash_console_helpers.S \ 60*54fd6939SJiyong Park plat/arm/common/arm_cci.c \ 61*54fd6939SJiyong Park plat/arm/common/arm_common.c \ 62*54fd6939SJiyong Park plat/common/plat_gicv3.c \ 63*54fd6939SJiyong Park plat/xilinx/versal/aarch64/versal_helpers.S \ 64*54fd6939SJiyong Park plat/xilinx/versal/aarch64/versal_common.c 65*54fd6939SJiyong Park 66*54fd6939SJiyong ParkVERSAL_CONSOLE ?= pl011 67*54fd6939SJiyong Parkifeq (${VERSAL_CONSOLE}, $(filter ${VERSAL_CONSOLE},pl011 pl011_0 pl011_1 dcc)) 68*54fd6939SJiyong Parkelse 69*54fd6939SJiyong Park $(error "Please define VERSAL_CONSOLE") 70*54fd6939SJiyong Parkendif 71*54fd6939SJiyong Park 72*54fd6939SJiyong Park$(eval $(call add_define_val,VERSAL_CONSOLE,VERSAL_CONSOLE_ID_${VERSAL_CONSOLE})) 73*54fd6939SJiyong Park 74*54fd6939SJiyong ParkBL31_SOURCES += drivers/arm/cci/cci.c \ 75*54fd6939SJiyong Park lib/cpus/aarch64/cortex_a72.S \ 76*54fd6939SJiyong Park plat/common/plat_psci_common.c \ 77*54fd6939SJiyong Park plat/xilinx/common/ipi.c \ 78*54fd6939SJiyong Park plat/xilinx/common/plat_startup.c \ 79*54fd6939SJiyong Park plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \ 80*54fd6939SJiyong Park plat/xilinx/common/pm_service/pm_ipi.c \ 81*54fd6939SJiyong Park plat/xilinx/versal/bl31_versal_setup.c \ 82*54fd6939SJiyong Park plat/xilinx/versal/plat_psci.c \ 83*54fd6939SJiyong Park plat/xilinx/versal/plat_versal.c \ 84*54fd6939SJiyong Park plat/xilinx/versal/plat_topology.c \ 85*54fd6939SJiyong Park plat/xilinx/versal/sip_svc_setup.c \ 86*54fd6939SJiyong Park plat/xilinx/versal/versal_gicv3.c \ 87*54fd6939SJiyong Park plat/xilinx/versal/versal_ipi.c \ 88*54fd6939SJiyong Park plat/xilinx/versal/pm_service/pm_svc_main.c \ 89*54fd6939SJiyong Park plat/xilinx/versal/pm_service/pm_api_sys.c \ 90*54fd6939SJiyong Park plat/xilinx/versal/pm_service/pm_client.c 91*54fd6939SJiyong Park 92*54fd6939SJiyong Parkifeq ($(HARDEN_SLS_ALL), 1) 93*54fd6939SJiyong ParkTF_CFLAGS_aarch64 += -mharden-sls=all 94*54fd6939SJiyong Parkendif 95