1*54fd6939SJiyong Park /* 2*54fd6939SJiyong Park * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park #include <arch.h> 8*54fd6939SJiyong Park #include <plat/common/platform.h> 9*54fd6939SJiyong Park 10*54fd6939SJiyong Park #include "uniphier.h" 11*54fd6939SJiyong Park 12*54fd6939SJiyong Park static unsigned char uniphier_power_domain_tree_desc[UNIPHIER_CLUSTER_COUNT + 1]; 13*54fd6939SJiyong Park plat_get_power_domain_tree_desc(void)14*54fd6939SJiyong Parkconst unsigned char *plat_get_power_domain_tree_desc(void) 15*54fd6939SJiyong Park { 16*54fd6939SJiyong Park int i; 17*54fd6939SJiyong Park 18*54fd6939SJiyong Park uniphier_power_domain_tree_desc[0] = UNIPHIER_CLUSTER_COUNT; 19*54fd6939SJiyong Park 20*54fd6939SJiyong Park for (i = 0; i < UNIPHIER_CLUSTER_COUNT; i++) 21*54fd6939SJiyong Park uniphier_power_domain_tree_desc[i + 1] = 22*54fd6939SJiyong Park UNIPHIER_MAX_CPUS_PER_CLUSTER; 23*54fd6939SJiyong Park 24*54fd6939SJiyong Park return uniphier_power_domain_tree_desc; 25*54fd6939SJiyong Park } 26*54fd6939SJiyong Park plat_core_pos_by_mpidr(u_register_t mpidr)27*54fd6939SJiyong Parkint plat_core_pos_by_mpidr(u_register_t mpidr) 28*54fd6939SJiyong Park { 29*54fd6939SJiyong Park unsigned int cluster_id, cpu_id; 30*54fd6939SJiyong Park 31*54fd6939SJiyong Park cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; 32*54fd6939SJiyong Park if (cluster_id >= UNIPHIER_CLUSTER_COUNT) 33*54fd6939SJiyong Park return -1; 34*54fd6939SJiyong Park 35*54fd6939SJiyong Park cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; 36*54fd6939SJiyong Park if (cpu_id >= UNIPHIER_MAX_CPUS_PER_CLUSTER) 37*54fd6939SJiyong Park return -1; 38*54fd6939SJiyong Park 39*54fd6939SJiyong Park return uniphier_calc_core_pos(mpidr); 40*54fd6939SJiyong Park } 41