1*54fd6939SJiyong Park/* 2*54fd6939SJiyong Park * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park#include <arch.h> 8*54fd6939SJiyong Park#include <asm_macros.S> 9*54fd6939SJiyong Park 10*54fd6939SJiyong Park .globl uniphier_warmboot_entrypoint 11*54fd6939SJiyong Park .globl uniphier_fake_pwr_down 12*54fd6939SJiyong Park 13*54fd6939SJiyong Parkfunc uniphier_warmboot_entrypoint 14*54fd6939SJiyong Park mrs x0, mpidr_el1 15*54fd6939SJiyong Park mov_imm x1, MPIDR_AFFINITY_MASK 16*54fd6939SJiyong Park and x0, x0, x1 17*54fd6939SJiyong Park b 1f 18*54fd6939SJiyong Park0: wfe 19*54fd6939SJiyong Park1: ldr x1, uniphier_holding_pen_release 20*54fd6939SJiyong Park cmp x1, x0 21*54fd6939SJiyong Park b.ne 0b 22*54fd6939SJiyong Park ldr x0, uniphier_sec_entrypoint 23*54fd6939SJiyong Park br x0 24*54fd6939SJiyong Parkendfunc uniphier_warmboot_entrypoint 25*54fd6939SJiyong Park 26*54fd6939SJiyong Parkfunc uniphier_fake_pwr_down 27*54fd6939SJiyong Park bl disable_mmu_icache_el3 28*54fd6939SJiyong Park b uniphier_warmboot_entrypoint 29*54fd6939SJiyong Parkendfunc uniphier_fake_pwr_down 30