1*54fd6939SJiyong Park/* 2*54fd6939SJiyong Park * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park#include <asm_macros.S> 8*54fd6939SJiyong Park#include <platform_def.h> 9*54fd6939SJiyong Park 10*54fd6939SJiyong Park .global uniphier_calc_core_pos 11*54fd6939SJiyong Park .global plat_my_core_pos 12*54fd6939SJiyong Park .globl platform_mem_init 13*54fd6939SJiyong Park 14*54fd6939SJiyong Park/* 15*54fd6939SJiyong Park * unsigned int uniphier_calc_core_pos(u_register_t mpidr) 16*54fd6939SJiyong Park * core_pos = (cluster_id * max_cpus_per_cluster) + core_id 17*54fd6939SJiyong Park */ 18*54fd6939SJiyong Parkfunc uniphier_calc_core_pos 19*54fd6939SJiyong Park and x1, x0, #MPIDR_CPU_MASK 20*54fd6939SJiyong Park and x0, x0, #MPIDR_CLUSTER_MASK 21*54fd6939SJiyong Park lsr x0, x0, #MPIDR_AFFINITY_BITS 22*54fd6939SJiyong Park mov x2, #UNIPHIER_MAX_CPUS_PER_CLUSTER 23*54fd6939SJiyong Park madd x0, x0, x2, x1 24*54fd6939SJiyong Park ret 25*54fd6939SJiyong Parkendfunc uniphier_calc_core_pos 26*54fd6939SJiyong Park 27*54fd6939SJiyong Parkfunc plat_my_core_pos 28*54fd6939SJiyong Park mrs x0, mpidr_el1 29*54fd6939SJiyong Park b uniphier_calc_core_pos 30*54fd6939SJiyong Parkendfunc plat_my_core_pos 31*54fd6939SJiyong Park 32*54fd6939SJiyong Parkfunc platform_mem_init 33*54fd6939SJiyong Park ret 34*54fd6939SJiyong Parkendfunc platform_mem_init 35