1*54fd6939SJiyong Park /* 2*54fd6939SJiyong Park * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park #include <platform_def.h> 8*54fd6939SJiyong Park 9*54fd6939SJiyong Park #include <arch.h> 10*54fd6939SJiyong Park 11*54fd6939SJiyong Park #include <sq_common.h> 12*54fd6939SJiyong Park 13*54fd6939SJiyong Park unsigned char sq_pd_tree_desc[PLAT_CLUSTER_COUNT + 1]; 14*54fd6939SJiyong Park plat_core_pos_by_mpidr(u_register_t mpidr)15*54fd6939SJiyong Parkint plat_core_pos_by_mpidr(u_register_t mpidr) 16*54fd6939SJiyong Park { 17*54fd6939SJiyong Park unsigned int cluster_id, cpu_id; 18*54fd6939SJiyong Park 19*54fd6939SJiyong Park cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; 20*54fd6939SJiyong Park if (cluster_id >= PLAT_CLUSTER_COUNT) 21*54fd6939SJiyong Park return -1; 22*54fd6939SJiyong Park 23*54fd6939SJiyong Park cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; 24*54fd6939SJiyong Park if (cpu_id >= PLAT_MAX_CORES_PER_CLUSTER) 25*54fd6939SJiyong Park return -1; 26*54fd6939SJiyong Park 27*54fd6939SJiyong Park return sq_calc_core_pos(mpidr); 28*54fd6939SJiyong Park } 29*54fd6939SJiyong Park plat_get_power_domain_tree_desc(void)30*54fd6939SJiyong Parkconst unsigned char *plat_get_power_domain_tree_desc(void) 31*54fd6939SJiyong Park { 32*54fd6939SJiyong Park int i; 33*54fd6939SJiyong Park 34*54fd6939SJiyong Park sq_pd_tree_desc[0] = PLAT_CLUSTER_COUNT; 35*54fd6939SJiyong Park 36*54fd6939SJiyong Park for (i = 0; i < PLAT_CLUSTER_COUNT; i++) 37*54fd6939SJiyong Park sq_pd_tree_desc[i + 1] = PLAT_MAX_CORES_PER_CLUSTER; 38*54fd6939SJiyong Park 39*54fd6939SJiyong Park return sq_pd_tree_desc; 40*54fd6939SJiyong Park } 41