1*54fd6939SJiyong Park /*
2*54fd6939SJiyong Park * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3*54fd6939SJiyong Park *
4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause
5*54fd6939SJiyong Park */
6*54fd6939SJiyong Park
7*54fd6939SJiyong Park #include <assert.h>
8*54fd6939SJiyong Park
9*54fd6939SJiyong Park #include <platform_def.h>
10*54fd6939SJiyong Park
11*54fd6939SJiyong Park #include <common/interrupt_props.h>
12*54fd6939SJiyong Park #include <drivers/arm/gicv3.h>
13*54fd6939SJiyong Park #include <plat/common/platform.h>
14*54fd6939SJiyong Park
15*54fd6939SJiyong Park #include "sq_common.h"
16*54fd6939SJiyong Park
17*54fd6939SJiyong Park static uintptr_t sq_rdistif_base_addrs[PLATFORM_CORE_COUNT];
18*54fd6939SJiyong Park
19*54fd6939SJiyong Park static const interrupt_prop_t sq_interrupt_props[] = {
20*54fd6939SJiyong Park /* G0 interrupts */
21*54fd6939SJiyong Park
22*54fd6939SJiyong Park /* SGI0 */
23*54fd6939SJiyong Park INTR_PROP_DESC(8, GIC_HIGHEST_SEC_PRIORITY, INTR_GROUP0,
24*54fd6939SJiyong Park GIC_INTR_CFG_EDGE),
25*54fd6939SJiyong Park /* SGI6 */
26*54fd6939SJiyong Park INTR_PROP_DESC(14, GIC_HIGHEST_SEC_PRIORITY, INTR_GROUP0,
27*54fd6939SJiyong Park GIC_INTR_CFG_EDGE),
28*54fd6939SJiyong Park
29*54fd6939SJiyong Park /* G1S interrupts */
30*54fd6939SJiyong Park
31*54fd6939SJiyong Park /* Timer */
32*54fd6939SJiyong Park INTR_PROP_DESC(29, GIC_HIGHEST_SEC_PRIORITY, INTR_GROUP1S,
33*54fd6939SJiyong Park GIC_INTR_CFG_LEVEL),
34*54fd6939SJiyong Park /* SGI1 */
35*54fd6939SJiyong Park INTR_PROP_DESC(9, GIC_HIGHEST_SEC_PRIORITY, INTR_GROUP1S,
36*54fd6939SJiyong Park GIC_INTR_CFG_EDGE),
37*54fd6939SJiyong Park /* SGI2 */
38*54fd6939SJiyong Park INTR_PROP_DESC(10, GIC_HIGHEST_SEC_PRIORITY, INTR_GROUP1S,
39*54fd6939SJiyong Park GIC_INTR_CFG_EDGE),
40*54fd6939SJiyong Park /* SGI3 */
41*54fd6939SJiyong Park INTR_PROP_DESC(11, GIC_HIGHEST_SEC_PRIORITY, INTR_GROUP1S,
42*54fd6939SJiyong Park GIC_INTR_CFG_EDGE),
43*54fd6939SJiyong Park /* SGI4 */
44*54fd6939SJiyong Park INTR_PROP_DESC(12, GIC_HIGHEST_SEC_PRIORITY, INTR_GROUP1S,
45*54fd6939SJiyong Park GIC_INTR_CFG_EDGE),
46*54fd6939SJiyong Park /* SGI5 */
47*54fd6939SJiyong Park INTR_PROP_DESC(13, GIC_HIGHEST_SEC_PRIORITY, INTR_GROUP1S,
48*54fd6939SJiyong Park GIC_INTR_CFG_EDGE),
49*54fd6939SJiyong Park /* SGI7 */
50*54fd6939SJiyong Park INTR_PROP_DESC(15, GIC_HIGHEST_SEC_PRIORITY, INTR_GROUP1S,
51*54fd6939SJiyong Park GIC_INTR_CFG_EDGE)
52*54fd6939SJiyong Park };
53*54fd6939SJiyong Park
sq_mpidr_to_core_pos(u_register_t mpidr)54*54fd6939SJiyong Park static unsigned int sq_mpidr_to_core_pos(u_register_t mpidr)
55*54fd6939SJiyong Park {
56*54fd6939SJiyong Park return plat_core_pos_by_mpidr(mpidr);
57*54fd6939SJiyong Park }
58*54fd6939SJiyong Park
59*54fd6939SJiyong Park static const struct gicv3_driver_data sq_gic_driver_data = {
60*54fd6939SJiyong Park .gicd_base = PLAT_SQ_GICD_BASE,
61*54fd6939SJiyong Park .gicr_base = PLAT_SQ_GICR_BASE,
62*54fd6939SJiyong Park .interrupt_props = sq_interrupt_props,
63*54fd6939SJiyong Park .interrupt_props_num = ARRAY_SIZE(sq_interrupt_props),
64*54fd6939SJiyong Park .rdistif_num = PLATFORM_CORE_COUNT,
65*54fd6939SJiyong Park .rdistif_base_addrs = sq_rdistif_base_addrs,
66*54fd6939SJiyong Park .mpidr_to_core_pos = sq_mpidr_to_core_pos,
67*54fd6939SJiyong Park };
68*54fd6939SJiyong Park
sq_gic_driver_init(void)69*54fd6939SJiyong Park void sq_gic_driver_init(void)
70*54fd6939SJiyong Park {
71*54fd6939SJiyong Park gicv3_driver_init(&sq_gic_driver_data);
72*54fd6939SJiyong Park }
73*54fd6939SJiyong Park
sq_gic_init(void)74*54fd6939SJiyong Park void sq_gic_init(void)
75*54fd6939SJiyong Park {
76*54fd6939SJiyong Park gicv3_distif_init();
77*54fd6939SJiyong Park gicv3_rdistif_init(plat_my_core_pos());
78*54fd6939SJiyong Park gicv3_cpuif_enable(plat_my_core_pos());
79*54fd6939SJiyong Park }
80*54fd6939SJiyong Park
sq_gic_cpuif_enable(void)81*54fd6939SJiyong Park void sq_gic_cpuif_enable(void)
82*54fd6939SJiyong Park {
83*54fd6939SJiyong Park gicv3_cpuif_enable(plat_my_core_pos());
84*54fd6939SJiyong Park }
85*54fd6939SJiyong Park
sq_gic_cpuif_disable(void)86*54fd6939SJiyong Park void sq_gic_cpuif_disable(void)
87*54fd6939SJiyong Park {
88*54fd6939SJiyong Park gicv3_cpuif_disable(plat_my_core_pos());
89*54fd6939SJiyong Park }
90*54fd6939SJiyong Park
sq_gic_pcpu_init(void)91*54fd6939SJiyong Park void sq_gic_pcpu_init(void)
92*54fd6939SJiyong Park {
93*54fd6939SJiyong Park gicv3_rdistif_init(plat_my_core_pos());
94*54fd6939SJiyong Park }
95