1*54fd6939SJiyong Park /* 2*54fd6939SJiyong Park * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park #include <stdint.h> 8*54fd6939SJiyong Park 9*54fd6939SJiyong Park #include <platform_def.h> 10*54fd6939SJiyong Park 11*54fd6939SJiyong Park #include <arch.h> 12*54fd6939SJiyong Park 13*54fd6939SJiyong Park #include <rpi_shared.h> 14*54fd6939SJiyong Park 15*54fd6939SJiyong Park /* The power domain tree descriptor */ 16*54fd6939SJiyong Park static unsigned char power_domain_tree_desc[] = { 17*54fd6939SJiyong Park /* Number of root nodes */ 18*54fd6939SJiyong Park PLATFORM_CLUSTER_COUNT, 19*54fd6939SJiyong Park /* Number of children for the first node */ 20*54fd6939SJiyong Park PLATFORM_CLUSTER0_CORE_COUNT, 21*54fd6939SJiyong Park }; 22*54fd6939SJiyong Park 23*54fd6939SJiyong Park /******************************************************************************* 24*54fd6939SJiyong Park * This function returns the ARM default topology tree information. 25*54fd6939SJiyong Park ******************************************************************************/ plat_get_power_domain_tree_desc(void)26*54fd6939SJiyong Parkconst unsigned char *plat_get_power_domain_tree_desc(void) 27*54fd6939SJiyong Park { 28*54fd6939SJiyong Park return power_domain_tree_desc; 29*54fd6939SJiyong Park } 30*54fd6939SJiyong Park 31*54fd6939SJiyong Park /******************************************************************************* 32*54fd6939SJiyong Park * This function implements a part of the critical interface between the psci 33*54fd6939SJiyong Park * generic layer and the platform that allows the former to query the platform 34*54fd6939SJiyong Park * to convert an MPIDR to a unique linear index. An error code (-1) is returned 35*54fd6939SJiyong Park * in case the MPIDR is invalid. 36*54fd6939SJiyong Park ******************************************************************************/ plat_core_pos_by_mpidr(u_register_t mpidr)37*54fd6939SJiyong Parkint plat_core_pos_by_mpidr(u_register_t mpidr) 38*54fd6939SJiyong Park { 39*54fd6939SJiyong Park unsigned int cluster_id, cpu_id; 40*54fd6939SJiyong Park 41*54fd6939SJiyong Park mpidr &= MPIDR_AFFINITY_MASK; 42*54fd6939SJiyong Park if (mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)) { 43*54fd6939SJiyong Park return -1; 44*54fd6939SJiyong Park } 45*54fd6939SJiyong Park 46*54fd6939SJiyong Park cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; 47*54fd6939SJiyong Park cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; 48*54fd6939SJiyong Park 49*54fd6939SJiyong Park if (cluster_id >= PLATFORM_CLUSTER_COUNT) { 50*54fd6939SJiyong Park return -1; 51*54fd6939SJiyong Park } 52*54fd6939SJiyong Park 53*54fd6939SJiyong Park if (cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER) { 54*54fd6939SJiyong Park return -1; 55*54fd6939SJiyong Park } 56*54fd6939SJiyong Park 57*54fd6939SJiyong Park return plat_rpi3_calc_core_pos(mpidr); 58*54fd6939SJiyong Park } 59