1*54fd6939SJiyong Park /* 2*54fd6939SJiyong Park * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park #include <platform_def.h> 8*54fd6939SJiyong Park 9*54fd6939SJiyong Park #include <common/bl_common.h> 10*54fd6939SJiyong Park #include <common/interrupt_props.h> 11*54fd6939SJiyong Park #include <drivers/arm/gicv2.h> 12*54fd6939SJiyong Park #include <lib/utils.h> 13*54fd6939SJiyong Park 14*54fd6939SJiyong Park /****************************************************************************** 15*54fd6939SJiyong Park * The following functions are defined as weak to allow a platform to override 16*54fd6939SJiyong Park * the way the GICv2 driver is initialised and used. 17*54fd6939SJiyong Park *****************************************************************************/ 18*54fd6939SJiyong Park #pragma weak plat_rockchip_gic_driver_init 19*54fd6939SJiyong Park #pragma weak plat_rockchip_gic_init 20*54fd6939SJiyong Park #pragma weak plat_rockchip_gic_cpuif_enable 21*54fd6939SJiyong Park #pragma weak plat_rockchip_gic_cpuif_disable 22*54fd6939SJiyong Park #pragma weak plat_rockchip_gic_pcpu_init 23*54fd6939SJiyong Park 24*54fd6939SJiyong Park /****************************************************************************** 25*54fd6939SJiyong Park * List of interrupts. 26*54fd6939SJiyong Park *****************************************************************************/ 27*54fd6939SJiyong Park static const interrupt_prop_t g0_interrupt_props[] = { 28*54fd6939SJiyong Park PLAT_RK_GICV2_G0_IRQS 29*54fd6939SJiyong Park }; 30*54fd6939SJiyong Park 31*54fd6939SJiyong Park /* 32*54fd6939SJiyong Park * Ideally `rockchip_gic_data` structure definition should be a `const` but it 33*54fd6939SJiyong Park * is kept as modifiable for overwriting with different GICD and GICC base when 34*54fd6939SJiyong Park * running on FVP with VE memory map. 35*54fd6939SJiyong Park */ 36*54fd6939SJiyong Park gicv2_driver_data_t rockchip_gic_data = { 37*54fd6939SJiyong Park .gicd_base = PLAT_RK_GICD_BASE, 38*54fd6939SJiyong Park .gicc_base = PLAT_RK_GICC_BASE, 39*54fd6939SJiyong Park .interrupt_props = g0_interrupt_props, 40*54fd6939SJiyong Park .interrupt_props_num = ARRAY_SIZE(g0_interrupt_props), 41*54fd6939SJiyong Park }; 42*54fd6939SJiyong Park 43*54fd6939SJiyong Park /****************************************************************************** 44*54fd6939SJiyong Park * RockChip common helper to initialize the GICv2 only driver. 45*54fd6939SJiyong Park *****************************************************************************/ plat_rockchip_gic_driver_init(void)46*54fd6939SJiyong Parkvoid plat_rockchip_gic_driver_init(void) 47*54fd6939SJiyong Park { 48*54fd6939SJiyong Park gicv2_driver_init(&rockchip_gic_data); 49*54fd6939SJiyong Park } 50*54fd6939SJiyong Park plat_rockchip_gic_init(void)51*54fd6939SJiyong Parkvoid plat_rockchip_gic_init(void) 52*54fd6939SJiyong Park { 53*54fd6939SJiyong Park gicv2_distif_init(); 54*54fd6939SJiyong Park gicv2_pcpu_distif_init(); 55*54fd6939SJiyong Park gicv2_cpuif_enable(); 56*54fd6939SJiyong Park } 57*54fd6939SJiyong Park 58*54fd6939SJiyong Park /****************************************************************************** 59*54fd6939SJiyong Park * RockChip common helper to enable the GICv2 CPU interface 60*54fd6939SJiyong Park *****************************************************************************/ plat_rockchip_gic_cpuif_enable(void)61*54fd6939SJiyong Parkvoid plat_rockchip_gic_cpuif_enable(void) 62*54fd6939SJiyong Park { 63*54fd6939SJiyong Park gicv2_cpuif_enable(); 64*54fd6939SJiyong Park } 65*54fd6939SJiyong Park 66*54fd6939SJiyong Park /****************************************************************************** 67*54fd6939SJiyong Park * RockChip common helper to disable the GICv2 CPU interface 68*54fd6939SJiyong Park *****************************************************************************/ plat_rockchip_gic_cpuif_disable(void)69*54fd6939SJiyong Parkvoid plat_rockchip_gic_cpuif_disable(void) 70*54fd6939SJiyong Park { 71*54fd6939SJiyong Park gicv2_cpuif_disable(); 72*54fd6939SJiyong Park } 73*54fd6939SJiyong Park 74*54fd6939SJiyong Park /****************************************************************************** 75*54fd6939SJiyong Park * RockChip common helper to initialize the per cpu distributor interface 76*54fd6939SJiyong Park * in GICv2 77*54fd6939SJiyong Park *****************************************************************************/ plat_rockchip_gic_pcpu_init(void)78*54fd6939SJiyong Parkvoid plat_rockchip_gic_pcpu_init(void) 79*54fd6939SJiyong Park { 80*54fd6939SJiyong Park gicv2_pcpu_distif_init(); 81*54fd6939SJiyong Park } 82