1*54fd6939SJiyong Park# 2*54fd6939SJiyong Park# Copyright (c) 2018-2021, Renesas Electronics Corporation. All rights reserved. 3*54fd6939SJiyong Park# 4*54fd6939SJiyong Park# SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park# 6*54fd6939SJiyong Park 7*54fd6939SJiyong ParkPROGRAMMABLE_RESET_ADDRESS := 0 8*54fd6939SJiyong ParkCOLD_BOOT_SINGLE_CPU := 1 9*54fd6939SJiyong ParkARM_CCI_PRODUCT_ID := 500 10*54fd6939SJiyong ParkTRUSTED_BOARD_BOOT := 1 11*54fd6939SJiyong ParkRESET_TO_BL31 := 1 12*54fd6939SJiyong ParkGENERATE_COT := 1 13*54fd6939SJiyong ParkBL2_AT_EL3 := 1 14*54fd6939SJiyong ParkENABLE_SVE_FOR_NS := 0 15*54fd6939SJiyong ParkMULTI_CONSOLE_API := 1 16*54fd6939SJiyong Park 17*54fd6939SJiyong ParkCRASH_REPORTING := 1 18*54fd6939SJiyong ParkHANDLE_EA_EL3_FIRST := 1 19*54fd6939SJiyong Park 20*54fd6939SJiyong Park$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 21*54fd6939SJiyong Park 22*54fd6939SJiyong Parkifeq (${SPD},none) 23*54fd6939SJiyong Park SPD_NONE:=1 24*54fd6939SJiyong Park $(eval $(call add_define,SPD_NONE)) 25*54fd6939SJiyong Parkendif 26*54fd6939SJiyong Park 27*54fd6939SJiyong Park# LSI setting common define 28*54fd6939SJiyong ParkRCAR_H3:=0 29*54fd6939SJiyong ParkRCAR_M3:=1 30*54fd6939SJiyong ParkRCAR_M3N:=2 31*54fd6939SJiyong ParkRCAR_E3:=3 32*54fd6939SJiyong ParkRCAR_H3N:=4 33*54fd6939SJiyong ParkRCAR_D3:=5 34*54fd6939SJiyong ParkRCAR_V3M:=6 35*54fd6939SJiyong ParkRCAR_AUTO:=99 36*54fd6939SJiyong ParkRZ_G2M:=100 37*54fd6939SJiyong ParkRZ_G2H:=101 38*54fd6939SJiyong ParkRZ_G2N:=102 39*54fd6939SJiyong ParkRZ_G2E:=103 40*54fd6939SJiyong Park$(eval $(call add_define,RCAR_H3)) 41*54fd6939SJiyong Park$(eval $(call add_define,RCAR_M3)) 42*54fd6939SJiyong Park$(eval $(call add_define,RCAR_M3N)) 43*54fd6939SJiyong Park$(eval $(call add_define,RCAR_E3)) 44*54fd6939SJiyong Park$(eval $(call add_define,RCAR_H3N)) 45*54fd6939SJiyong Park$(eval $(call add_define,RCAR_D3)) 46*54fd6939SJiyong Park$(eval $(call add_define,RCAR_V3M)) 47*54fd6939SJiyong Park$(eval $(call add_define,RCAR_AUTO)) 48*54fd6939SJiyong Park$(eval $(call add_define,RZ_G2M)) 49*54fd6939SJiyong Park$(eval $(call add_define,RZ_G2H)) 50*54fd6939SJiyong Park$(eval $(call add_define,RZ_G2N)) 51*54fd6939SJiyong Park$(eval $(call add_define,RZ_G2E)) 52*54fd6939SJiyong Park 53*54fd6939SJiyong ParkRCAR_CUT_10:=0 54*54fd6939SJiyong ParkRCAR_CUT_11:=1 55*54fd6939SJiyong ParkRCAR_CUT_13:=3 56*54fd6939SJiyong ParkRCAR_CUT_20:=10 57*54fd6939SJiyong ParkRCAR_CUT_30:=20 58*54fd6939SJiyong Park$(eval $(call add_define,RCAR_CUT_10)) 59*54fd6939SJiyong Park$(eval $(call add_define,RCAR_CUT_11)) 60*54fd6939SJiyong Park$(eval $(call add_define,RCAR_CUT_13)) 61*54fd6939SJiyong Park$(eval $(call add_define,RCAR_CUT_20)) 62*54fd6939SJiyong Park$(eval $(call add_define,RCAR_CUT_30)) 63*54fd6939SJiyong Park 64*54fd6939SJiyong Park# Enable workarounds for selected Cortex-A53 erratas. 65*54fd6939SJiyong ParkERRATA_A53_835769 := 1 66*54fd6939SJiyong ParkERRATA_A53_843419 := 1 67*54fd6939SJiyong ParkERRATA_A53_855873 := 1 68*54fd6939SJiyong ParkERRATA_A53_1530924 := 1 69*54fd6939SJiyong Park 70*54fd6939SJiyong Park# Enable workarounds for selected Cortex-A57 erratas. 71*54fd6939SJiyong ParkERRATA_A57_859972 := 1 72*54fd6939SJiyong ParkERRATA_A57_813419 := 1 73*54fd6939SJiyong ParkERRATA_A57_1319537 := 1 74*54fd6939SJiyong Park 75*54fd6939SJiyong ParkPLAT_INCLUDES := -Iplat/renesas/common/include/registers \ 76*54fd6939SJiyong Park -Iplat/renesas/common/include \ 77*54fd6939SJiyong Park -Iplat/renesas/common 78*54fd6939SJiyong Park 79*54fd6939SJiyong ParkPLAT_BL_COMMON_SOURCES := drivers/renesas/common/iic_dvfs/iic_dvfs.c \ 80*54fd6939SJiyong Park plat/renesas/common/rcar_common.c 81*54fd6939SJiyong Park 82*54fd6939SJiyong Parkinclude drivers/arm/gic/v2/gicv2.mk 83*54fd6939SJiyong ParkRCAR_GIC_SOURCES := ${GICV2_SOURCES} \ 84*54fd6939SJiyong Park plat/common/plat_gicv2.c 85*54fd6939SJiyong Park 86*54fd6939SJiyong ParkBL2_SOURCES += ${RCAR_GIC_SOURCES} \ 87*54fd6939SJiyong Park lib/cpus/aarch64/cortex_a53.S \ 88*54fd6939SJiyong Park lib/cpus/aarch64/cortex_a57.S \ 89*54fd6939SJiyong Park ${LIBFDT_SRCS} \ 90*54fd6939SJiyong Park common/desc_image_load.c \ 91*54fd6939SJiyong Park plat/renesas/common/aarch64/platform_common.c \ 92*54fd6939SJiyong Park plat/renesas/common/aarch64/plat_helpers.S \ 93*54fd6939SJiyong Park plat/renesas/common/bl2_interrupt_error.c \ 94*54fd6939SJiyong Park plat/renesas/common/bl2_secure_setting.c \ 95*54fd6939SJiyong Park plat/renesas/common/plat_storage.c \ 96*54fd6939SJiyong Park plat/renesas/common/bl2_plat_mem_params_desc.c \ 97*54fd6939SJiyong Park plat/renesas/common/plat_image_load.c \ 98*54fd6939SJiyong Park plat/renesas/common/bl2_cpg_init.c \ 99*54fd6939SJiyong Park drivers/renesas/common/console/rcar_printf.c \ 100*54fd6939SJiyong Park drivers/renesas/common/scif/scif.S \ 101*54fd6939SJiyong Park drivers/renesas/common/common.c \ 102*54fd6939SJiyong Park drivers/renesas/common/io/io_emmcdrv.c \ 103*54fd6939SJiyong Park drivers/renesas/common/io/io_memdrv.c \ 104*54fd6939SJiyong Park drivers/renesas/common/io/io_rcar.c \ 105*54fd6939SJiyong Park drivers/renesas/common/auth/auth_mod.c \ 106*54fd6939SJiyong Park drivers/renesas/common/rpc/rpc_driver.c \ 107*54fd6939SJiyong Park drivers/renesas/common/dma/dma_driver.c \ 108*54fd6939SJiyong Park drivers/renesas/common/avs/avs_driver.c \ 109*54fd6939SJiyong Park drivers/renesas/common/delay/micro_delay.c \ 110*54fd6939SJiyong Park drivers/renesas/common/emmc/emmc_interrupt.c \ 111*54fd6939SJiyong Park drivers/renesas/common/emmc/emmc_utility.c \ 112*54fd6939SJiyong Park drivers/renesas/common/emmc/emmc_mount.c \ 113*54fd6939SJiyong Park drivers/renesas/common/emmc/emmc_init.c \ 114*54fd6939SJiyong Park drivers/renesas/common/emmc/emmc_read.c \ 115*54fd6939SJiyong Park drivers/renesas/common/emmc/emmc_cmd.c \ 116*54fd6939SJiyong Park drivers/renesas/common/watchdog/swdt.c \ 117*54fd6939SJiyong Park drivers/renesas/common/rom/rom_api.c \ 118*54fd6939SJiyong Park drivers/io/io_storage.c 119*54fd6939SJiyong Park 120*54fd6939SJiyong ParkBL31_SOURCES += ${RCAR_GIC_SOURCES} \ 121*54fd6939SJiyong Park lib/cpus/aarch64/cortex_a53.S \ 122*54fd6939SJiyong Park lib/cpus/aarch64/cortex_a57.S \ 123*54fd6939SJiyong Park plat/common/plat_psci_common.c \ 124*54fd6939SJiyong Park plat/renesas/common/plat_topology.c \ 125*54fd6939SJiyong Park plat/renesas/common/aarch64/plat_helpers.S \ 126*54fd6939SJiyong Park plat/renesas/common/aarch64/platform_common.c \ 127*54fd6939SJiyong Park plat/renesas/common/bl31_plat_setup.c \ 128*54fd6939SJiyong Park plat/renesas/common/plat_pm.c \ 129*54fd6939SJiyong Park drivers/renesas/common/console/rcar_console.S \ 130*54fd6939SJiyong Park drivers/renesas/common/console/rcar_printf.c \ 131*54fd6939SJiyong Park drivers/renesas/common/delay/micro_delay.c \ 132*54fd6939SJiyong Park drivers/renesas/common/pwrc/call_sram.S \ 133*54fd6939SJiyong Park drivers/renesas/common/pwrc/pwrc.c \ 134*54fd6939SJiyong Park drivers/renesas/common/common.c \ 135*54fd6939SJiyong Park drivers/arm/cci/cci.c 136*54fd6939SJiyong Park 137*54fd6939SJiyong Parkinclude lib/xlat_tables_v2/xlat_tables.mk 138*54fd6939SJiyong Parkinclude drivers/auth/mbedtls/mbedtls_crypto.mk 139*54fd6939SJiyong ParkPLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 140