xref: /aosp_15_r20/external/arm-trusted-firmware/plat/qemu/common/qemu_gicv2.c (revision 54fd6939e177f8ff529b10183254802c76df6d08)
1*54fd6939SJiyong Park /*
2*54fd6939SJiyong Park  * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
3*54fd6939SJiyong Park  *
4*54fd6939SJiyong Park  * SPDX-License-Identifier: BSD-3-Clause
5*54fd6939SJiyong Park  */
6*54fd6939SJiyong Park 
7*54fd6939SJiyong Park #include <drivers/arm/gicv2.h>
8*54fd6939SJiyong Park #include <drivers/arm/gic_common.h>
9*54fd6939SJiyong Park #include <platform_def.h>
10*54fd6939SJiyong Park 
11*54fd6939SJiyong Park static const interrupt_prop_t qemu_interrupt_props[] = {
12*54fd6939SJiyong Park 	PLATFORM_G1S_PROPS(GICV2_INTR_GROUP0),
13*54fd6939SJiyong Park 	PLATFORM_G0_PROPS(GICV2_INTR_GROUP0)
14*54fd6939SJiyong Park };
15*54fd6939SJiyong Park 
16*54fd6939SJiyong Park static const struct gicv2_driver_data plat_gicv2_driver_data = {
17*54fd6939SJiyong Park 	.gicd_base = GICD_BASE,
18*54fd6939SJiyong Park 	.gicc_base = GICC_BASE,
19*54fd6939SJiyong Park 	.interrupt_props = qemu_interrupt_props,
20*54fd6939SJiyong Park 	.interrupt_props_num = ARRAY_SIZE(qemu_interrupt_props),
21*54fd6939SJiyong Park };
22*54fd6939SJiyong Park 
plat_qemu_gic_init(void)23*54fd6939SJiyong Park void plat_qemu_gic_init(void)
24*54fd6939SJiyong Park {
25*54fd6939SJiyong Park 	/* Initialize the gic cpu and distributor interfaces */
26*54fd6939SJiyong Park 	gicv2_driver_init(&plat_gicv2_driver_data);
27*54fd6939SJiyong Park 	gicv2_distif_init();
28*54fd6939SJiyong Park 	gicv2_pcpu_distif_init();
29*54fd6939SJiyong Park 	gicv2_cpuif_enable();
30*54fd6939SJiyong Park }
31*54fd6939SJiyong Park 
qemu_pwr_gic_on_finish(void)32*54fd6939SJiyong Park void qemu_pwr_gic_on_finish(void)
33*54fd6939SJiyong Park {
34*54fd6939SJiyong Park 	/* TODO: This setup is needed only after a cold boot */
35*54fd6939SJiyong Park 	gicv2_pcpu_distif_init();
36*54fd6939SJiyong Park 
37*54fd6939SJiyong Park 	/* Enable the gic cpu interface */
38*54fd6939SJiyong Park 	gicv2_cpuif_enable();
39*54fd6939SJiyong Park }
40*54fd6939SJiyong Park 
qemu_pwr_gic_off(void)41*54fd6939SJiyong Park void qemu_pwr_gic_off(void)
42*54fd6939SJiyong Park {
43*54fd6939SJiyong Park 	gicv2_cpuif_disable();
44*54fd6939SJiyong Park }
45