xref: /aosp_15_r20/external/arm-trusted-firmware/plat/nxp/soc-lx2160a/soc.mk (revision 54fd6939e177f8ff529b10183254802c76df6d08)
1*54fd6939SJiyong Park#
2*54fd6939SJiyong Park# Copyright 2018-2020 NXP
3*54fd6939SJiyong Park#
4*54fd6939SJiyong Park# SPDX-License-Identifier: BSD-3-Clause
5*54fd6939SJiyong Park#
6*54fd6939SJiyong Park
7*54fd6939SJiyong Park
8*54fd6939SJiyong Park # SoC-specific build parameters
9*54fd6939SJiyong ParkSOC		:=	lx2160a
10*54fd6939SJiyong ParkPLAT_PATH	:=	plat/nxp
11*54fd6939SJiyong ParkPLAT_COMMON_PATH:=	plat/nxp/common
12*54fd6939SJiyong ParkPLAT_DRIVERS_PATH:=	drivers/nxp
13*54fd6939SJiyong ParkPLAT_SOC_PATH	:=	${PLAT_PATH}/soc-${SOC}
14*54fd6939SJiyong ParkBOARD_PATH	:=	${PLAT_SOC_PATH}/${BOARD}
15*54fd6939SJiyong Park
16*54fd6939SJiyong Park # get SoC-specific defnitions
17*54fd6939SJiyong Parkinclude ${PLAT_SOC_PATH}/soc.def
18*54fd6939SJiyong Parkinclude ${PLAT_COMMON_PATH}/plat_make_helper/soc_common_def.mk
19*54fd6939SJiyong Parkinclude ${PLAT_COMMON_PATH}/plat_make_helper/plat_build_macros.mk
20*54fd6939SJiyong Park
21*54fd6939SJiyong Park # SoC-specific
22*54fd6939SJiyong ParkNXP_WDOG_RESTART	:= yes
23*54fd6939SJiyong Park
24*54fd6939SJiyong Park
25*54fd6939SJiyong Park # Selecting dependent module,
26*54fd6939SJiyong Park # Selecting dependent drivers, and
27*54fd6939SJiyong Park # Adding defines.
28*54fd6939SJiyong Park
29*54fd6939SJiyong Park # for features enabled above.
30*54fd6939SJiyong Parkifeq (${NXP_WDOG_RESTART}, yes)
31*54fd6939SJiyong ParkNXP_NV_SW_MAINT_LAST_EXEC_DATA := yes
32*54fd6939SJiyong ParkLS_EL3_INTERRUPT_HANDLER := yes
33*54fd6939SJiyong Park$(eval $(call add_define, NXP_WDOG_RESTART))
34*54fd6939SJiyong Parkendif
35*54fd6939SJiyong Park
36*54fd6939SJiyong Park
37*54fd6939SJiyong Park # For Security Features
38*54fd6939SJiyong ParkDISABLE_FUSE_WRITE	:= 1
39*54fd6939SJiyong Parkifeq (${TRUSTED_BOARD_BOOT}, 1)
40*54fd6939SJiyong Parkifeq (${GENERATE_COT},1)
41*54fd6939SJiyong Park# Save Keys to be used by DDR FIP image
42*54fd6939SJiyong ParkSAVE_KEYS=1
43*54fd6939SJiyong Parkendif
44*54fd6939SJiyong Park$(eval $(call SET_NXP_MAKE_FLAG,SMMU_NEEDED,BL2))
45*54fd6939SJiyong Park$(eval $(call SET_NXP_MAKE_FLAG,SFP_NEEDED,BL2))
46*54fd6939SJiyong Park$(eval $(call SET_NXP_MAKE_FLAG,SNVS_NEEDED,BL2))
47*54fd6939SJiyong Park# Used by create_pbl tool to
48*54fd6939SJiyong Park# create bl2_<boot_mode>_sec.pbl image
49*54fd6939SJiyong ParkSECURE_BOOT	:= yes
50*54fd6939SJiyong Parkendif
51*54fd6939SJiyong Park$(eval $(call SET_NXP_MAKE_FLAG,CRYPTO_NEEDED,BL_COMM))
52*54fd6939SJiyong Park
53*54fd6939SJiyong Park
54*54fd6939SJiyong Park # Selecting Drivers for SoC
55*54fd6939SJiyong Park$(eval $(call SET_NXP_MAKE_FLAG,DCFG_NEEDED,BL_COMM))
56*54fd6939SJiyong Park$(eval $(call SET_NXP_MAKE_FLAG,TIMER_NEEDED,BL_COMM))
57*54fd6939SJiyong Park$(eval $(call SET_NXP_MAKE_FLAG,INTERCONNECT_NEEDED,BL_COMM))
58*54fd6939SJiyong Park$(eval $(call SET_NXP_MAKE_FLAG,GIC_NEEDED,BL31))
59*54fd6939SJiyong Park$(eval $(call SET_NXP_MAKE_FLAG,CONSOLE_NEEDED,BL_COMM))
60*54fd6939SJiyong Park$(eval $(call SET_NXP_MAKE_FLAG,PMU_NEEDED,BL_COMM))
61*54fd6939SJiyong Park
62*54fd6939SJiyong Park$(eval $(call SET_NXP_MAKE_FLAG,DDR_DRIVER_NEEDED,BL2))
63*54fd6939SJiyong Park$(eval $(call SET_NXP_MAKE_FLAG,TZASC_NEEDED,BL2))
64*54fd6939SJiyong Park$(eval $(call SET_NXP_MAKE_FLAG,I2C_NEEDED,BL2))
65*54fd6939SJiyong Park$(eval $(call SET_NXP_MAKE_FLAG,IMG_LOADR_NEEDED,BL2))
66*54fd6939SJiyong Park
67*54fd6939SJiyong Park
68*54fd6939SJiyong Park # Selecting PSCI & SIP_SVC support
69*54fd6939SJiyong Park$(eval $(call SET_NXP_MAKE_FLAG,PSCI_NEEDED,BL31))
70*54fd6939SJiyong Park$(eval $(call SET_NXP_MAKE_FLAG,SIPSVC_NEEDED,BL31))
71*54fd6939SJiyong Park
72*54fd6939SJiyong Park
73*54fd6939SJiyong Park # Selecting Boot Source for the TFA images.
74*54fd6939SJiyong Parkifeq (${BOOT_MODE}, flexspi_nor)
75*54fd6939SJiyong Park$(eval $(call SET_NXP_MAKE_FLAG,XSPI_NEEDED,BL2))
76*54fd6939SJiyong Park$(eval $(call add_define,FLEXSPI_NOR_BOOT))
77*54fd6939SJiyong Parkelse
78*54fd6939SJiyong Parkifeq (${BOOT_MODE}, sd)
79*54fd6939SJiyong Park$(eval $(call SET_NXP_MAKE_FLAG,SD_MMC_NEEDED,BL2))
80*54fd6939SJiyong Park$(eval $(call add_define,SD_BOOT))
81*54fd6939SJiyong Parkelse
82*54fd6939SJiyong Parkifeq (${BOOT_MODE}, emmc)
83*54fd6939SJiyong Park$(eval $(call SET_NXP_MAKE_FLAG,SD_MMC_NEEDED,BL2))
84*54fd6939SJiyong Park$(eval $(call add_define,EMMC_BOOT))
85*54fd6939SJiyong Parkelse
86*54fd6939SJiyong Park$(error Un-supported Boot Mode = ${BOOT_MODE})
87*54fd6939SJiyong Parkendif
88*54fd6939SJiyong Parkendif
89*54fd6939SJiyong Parkendif
90*54fd6939SJiyong Park
91*54fd6939SJiyong Park
92*54fd6939SJiyong Park # Separate DDR-FIP image to be loaded.
93*54fd6939SJiyong Park$(eval $(call SET_NXP_MAKE_FLAG,DDR_FIP_IO_NEEDED,BL2))
94*54fd6939SJiyong Park
95*54fd6939SJiyong Park
96*54fd6939SJiyong Park# Source File Addition
97*54fd6939SJiyong Park# #####################
98*54fd6939SJiyong Park
99*54fd6939SJiyong ParkPLAT_INCLUDES		+=	-I${PLAT_COMMON_PATH}/include/default\
100*54fd6939SJiyong Park				-I${BOARD_PATH}\
101*54fd6939SJiyong Park				-I${PLAT_COMMON_PATH}/include/default/ch_${CHASSIS}\
102*54fd6939SJiyong Park				-I${PLAT_SOC_PATH}/include\
103*54fd6939SJiyong Park				-I${PLAT_COMMON_PATH}/soc_errata
104*54fd6939SJiyong Park
105*54fd6939SJiyong Parkifeq (${SECURE_BOOT},yes)
106*54fd6939SJiyong Parkinclude ${PLAT_COMMON_PATH}/tbbr/tbbr.mk
107*54fd6939SJiyong Parkendif
108*54fd6939SJiyong Park
109*54fd6939SJiyong Parkifeq ($(WARM_BOOT),yes)
110*54fd6939SJiyong Parkinclude ${PLAT_COMMON_PATH}/warm_reset/warm_reset.mk
111*54fd6939SJiyong Parkendif
112*54fd6939SJiyong Park
113*54fd6939SJiyong Parkifeq (${NXP_NV_SW_MAINT_LAST_EXEC_DATA}, yes)
114*54fd6939SJiyong Parkinclude ${PLAT_COMMON_PATH}/nv_storage/nv_storage.mk
115*54fd6939SJiyong Parkendif
116*54fd6939SJiyong Park
117*54fd6939SJiyong Parkifeq (${PSCI_NEEDED}, yes)
118*54fd6939SJiyong Parkinclude ${PLAT_COMMON_PATH}/psci/psci.mk
119*54fd6939SJiyong Parkendif
120*54fd6939SJiyong Park
121*54fd6939SJiyong Parkifeq (${SIPSVC_NEEDED}, yes)
122*54fd6939SJiyong Parkinclude ${PLAT_COMMON_PATH}/sip_svc/sipsvc.mk
123*54fd6939SJiyong Parkendif
124*54fd6939SJiyong Park
125*54fd6939SJiyong Parkifeq (${DDR_FIP_IO_NEEDED}, yes)
126*54fd6939SJiyong Parkinclude ${PLAT_COMMON_PATH}/fip_handler/ddr_fip/ddr_fip_io.mk
127*54fd6939SJiyong Parkendif
128*54fd6939SJiyong Park
129*54fd6939SJiyong Park # for fuse-fip & fuse-programming
130*54fd6939SJiyong Parkifeq (${FUSE_PROG}, 1)
131*54fd6939SJiyong Parkinclude ${PLAT_COMMON_PATH}/fip_handler/fuse_fip/fuse.mk
132*54fd6939SJiyong Parkendif
133*54fd6939SJiyong Park
134*54fd6939SJiyong Parkifeq (${IMG_LOADR_NEEDED},yes)
135*54fd6939SJiyong Parkinclude $(PLAT_COMMON_PATH)/img_loadr/img_loadr.mk
136*54fd6939SJiyong Parkendif
137*54fd6939SJiyong Park
138*54fd6939SJiyong Park # Adding source files for the above selected drivers.
139*54fd6939SJiyong Parkinclude ${PLAT_DRIVERS_PATH}/drivers.mk
140*54fd6939SJiyong Park
141*54fd6939SJiyong Park # Adding SoC specific files
142*54fd6939SJiyong Parkinclude ${PLAT_COMMON_PATH}/soc_errata/errata.mk
143*54fd6939SJiyong Park
144*54fd6939SJiyong ParkPLAT_INCLUDES		+=	${NV_STORAGE_INCLUDES}\
145*54fd6939SJiyong Park				${WARM_RST_INCLUDES}
146*54fd6939SJiyong Park
147*54fd6939SJiyong ParkBL31_SOURCES		+=	${PLAT_SOC_PATH}/$(ARCH)/${SOC}.S\
148*54fd6939SJiyong Park				${WARM_RST_BL31_SOURCES}\
149*54fd6939SJiyong Park				${PSCI_SOURCES}\
150*54fd6939SJiyong Park				${SIPSVC_SOURCES}\
151*54fd6939SJiyong Park				${PLAT_COMMON_PATH}/$(ARCH)/bl31_data.S
152*54fd6939SJiyong Park
153*54fd6939SJiyong ParkPLAT_BL_COMMON_SOURCES	+=	${PLAT_COMMON_PATH}/$(ARCH)/ls_helpers.S\
154*54fd6939SJiyong Park				${PLAT_SOC_PATH}/aarch64/${SOC}_helpers.S\
155*54fd6939SJiyong Park				${NV_STORAGE_SOURCES}\
156*54fd6939SJiyong Park				${WARM_RST_BL_COMM_SOURCES}\
157*54fd6939SJiyong Park				${PLAT_SOC_PATH}/soc.c
158*54fd6939SJiyong Park
159*54fd6939SJiyong Parkifeq (${TEST_BL31}, 1)
160*54fd6939SJiyong ParkBL31_SOURCES		+=	${PLAT_SOC_PATH}/$(ARCH)/bootmain64.S\
161*54fd6939SJiyong Park				${PLAT_SOC_PATH}/$(ARCH)/nonboot64.S
162*54fd6939SJiyong Parkendif
163*54fd6939SJiyong Park
164*54fd6939SJiyong ParkBL2_SOURCES		+=	${DDR_CNTLR_SOURCES}\
165*54fd6939SJiyong Park				${TBBR_SOURCES}\
166*54fd6939SJiyong Park				${FUSE_SOURCES}
167*54fd6939SJiyong Park
168*54fd6939SJiyong Park
169*54fd6939SJiyong Park # Adding TFA setup files
170*54fd6939SJiyong Parkinclude ${PLAT_PATH}/common/setup/common.mk
171*54fd6939SJiyong Park
172*54fd6939SJiyong Park
173*54fd6939SJiyong Park # Adding source files to generate separate DDR FIP image
174*54fd6939SJiyong Parkinclude ${PLAT_SOC_PATH}/ddr_fip.mk
175