1*54fd6939SJiyong Park# 2*54fd6939SJiyong Park# Copyright 2018-2021 NXP 3*54fd6939SJiyong Park# 4*54fd6939SJiyong Park# SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park# 6*54fd6939SJiyong Park# 7*54fd6939SJiyong Park 8*54fd6939SJiyong Park############################################################################### 9*54fd6939SJiyong Park# Flow begins in BL2 at EL3 mode 10*54fd6939SJiyong ParkBL2_AT_EL3 := 1 11*54fd6939SJiyong Park 12*54fd6939SJiyong Park# Though one core is powered up by default, there are 13*54fd6939SJiyong Park# platform specific ways to release more than one core 14*54fd6939SJiyong ParkCOLD_BOOT_SINGLE_CPU := 0 15*54fd6939SJiyong Park 16*54fd6939SJiyong ParkPROGRAMMABLE_RESET_ADDRESS := 1 17*54fd6939SJiyong Park 18*54fd6939SJiyong ParkUSE_COHERENT_MEM := 0 19*54fd6939SJiyong Park 20*54fd6939SJiyong Park# Use generic OID definition (tbbr_oid.h) 21*54fd6939SJiyong ParkUSE_TBBR_DEFS := 1 22*54fd6939SJiyong Park 23*54fd6939SJiyong ParkPLAT_XLAT_TABLES_DYNAMIC := 0 24*54fd6939SJiyong Park 25*54fd6939SJiyong ParkENABLE_SVE_FOR_NS := 0 26*54fd6939SJiyong Park 27*54fd6939SJiyong ParkENABLE_STACK_PROTECTOR := 0 28*54fd6939SJiyong Park 29*54fd6939SJiyong ParkERROR_DEPRECATED := 0 30*54fd6939SJiyong Park 31*54fd6939SJiyong ParkLS_DISABLE_TRUSTED_WDOG := 1 32*54fd6939SJiyong Park 33*54fd6939SJiyong Park# On ARM platforms, separate the code and read-only data sections to allow 34*54fd6939SJiyong Park# mapping the former as executable and the latter as execute-never. 35*54fd6939SJiyong ParkSEPARATE_CODE_AND_RODATA := 1 36*54fd6939SJiyong Park 37*54fd6939SJiyong Park# Enable new version of image loading on ARM platforms 38*54fd6939SJiyong ParkLOAD_IMAGE_V2 := 1 39*54fd6939SJiyong Park 40*54fd6939SJiyong ParkRCW := "" 41*54fd6939SJiyong Park 42*54fd6939SJiyong Parkifneq (${SPD},none) 43*54fd6939SJiyong Park$(eval $(call add_define, NXP_LOAD_BL32)) 44*54fd6939SJiyong Parkendif 45*54fd6939SJiyong Park 46*54fd6939SJiyong Park############################################################################### 47*54fd6939SJiyong Park 48*54fd6939SJiyong ParkPLAT_TOOL_PATH := tools/nxp 49*54fd6939SJiyong ParkCREATE_PBL_TOOL_PATH := ${PLAT_TOOL_PATH}/create_pbl 50*54fd6939SJiyong ParkPLAT_SETUP_PATH := ${PLAT_PATH}/common/setup 51*54fd6939SJiyong Park 52*54fd6939SJiyong ParkPLAT_INCLUDES += -I${PLAT_SETUP_PATH}/include \ 53*54fd6939SJiyong Park -Iinclude/plat/arm/common \ 54*54fd6939SJiyong Park -Iinclude/drivers/arm \ 55*54fd6939SJiyong Park -Iinclude/lib \ 56*54fd6939SJiyong Park -Iinclude/drivers/io \ 57*54fd6939SJiyong Park -Ilib/psci 58*54fd6939SJiyong Park 59*54fd6939SJiyong Park# Required without TBBR. 60*54fd6939SJiyong Park# To include the defines for DDR PHY Images. 61*54fd6939SJiyong ParkPLAT_INCLUDES += -Iinclude/common/tbbr 62*54fd6939SJiyong Park 63*54fd6939SJiyong Parkinclude ${PLAT_SETUP_PATH}/core.mk 64*54fd6939SJiyong ParkPLAT_BL_COMMON_SOURCES += ${CPU_LIBS} \ 65*54fd6939SJiyong Park plat/nxp/common/setup/ls_err.c \ 66*54fd6939SJiyong Park plat/nxp/common/setup/ls_common.c 67*54fd6939SJiyong Park 68*54fd6939SJiyong Parkifneq (${ENABLE_STACK_PROTECTOR},0) 69*54fd6939SJiyong ParkPLAT_BL_COMMON_SOURCES += ${PLAT_SETUP_PATH}/ls_stack_protector.c 70*54fd6939SJiyong Parkendif 71*54fd6939SJiyong Park 72*54fd6939SJiyong Parkinclude lib/xlat_tables_v2/xlat_tables.mk 73*54fd6939SJiyong Park 74*54fd6939SJiyong ParkPLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 75*54fd6939SJiyong Park 76*54fd6939SJiyong ParkBL2_SOURCES += drivers/io/io_fip.c \ 77*54fd6939SJiyong Park drivers/io/io_memmap.c \ 78*54fd6939SJiyong Park drivers/io/io_storage.c \ 79*54fd6939SJiyong Park common/desc_image_load.c \ 80*54fd6939SJiyong Park plat/nxp/common/setup/ls_image_load.c \ 81*54fd6939SJiyong Park plat/nxp/common/setup/ls_io_storage.c \ 82*54fd6939SJiyong Park plat/nxp/common/setup/ls_bl2_el3_setup.c \ 83*54fd6939SJiyong Park plat/nxp/common/setup/${ARCH}/ls_bl2_mem_params_desc.c 84*54fd6939SJiyong Park 85*54fd6939SJiyong ParkBL31_SOURCES += plat/nxp/common/setup/ls_bl31_setup.c \ 86*54fd6939SJiyong Park 87*54fd6939SJiyong Parkifeq (${LS_EL3_INTERRUPT_HANDLER}, yes) 88*54fd6939SJiyong Park$(eval $(call add_define, LS_EL3_INTERRUPT_HANDLER)) 89*54fd6939SJiyong ParkBL31_SOURCES += plat/nxp/common/setup/ls_interrupt_mgmt.c 90*54fd6939SJiyong Parkendif 91*54fd6939SJiyong Park 92*54fd6939SJiyong Parkifeq (${TEST_BL31}, 1) 93*54fd6939SJiyong ParkBL31_SOURCES += ${TEST_SOURCES} 94*54fd6939SJiyong Parkendif 95*54fd6939SJiyong Park 96*54fd6939SJiyong Park# Verify build config 97*54fd6939SJiyong Park# ------------------- 98*54fd6939SJiyong Park 99*54fd6939SJiyong Parkifneq (${LOAD_IMAGE_V2}, 1) 100*54fd6939SJiyong Park $(error Error: Layerscape needs LOAD_IMAGE_V2=1) 101*54fd6939SJiyong Parkelse 102*54fd6939SJiyong Park$(eval $(call add_define,LOAD_IMAGE_V2)) 103*54fd6939SJiyong Parkendif 104*54fd6939SJiyong Park 105*54fd6939SJiyong Parkinclude $(CREATE_PBL_TOOL_PATH)/create_pbl.mk 106