1*54fd6939SJiyong Park# 2*54fd6939SJiyong Park# Copyright (c) 2021, MediaTek Inc. All rights reserved. 3*54fd6939SJiyong Park# 4*54fd6939SJiyong Park# SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park# 6*54fd6939SJiyong Park 7*54fd6939SJiyong ParkMTK_PLAT := plat/mediatek 8*54fd6939SJiyong ParkMTK_PLAT_SOC := ${MTK_PLAT}/${PLAT} 9*54fd6939SJiyong Park 10*54fd6939SJiyong ParkPLAT_INCLUDES := -I${MTK_PLAT}/common/ \ 11*54fd6939SJiyong Park -I${MTK_PLAT}/common/drivers/gic600/ \ 12*54fd6939SJiyong Park -I${MTK_PLAT}/common/drivers/gpio/ \ 13*54fd6939SJiyong Park -I${MTK_PLAT}/common/drivers/rtc/ \ 14*54fd6939SJiyong Park -I${MTK_PLAT}/common/drivers/timer/ \ 15*54fd6939SJiyong Park -I${MTK_PLAT}/common/drivers/uart/ \ 16*54fd6939SJiyong Park -I${MTK_PLAT}/common/lpm/ \ 17*54fd6939SJiyong Park -I${MTK_PLAT_SOC}/drivers/dcm \ 18*54fd6939SJiyong Park -I${MTK_PLAT_SOC}/drivers/dfd \ 19*54fd6939SJiyong Park -I${MTK_PLAT_SOC}/drivers/dp/ \ 20*54fd6939SJiyong Park -I${MTK_PLAT_SOC}/drivers/emi_mpu/ \ 21*54fd6939SJiyong Park -I${MTK_PLAT_SOC}/drivers/gpio/ \ 22*54fd6939SJiyong Park -I${MTK_PLAT_SOC}/drivers/mcdi/ \ 23*54fd6939SJiyong Park -I${MTK_PLAT_SOC}/drivers/pmic/ \ 24*54fd6939SJiyong Park -I${MTK_PLAT_SOC}/drivers/spmc/ \ 25*54fd6939SJiyong Park -I${MTK_PLAT_SOC}/drivers/ptp3/ \ 26*54fd6939SJiyong Park -I${MTK_PLAT_SOC}/include/ 27*54fd6939SJiyong Park 28*54fd6939SJiyong ParkGICV3_SUPPORT_GIC600 := 1 29*54fd6939SJiyong Parkinclude drivers/arm/gic/v3/gicv3.mk 30*54fd6939SJiyong Parkinclude lib/xlat_tables_v2/xlat_tables.mk 31*54fd6939SJiyong Park 32*54fd6939SJiyong ParkPLAT_BL_COMMON_SOURCES := ${GICV3_SOURCES} \ 33*54fd6939SJiyong Park ${XLAT_TABLES_LIB_SRCS} \ 34*54fd6939SJiyong Park plat/common/aarch64/crash_console_helpers.S \ 35*54fd6939SJiyong Park plat/common/plat_psci_common.c 36*54fd6939SJiyong Park 37*54fd6939SJiyong Park 38*54fd6939SJiyong ParkBL31_SOURCES += common/desc_image_load.c \ 39*54fd6939SJiyong Park drivers/delay_timer/delay_timer.c \ 40*54fd6939SJiyong Park drivers/gpio/gpio.c \ 41*54fd6939SJiyong Park drivers/delay_timer/generic_delay_timer.c \ 42*54fd6939SJiyong Park drivers/ti/uart/aarch64/16550_console.S \ 43*54fd6939SJiyong Park lib/bl_aux_params/bl_aux_params.c \ 44*54fd6939SJiyong Park lib/cpus/aarch64/cortex_a55.S \ 45*54fd6939SJiyong Park lib/cpus/aarch64/cortex_a78.S \ 46*54fd6939SJiyong Park plat/common/plat_gicv3.c \ 47*54fd6939SJiyong Park ${MTK_PLAT}/common/drivers/gic600/mt_gic_v3.c \ 48*54fd6939SJiyong Park ${MTK_PLAT}/common/drivers/gpio/mtgpio_common.c \ 49*54fd6939SJiyong Park ${MTK_PLAT}/common/drivers/pmic_wrap/pmic_wrap_init_v2.c \ 50*54fd6939SJiyong Park ${MTK_PLAT}/common/drivers/rtc/rtc_common.c \ 51*54fd6939SJiyong Park ${MTK_PLAT}/common/drivers/rtc/rtc_mt6359p.c \ 52*54fd6939SJiyong Park ${MTK_PLAT}/common/drivers/timer/mt_timer.c \ 53*54fd6939SJiyong Park ${MTK_PLAT}/common/drivers/uart/uart.c \ 54*54fd6939SJiyong Park ${MTK_PLAT}/common/lpm/mt_lp_rm.c \ 55*54fd6939SJiyong Park ${MTK_PLAT}/common/mtk_cirq.c \ 56*54fd6939SJiyong Park ${MTK_PLAT}/common/mtk_plat_common.c \ 57*54fd6939SJiyong Park ${MTK_PLAT}/common/mtk_sip_svc.c \ 58*54fd6939SJiyong Park ${MTK_PLAT}/common/params_setup.c \ 59*54fd6939SJiyong Park ${MTK_PLAT_SOC}/aarch64/platform_common.c \ 60*54fd6939SJiyong Park ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \ 61*54fd6939SJiyong Park ${MTK_PLAT_SOC}/bl31_plat_setup.c \ 62*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/dcm/mtk_dcm.c \ 63*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/dcm/mtk_dcm_utils.c \ 64*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/dfd/plat_dfd.c \ 65*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/dp/mt_dp.c \ 66*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/emi_mpu/emi_mpu.c \ 67*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/gpio/mtgpio.c \ 68*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm.c \ 69*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/mcdi/mt_cpu_pm_cpc.c \ 70*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/mcdi/mt_mcdi.c \ 71*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/mcdi/mt_lp_irqremain.c \ 72*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/gpio/mtgpio.c \ 73*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/pmic/pmic.c \ 74*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/ptp3/mtk_ptp3_main.c \ 75*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/spmc/mtspmc.c \ 76*54fd6939SJiyong Park ${MTK_PLAT_SOC}/plat_pm.c \ 77*54fd6939SJiyong Park ${MTK_PLAT_SOC}/plat_sip_calls.c \ 78*54fd6939SJiyong Park ${MTK_PLAT_SOC}/plat_topology.c 79*54fd6939SJiyong Park 80*54fd6939SJiyong Park# Build SPM drivers 81*54fd6939SJiyong Parkinclude ${MTK_PLAT_SOC}/drivers/spm/build.mk 82*54fd6939SJiyong Park 83*54fd6939SJiyong Park# Configs for A78 and A55 84*54fd6939SJiyong ParkHW_ASSISTED_COHERENCY := 1 85*54fd6939SJiyong ParkUSE_COHERENT_MEM := 0 86*54fd6939SJiyong ParkCTX_INCLUDE_AARCH32_REGS := 0 87*54fd6939SJiyong ParkERRATA_A55_1530923 := 1 88*54fd6939SJiyong Park 89*54fd6939SJiyong Park# indicate the reset vector address can be programmed 90*54fd6939SJiyong ParkPROGRAMMABLE_RESET_ADDRESS := 1 91*54fd6939SJiyong Park 92*54fd6939SJiyong ParkCOLD_BOOT_SINGLE_CPU := 1 93*54fd6939SJiyong Park 94*54fd6939SJiyong ParkMACH_MT8195 := 1 95*54fd6939SJiyong Park$(eval $(call add_define,MACH_MT8195)) 96*54fd6939SJiyong Park 97*54fd6939SJiyong Parkinclude lib/coreboot/coreboot.mk 98