1*54fd6939SJiyong Park /* 2*54fd6939SJiyong Park * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park /* Project Includes */ 8*54fd6939SJiyong Park #include <arch.h> 9*54fd6939SJiyong Park #include <arch_helpers.h> 10*54fd6939SJiyong Park #include <lib/psci/psci.h> 11*54fd6939SJiyong Park 12*54fd6939SJiyong Park /* Platform Includes */ 13*54fd6939SJiyong Park #include <plat_helpers.h> 14*54fd6939SJiyong Park #include <platform_def.h> 15*54fd6939SJiyong Park 16*54fd6939SJiyong Park const unsigned char mtk_power_domain_tree_desc[] = { 17*54fd6939SJiyong Park /* Number of root nodes */ 18*54fd6939SJiyong Park PLATFORM_SYSTEM_COUNT, 19*54fd6939SJiyong Park /* Number of children for the root node */ 20*54fd6939SJiyong Park PLATFORM_MCUSYS_COUNT, 21*54fd6939SJiyong Park /* Number of children for the mcusys node */ 22*54fd6939SJiyong Park PLATFORM_CLUSTER_COUNT, 23*54fd6939SJiyong Park /* Number of children for the first cluster node */ 24*54fd6939SJiyong Park PLATFORM_CLUSTER0_CORE_COUNT, 25*54fd6939SJiyong Park }; 26*54fd6939SJiyong Park 27*54fd6939SJiyong Park /******************************************************************************* 28*54fd6939SJiyong Park * This function returns the MT8192 default topology tree information. 29*54fd6939SJiyong Park ******************************************************************************/ plat_get_power_domain_tree_desc(void)30*54fd6939SJiyong Parkconst unsigned char *plat_get_power_domain_tree_desc(void) 31*54fd6939SJiyong Park { 32*54fd6939SJiyong Park return mtk_power_domain_tree_desc; 33*54fd6939SJiyong Park } 34*54fd6939SJiyong Park 35*54fd6939SJiyong Park /******************************************************************************* 36*54fd6939SJiyong Park * This function implements a part of the critical interface between the psci 37*54fd6939SJiyong Park * generic layer and the platform that allows the former to query the platform 38*54fd6939SJiyong Park * to convert an MPIDR to a unique linear index. An error code (-1) is returned 39*54fd6939SJiyong Park * in case the MPIDR is invalid. 40*54fd6939SJiyong Park ******************************************************************************/ plat_core_pos_by_mpidr(u_register_t mpidr)41*54fd6939SJiyong Parkint plat_core_pos_by_mpidr(u_register_t mpidr) 42*54fd6939SJiyong Park { 43*54fd6939SJiyong Park unsigned int cluster_id, cpu_id; 44*54fd6939SJiyong Park 45*54fd6939SJiyong Park if (read_mpidr() & MPIDR_MT_MASK) { 46*54fd6939SJiyong Park /* ARMv8.2 arch */ 47*54fd6939SJiyong Park if (mpidr & (MPIDR_AFFLVL_MASK << MPIDR_AFF0_SHIFT)) { 48*54fd6939SJiyong Park return -1; 49*54fd6939SJiyong Park } 50*54fd6939SJiyong Park return plat_mediatek_calc_core_pos(mpidr); 51*54fd6939SJiyong Park } 52*54fd6939SJiyong Park 53*54fd6939SJiyong Park mpidr &= MPIDR_AFFINITY_MASK; 54*54fd6939SJiyong Park 55*54fd6939SJiyong Park if (mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)) { 56*54fd6939SJiyong Park return -1; 57*54fd6939SJiyong Park } 58*54fd6939SJiyong Park 59*54fd6939SJiyong Park cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; 60*54fd6939SJiyong Park cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; 61*54fd6939SJiyong Park 62*54fd6939SJiyong Park if (cluster_id >= PLATFORM_CLUSTER_COUNT) { 63*54fd6939SJiyong Park return -1; 64*54fd6939SJiyong Park } 65*54fd6939SJiyong Park 66*54fd6939SJiyong Park /* 67*54fd6939SJiyong Park * Validate cpu_id by checking whether it represents a CPU in 68*54fd6939SJiyong Park * one of the two clusters present on the platform. 69*54fd6939SJiyong Park */ 70*54fd6939SJiyong Park if (cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER) { 71*54fd6939SJiyong Park return -1; 72*54fd6939SJiyong Park } 73*54fd6939SJiyong Park 74*54fd6939SJiyong Park return (cpu_id + (cluster_id * 8)); 75*54fd6939SJiyong Park } 76