1*54fd6939SJiyong Park /* 2*54fd6939SJiyong Park * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park #include <arch.h> 8*54fd6939SJiyong Park #include <assert.h> 9*54fd6939SJiyong Park #include <common/debug.h> 10*54fd6939SJiyong Park #include <lib/mmio.h> 11*54fd6939SJiyong Park #include <mcucfg.h> 12*54fd6939SJiyong Park #include <stdio.h> 13*54fd6939SJiyong Park #include <stdlib.h> 14*54fd6939SJiyong Park #include <string.h> 15*54fd6939SJiyong Park disable_scu(u_register_t mpidr)16*54fd6939SJiyong Parkvoid disable_scu(u_register_t mpidr) 17*54fd6939SJiyong Park { 18*54fd6939SJiyong Park uintptr_t axi_config = 0; 19*54fd6939SJiyong Park uint32_t axi_value; 20*54fd6939SJiyong Park 21*54fd6939SJiyong Park switch (mpidr & MPIDR_CLUSTER_MASK) { 22*54fd6939SJiyong Park case 0x000: 23*54fd6939SJiyong Park axi_config = (uintptr_t)&mt8183_mcucfg->mp0_axi_config; 24*54fd6939SJiyong Park axi_value = MP0_ACINACTM; 25*54fd6939SJiyong Park break; 26*54fd6939SJiyong Park case 0x100: 27*54fd6939SJiyong Park axi_config = (uintptr_t)&mt8183_mcucfg->mp2_axi_config; 28*54fd6939SJiyong Park axi_value = MP2_ACINACTM; 29*54fd6939SJiyong Park break; 30*54fd6939SJiyong Park default: 31*54fd6939SJiyong Park ERROR("%s: mpidr does not exist\n", __func__); 32*54fd6939SJiyong Park panic(); 33*54fd6939SJiyong Park } 34*54fd6939SJiyong Park mmio_setbits_32(axi_config, axi_value); 35*54fd6939SJiyong Park } 36*54fd6939SJiyong Park enable_scu(u_register_t mpidr)37*54fd6939SJiyong Parkvoid enable_scu(u_register_t mpidr) 38*54fd6939SJiyong Park { 39*54fd6939SJiyong Park uintptr_t axi_config = 0; 40*54fd6939SJiyong Park uint32_t axi_value; 41*54fd6939SJiyong Park 42*54fd6939SJiyong Park switch (mpidr & MPIDR_CLUSTER_MASK) { 43*54fd6939SJiyong Park case 0x000: 44*54fd6939SJiyong Park axi_config = (uintptr_t)&mt8183_mcucfg->mp0_axi_config; 45*54fd6939SJiyong Park axi_value = MP0_ACINACTM; 46*54fd6939SJiyong Park break; 47*54fd6939SJiyong Park case 0x100: 48*54fd6939SJiyong Park axi_config = (uintptr_t)&mt8183_mcucfg->mp2_axi_config; 49*54fd6939SJiyong Park axi_value = MP2_ACINACTM; 50*54fd6939SJiyong Park break; 51*54fd6939SJiyong Park default: 52*54fd6939SJiyong Park ERROR("%s: mpidr does not exist\n", __func__); 53*54fd6939SJiyong Park panic(); 54*54fd6939SJiyong Park } 55*54fd6939SJiyong Park mmio_clrbits_32(axi_config, axi_value); 56*54fd6939SJiyong Park } 57