1*54fd6939SJiyong Park /* 2*54fd6939SJiyong Park * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park * 4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park */ 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park #include <arch.h> 8*54fd6939SJiyong Park #include <platform_def.h> 9*54fd6939SJiyong Park #include <lib/psci/psci.h> 10*54fd6939SJiyong Park 11*54fd6939SJiyong Park const unsigned char mtk_power_domain_tree_desc[] = { 12*54fd6939SJiyong Park /* Number of root nodes */ 13*54fd6939SJiyong Park PLATFORM_SYSTEM_COUNT, 14*54fd6939SJiyong Park /* Number of children for the root node */ 15*54fd6939SJiyong Park PLATFORM_CLUSTER_COUNT, 16*54fd6939SJiyong Park /* Number of children for the first cluster node */ 17*54fd6939SJiyong Park PLATFORM_CLUSTER0_CORE_COUNT, 18*54fd6939SJiyong Park /* Number of children for the second cluster node */ 19*54fd6939SJiyong Park PLATFORM_CLUSTER1_CORE_COUNT 20*54fd6939SJiyong Park }; 21*54fd6939SJiyong Park 22*54fd6939SJiyong Park /******************************************************************************* 23*54fd6939SJiyong Park * This function returns the MT8173 default topology tree information. 24*54fd6939SJiyong Park ******************************************************************************/ plat_get_power_domain_tree_desc(void)25*54fd6939SJiyong Parkconst unsigned char *plat_get_power_domain_tree_desc(void) 26*54fd6939SJiyong Park { 27*54fd6939SJiyong Park return mtk_power_domain_tree_desc; 28*54fd6939SJiyong Park } 29*54fd6939SJiyong Park 30*54fd6939SJiyong Park /******************************************************************************* 31*54fd6939SJiyong Park * This function implements a part of the critical interface between the psci 32*54fd6939SJiyong Park * generic layer and the platform that allows the former to query the platform 33*54fd6939SJiyong Park * to convert an MPIDR to a unique linear index. An error code (-1) is returned 34*54fd6939SJiyong Park * in case the MPIDR is invalid. 35*54fd6939SJiyong Park ******************************************************************************/ plat_core_pos_by_mpidr(u_register_t mpidr)36*54fd6939SJiyong Parkint plat_core_pos_by_mpidr(u_register_t mpidr) 37*54fd6939SJiyong Park { 38*54fd6939SJiyong Park unsigned int cluster_id, cpu_id; 39*54fd6939SJiyong Park 40*54fd6939SJiyong Park mpidr &= MPIDR_AFFINITY_MASK; 41*54fd6939SJiyong Park 42*54fd6939SJiyong Park if (mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)) 43*54fd6939SJiyong Park return -1; 44*54fd6939SJiyong Park 45*54fd6939SJiyong Park cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK; 46*54fd6939SJiyong Park cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK; 47*54fd6939SJiyong Park 48*54fd6939SJiyong Park if (cluster_id >= PLATFORM_CLUSTER_COUNT) 49*54fd6939SJiyong Park return -1; 50*54fd6939SJiyong Park 51*54fd6939SJiyong Park /* 52*54fd6939SJiyong Park * Validate cpu_id by checking whether it represents a CPU in 53*54fd6939SJiyong Park * one of the two clusters present on the platform. 54*54fd6939SJiyong Park */ 55*54fd6939SJiyong Park if (cpu_id >= PLATFORM_MAX_CPUS_PER_CLUSTER) 56*54fd6939SJiyong Park return -1; 57*54fd6939SJiyong Park 58*54fd6939SJiyong Park return (cpu_id + (cluster_id * 4)); 59*54fd6939SJiyong Park } 60