1*54fd6939SJiyong Park /*
2*54fd6939SJiyong Park * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
3*54fd6939SJiyong Park *
4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause
5*54fd6939SJiyong Park */
6*54fd6939SJiyong Park
7*54fd6939SJiyong Park #include <arch_helpers.h>
8*54fd6939SJiyong Park #include <common/debug.h>
9*54fd6939SJiyong Park #include <lib/mmio.h>
10*54fd6939SJiyong Park #include <plat_debug.h>
11*54fd6939SJiyong Park #include <platform_def.h>
12*54fd6939SJiyong Park #include <spm.h>
13*54fd6939SJiyong Park
circular_buffer_setup(void)14*54fd6939SJiyong Park void circular_buffer_setup(void)
15*54fd6939SJiyong Park {
16*54fd6939SJiyong Park /* Clear DBG_CONTROL.lastpc_disable to enable circular buffer */
17*54fd6939SJiyong Park sync_writel(CA15M_DBG_CONTROL,
18*54fd6939SJiyong Park mmio_read_32(CA15M_DBG_CONTROL) & ~(BIT_CA15M_LASTPC_DIS));
19*54fd6939SJiyong Park }
20*54fd6939SJiyong Park
circular_buffer_unlock(void)21*54fd6939SJiyong Park void circular_buffer_unlock(void)
22*54fd6939SJiyong Park {
23*54fd6939SJiyong Park unsigned int i;
24*54fd6939SJiyong Park
25*54fd6939SJiyong Park /* Disable big vproc external off (set CPU_EXT_BUCK_ISO to 0x0) */
26*54fd6939SJiyong Park sync_writel(VPROC_EXT_CTL, mmio_read_32(VPROC_EXT_CTL) & ~(0x1 << 1));
27*54fd6939SJiyong Park
28*54fd6939SJiyong Park /* Release vproc apb mask (set 0x0C53_2008[1] to 0x0) */
29*54fd6939SJiyong Park sync_writel(CA15M_PWR_RST_CTL, mmio_read_32(CA15M_PWR_RST_CTL) & ~(0x1 << 1));
30*54fd6939SJiyong Park
31*54fd6939SJiyong Park for (i = 1; i <= 4; ++i)
32*54fd6939SJiyong Park sync_writel(MP1_CPUTOP_PWR_CON + i * 4,
33*54fd6939SJiyong Park (mmio_read_32(MP1_CPUTOP_PWR_CON + i * 4) & ~(0x4))|(0x4));
34*54fd6939SJiyong Park
35*54fd6939SJiyong Park /* Set DFD.en */
36*54fd6939SJiyong Park sync_writel(DFD_INTERNAL_CTL, 0x1);
37*54fd6939SJiyong Park }
38*54fd6939SJiyong Park
circular_buffer_lock(void)39*54fd6939SJiyong Park void circular_buffer_lock(void)
40*54fd6939SJiyong Park {
41*54fd6939SJiyong Park /* Clear DFD.en */
42*54fd6939SJiyong Park sync_writel(DFD_INTERNAL_CTL, 0x0);
43*54fd6939SJiyong Park }
44*54fd6939SJiyong Park
clear_all_on_mux(void)45*54fd6939SJiyong Park void clear_all_on_mux(void)
46*54fd6939SJiyong Park {
47*54fd6939SJiyong Park sync_writel(MCU_ALL_PWR_ON_CTRL,
48*54fd6939SJiyong Park mmio_read_32(MCU_ALL_PWR_ON_CTRL) & ~(1 << 2));
49*54fd6939SJiyong Park sync_writel(MCU_ALL_PWR_ON_CTRL,
50*54fd6939SJiyong Park mmio_read_32(MCU_ALL_PWR_ON_CTRL) & ~(1 << 1));
51*54fd6939SJiyong Park }
52*54fd6939SJiyong Park
l2c_parity_check_setup(void)53*54fd6939SJiyong Park void l2c_parity_check_setup(void)
54*54fd6939SJiyong Park {
55*54fd6939SJiyong Park /* Enable DBG_CONTROL.l2parity_en */
56*54fd6939SJiyong Park sync_writel(CA15M_DBG_CONTROL,
57*54fd6939SJiyong Park mmio_read_32(CA15M_DBG_CONTROL) | BIT_CA15M_L2PARITY_EN);
58*54fd6939SJiyong Park }
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