xref: /aosp_15_r20/external/arm-trusted-firmware/plat/mediatek/mt8173/scu.c (revision 54fd6939e177f8ff529b10183254802c76df6d08) 
1*54fd6939SJiyong Park /*
2*54fd6939SJiyong Park  * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3*54fd6939SJiyong Park  *
4*54fd6939SJiyong Park  * SPDX-License-Identifier: BSD-3-Clause
5*54fd6939SJiyong Park  */
6*54fd6939SJiyong Park 
7*54fd6939SJiyong Park #include <arch.h>
8*54fd6939SJiyong Park #include <lib/mmio.h>
9*54fd6939SJiyong Park 
10*54fd6939SJiyong Park #include <mcucfg.h>
11*54fd6939SJiyong Park 
disable_scu(unsigned long mpidr)12*54fd6939SJiyong Park void disable_scu(unsigned long mpidr)
13*54fd6939SJiyong Park {
14*54fd6939SJiyong Park 	if (mpidr & MPIDR_CLUSTER_MASK)
15*54fd6939SJiyong Park 		mmio_setbits_32((uintptr_t)&mt8173_mcucfg->mp1_miscdbg,
16*54fd6939SJiyong Park 			MP1_ACINACTM);
17*54fd6939SJiyong Park 	else
18*54fd6939SJiyong Park 		mmio_setbits_32((uintptr_t)&mt8173_mcucfg->mp0_axi_config,
19*54fd6939SJiyong Park 			MP0_ACINACTM);
20*54fd6939SJiyong Park }
21*54fd6939SJiyong Park 
enable_scu(unsigned long mpidr)22*54fd6939SJiyong Park void enable_scu(unsigned long mpidr)
23*54fd6939SJiyong Park {
24*54fd6939SJiyong Park 	if (mpidr & MPIDR_CLUSTER_MASK)
25*54fd6939SJiyong Park 		mmio_clrbits_32((uintptr_t)&mt8173_mcucfg->mp1_miscdbg,
26*54fd6939SJiyong Park 			MP1_ACINACTM);
27*54fd6939SJiyong Park 	else
28*54fd6939SJiyong Park 		mmio_clrbits_32((uintptr_t)&mt8173_mcucfg->mp0_axi_config,
29*54fd6939SJiyong Park 			MP0_ACINACTM);
30*54fd6939SJiyong Park }
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