1*54fd6939SJiyong Park /*
2*54fd6939SJiyong Park * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
3*54fd6939SJiyong Park *
4*54fd6939SJiyong Park * SPDX-License-Identifier: BSD-3-Clause
5*54fd6939SJiyong Park */
6*54fd6939SJiyong Park
7*54fd6939SJiyong Park #include <arch.h>
8*54fd6939SJiyong Park #include <common/debug.h>
9*54fd6939SJiyong Park
10*54fd6939SJiyong Park #include <power_tracer.h>
11*54fd6939SJiyong Park
12*54fd6939SJiyong Park #define trace_log(...) INFO("psci: " __VA_ARGS__)
13*54fd6939SJiyong Park
trace_power_flow(unsigned long mpidr,unsigned char mode)14*54fd6939SJiyong Park void trace_power_flow(unsigned long mpidr, unsigned char mode)
15*54fd6939SJiyong Park {
16*54fd6939SJiyong Park switch (mode) {
17*54fd6939SJiyong Park case CPU_UP:
18*54fd6939SJiyong Park trace_log("core %lld:%lld ON\n",
19*54fd6939SJiyong Park (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS,
20*54fd6939SJiyong Park (mpidr & MPIDR_CPU_MASK));
21*54fd6939SJiyong Park break;
22*54fd6939SJiyong Park case CPU_DOWN:
23*54fd6939SJiyong Park trace_log("core %lld:%lld OFF\n",
24*54fd6939SJiyong Park (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS,
25*54fd6939SJiyong Park (mpidr & MPIDR_CPU_MASK));
26*54fd6939SJiyong Park break;
27*54fd6939SJiyong Park case CPU_SUSPEND:
28*54fd6939SJiyong Park trace_log("core %lld:%lld SUSPEND\n",
29*54fd6939SJiyong Park (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS,
30*54fd6939SJiyong Park (mpidr & MPIDR_CPU_MASK));
31*54fd6939SJiyong Park break;
32*54fd6939SJiyong Park case CLUSTER_UP:
33*54fd6939SJiyong Park trace_log("cluster %lld ON\n",
34*54fd6939SJiyong Park (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS);
35*54fd6939SJiyong Park break;
36*54fd6939SJiyong Park case CLUSTER_DOWN:
37*54fd6939SJiyong Park trace_log("cluster %lld OFF\n",
38*54fd6939SJiyong Park (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS);
39*54fd6939SJiyong Park break;
40*54fd6939SJiyong Park case CLUSTER_SUSPEND:
41*54fd6939SJiyong Park trace_log("cluster %lld SUSPEND\n",
42*54fd6939SJiyong Park (mpidr & MPIDR_CLUSTER_MASK) >> MPIDR_AFFINITY_BITS);
43*54fd6939SJiyong Park break;
44*54fd6939SJiyong Park default:
45*54fd6939SJiyong Park trace_log("unknown power mode\n");
46*54fd6939SJiyong Park break;
47*54fd6939SJiyong Park }
48*54fd6939SJiyong Park }
49