1*54fd6939SJiyong Park# 2*54fd6939SJiyong Park# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park# 4*54fd6939SJiyong Park# SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park# 6*54fd6939SJiyong Park 7*54fd6939SJiyong ParkMTK_PLAT := plat/mediatek 8*54fd6939SJiyong ParkMTK_PLAT_SOC := ${MTK_PLAT}/${PLAT} 9*54fd6939SJiyong Park 10*54fd6939SJiyong ParkPLAT_INCLUDES := -I${MTK_PLAT}/common/ \ 11*54fd6939SJiyong Park -Iinclude/plat/arm/common/aarch64 \ 12*54fd6939SJiyong Park -I${MTK_PLAT_SOC}/drivers/crypt/ \ 13*54fd6939SJiyong Park -I${MTK_PLAT_SOC}/drivers/mtcmos/ \ 14*54fd6939SJiyong Park -I${MTK_PLAT_SOC}/drivers/pmic/ \ 15*54fd6939SJiyong Park -I${MTK_PLAT_SOC}/drivers/rtc/ \ 16*54fd6939SJiyong Park -I${MTK_PLAT_SOC}/drivers/spm/ \ 17*54fd6939SJiyong Park -I${MTK_PLAT_SOC}/drivers/timer/ \ 18*54fd6939SJiyong Park -I${MTK_PLAT_SOC}/drivers/wdt/ \ 19*54fd6939SJiyong Park -I${MTK_PLAT_SOC}/include/ 20*54fd6939SJiyong Park 21*54fd6939SJiyong ParkPLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \ 22*54fd6939SJiyong Park lib/xlat_tables/aarch64/xlat_tables.c \ 23*54fd6939SJiyong Park plat/arm/common/arm_gicv2.c \ 24*54fd6939SJiyong Park plat/common/plat_gicv2.c \ 25*54fd6939SJiyong Park plat/common/aarch64/crash_console_helpers.S 26*54fd6939SJiyong Park 27*54fd6939SJiyong ParkBL31_SOURCES += common/desc_image_load.c \ 28*54fd6939SJiyong Park drivers/arm/cci/cci.c \ 29*54fd6939SJiyong Park drivers/arm/gic/common/gic_common.c \ 30*54fd6939SJiyong Park drivers/arm/gic/v2/gicv2_main.c \ 31*54fd6939SJiyong Park drivers/arm/gic/v2/gicv2_helpers.c \ 32*54fd6939SJiyong Park drivers/delay_timer/delay_timer.c \ 33*54fd6939SJiyong Park drivers/delay_timer/generic_delay_timer.c \ 34*54fd6939SJiyong Park drivers/ti/uart/aarch64/16550_console.S \ 35*54fd6939SJiyong Park lib/cpus/aarch64/aem_generic.S \ 36*54fd6939SJiyong Park lib/cpus/aarch64/cortex_a53.S \ 37*54fd6939SJiyong Park lib/cpus/aarch64/cortex_a57.S \ 38*54fd6939SJiyong Park lib/cpus/aarch64/cortex_a72.S \ 39*54fd6939SJiyong Park ${MTK_PLAT}/common/drivers/pmic_wrap/pmic_wrap_init.c \ 40*54fd6939SJiyong Park ${MTK_PLAT}/common/drivers/rtc/rtc_common.c \ 41*54fd6939SJiyong Park ${MTK_PLAT}/common/mtk_plat_common.c \ 42*54fd6939SJiyong Park ${MTK_PLAT}/common/mtk_sip_svc.c \ 43*54fd6939SJiyong Park ${MTK_PLAT_SOC}/aarch64/plat_helpers.S \ 44*54fd6939SJiyong Park ${MTK_PLAT_SOC}/aarch64/platform_common.c \ 45*54fd6939SJiyong Park ${MTK_PLAT_SOC}/bl31_plat_setup.c \ 46*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/crypt/crypt.c \ 47*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/mtcmos/mtcmos.c \ 48*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/rtc/rtc.c \ 49*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/spm/spm.c \ 50*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/spm/spm_hotplug.c \ 51*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/spm/spm_mcdi.c \ 52*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/spm/spm_suspend.c \ 53*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/timer/mt_cpuxgpt.c \ 54*54fd6939SJiyong Park ${MTK_PLAT_SOC}/drivers/wdt/wdt.c \ 55*54fd6939SJiyong Park ${MTK_PLAT_SOC}/plat_pm.c \ 56*54fd6939SJiyong Park ${MTK_PLAT_SOC}/plat_sip_calls.c \ 57*54fd6939SJiyong Park ${MTK_PLAT_SOC}/plat_topology.c \ 58*54fd6939SJiyong Park ${MTK_PLAT_SOC}/power_tracer.c \ 59*54fd6939SJiyong Park ${MTK_PLAT_SOC}/scu.c 60*54fd6939SJiyong Park 61*54fd6939SJiyong Park# Enable workarounds for selected Cortex-A53 erratas. 62*54fd6939SJiyong ParkERRATA_A53_826319 := 1 63*54fd6939SJiyong ParkERRATA_A53_836870 := 1 64*54fd6939SJiyong ParkERRATA_A53_855873 := 1 65*54fd6939SJiyong Park 66*54fd6939SJiyong Park# indicate the reset vector address can be programmed 67*54fd6939SJiyong ParkPROGRAMMABLE_RESET_ADDRESS := 1 68*54fd6939SJiyong Park 69*54fd6939SJiyong Park$(eval $(call add_define,MTK_SIP_SET_AUTHORIZED_SECURE_REG_ENABLE)) 70*54fd6939SJiyong Park 71*54fd6939SJiyong Park# Do not enable SVE 72*54fd6939SJiyong ParkENABLE_SVE_FOR_NS := 0 73*54fd6939SJiyong Park 74*54fd6939SJiyong ParkMULTI_CONSOLE_API := 1 75