1*54fd6939SJiyong Park# 2*54fd6939SJiyong Park# Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. 3*54fd6939SJiyong Park# 4*54fd6939SJiyong Park# SPDX-License-Identifier: BSD-3-Clause 5*54fd6939SJiyong Park# 6*54fd6939SJiyong Park 7*54fd6939SJiyong Park# Non-TF Boot ROM 8*54fd6939SJiyong ParkBL2_AT_EL3 := 1 9*54fd6939SJiyong Park 10*54fd6939SJiyong Park# On Hikey, the TSP can execute from TZC secure area in DRAM (default) 11*54fd6939SJiyong Park# or SRAM. 12*54fd6939SJiyong ParkHIKEY_TSP_RAM_LOCATION ?= dram 13*54fd6939SJiyong Parkifeq (${HIKEY_TSP_RAM_LOCATION}, dram) 14*54fd6939SJiyong Park HIKEY_TSP_RAM_LOCATION_ID = HIKEY_DRAM_ID 15*54fd6939SJiyong Parkelse ifeq (${HIKEY_TSP_RAM_LOCATION}, sram) 16*54fd6939SJiyong Park HIKEY_TSP_RAM_LOCATION_ID = HIKEY_SRAM_ID 17*54fd6939SJiyong Parkelse 18*54fd6939SJiyong Park $(error "Currently unsupported HIKEY_TSP_RAM_LOCATION value") 19*54fd6939SJiyong Parkendif 20*54fd6939SJiyong Park 21*54fd6939SJiyong ParkCONSOLE_BASE := PL011_UART3_BASE 22*54fd6939SJiyong ParkCRASH_CONSOLE_BASE := PL011_UART3_BASE 23*54fd6939SJiyong ParkPLAT_PARTITION_MAX_ENTRIES := 12 24*54fd6939SJiyong ParkPLAT_PL061_MAX_GPIOS := 160 25*54fd6939SJiyong ParkCOLD_BOOT_SINGLE_CPU := 1 26*54fd6939SJiyong ParkPROGRAMMABLE_RESET_ADDRESS := 1 27*54fd6939SJiyong ParkENABLE_SVE_FOR_NS := 0 28*54fd6939SJiyong Park 29*54fd6939SJiyong Park# Process flags 30*54fd6939SJiyong Park$(eval $(call add_define,HIKEY_TSP_RAM_LOCATION_ID)) 31*54fd6939SJiyong Park$(eval $(call add_define,CONSOLE_BASE)) 32*54fd6939SJiyong Park$(eval $(call add_define,CRASH_CONSOLE_BASE)) 33*54fd6939SJiyong Park$(eval $(call add_define,PLAT_PL061_MAX_GPIOS)) 34*54fd6939SJiyong Park$(eval $(call add_define,PLAT_PARTITION_MAX_ENTRIES)) 35*54fd6939SJiyong Park 36*54fd6939SJiyong Park# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 37*54fd6939SJiyong Park# in the FIP if the platform requires. 38*54fd6939SJiyong Parkifneq ($(BL32_EXTRA1),) 39*54fd6939SJiyong Park$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) 40*54fd6939SJiyong Parkendif 41*54fd6939SJiyong Parkifneq ($(BL32_EXTRA2),) 42*54fd6939SJiyong Park$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) 43*54fd6939SJiyong Parkendif 44*54fd6939SJiyong Park 45*54fd6939SJiyong ParkUSE_COHERENT_MEM := 1 46*54fd6939SJiyong Park 47*54fd6939SJiyong ParkPLAT_INCLUDES := -Iplat/hisilicon/hikey/include 48*54fd6939SJiyong Park 49*54fd6939SJiyong ParkPLAT_BL_COMMON_SOURCES := drivers/arm/pl011/aarch64/pl011_console.S \ 50*54fd6939SJiyong Park lib/xlat_tables/aarch64/xlat_tables.c \ 51*54fd6939SJiyong Park lib/xlat_tables/xlat_tables_common.c \ 52*54fd6939SJiyong Park plat/hisilicon/hikey/aarch64/hikey_common.c 53*54fd6939SJiyong Park 54*54fd6939SJiyong ParkBL1_SOURCES += bl1/tbbr/tbbr_img_desc.c \ 55*54fd6939SJiyong Park drivers/arm/pl061/pl061_gpio.c \ 56*54fd6939SJiyong Park drivers/arm/sp804/sp804_delay_timer.c \ 57*54fd6939SJiyong Park drivers/delay_timer/delay_timer.c \ 58*54fd6939SJiyong Park drivers/gpio/gpio.c \ 59*54fd6939SJiyong Park drivers/io/io_block.c \ 60*54fd6939SJiyong Park drivers/io/io_fip.c \ 61*54fd6939SJiyong Park drivers/io/io_storage.c \ 62*54fd6939SJiyong Park drivers/mmc/mmc.c \ 63*54fd6939SJiyong Park drivers/synopsys/emmc/dw_mmc.c \ 64*54fd6939SJiyong Park lib/cpus/aarch64/cortex_a53.S \ 65*54fd6939SJiyong Park plat/hisilicon/hikey/aarch64/hikey_helpers.S \ 66*54fd6939SJiyong Park plat/hisilicon/hikey/hikey_bl1_setup.c \ 67*54fd6939SJiyong Park plat/hisilicon/hikey/hikey_bl_common.c \ 68*54fd6939SJiyong Park plat/hisilicon/hikey/hikey_io_storage.c 69*54fd6939SJiyong Park 70*54fd6939SJiyong ParkBL2_SOURCES += common/desc_image_load.c \ 71*54fd6939SJiyong Park drivers/arm/pl061/pl061_gpio.c \ 72*54fd6939SJiyong Park drivers/arm/sp804/sp804_delay_timer.c \ 73*54fd6939SJiyong Park drivers/delay_timer/delay_timer.c \ 74*54fd6939SJiyong Park drivers/gpio/gpio.c \ 75*54fd6939SJiyong Park drivers/io/io_block.c \ 76*54fd6939SJiyong Park drivers/io/io_fip.c \ 77*54fd6939SJiyong Park drivers/io/io_storage.c \ 78*54fd6939SJiyong Park drivers/mmc/mmc.c \ 79*54fd6939SJiyong Park drivers/partition/gpt.c \ 80*54fd6939SJiyong Park drivers/partition/partition.c \ 81*54fd6939SJiyong Park drivers/synopsys/emmc/dw_mmc.c \ 82*54fd6939SJiyong Park lib/cpus/aarch64/cortex_a53.S \ 83*54fd6939SJiyong Park plat/hisilicon/hikey/aarch64/hikey_helpers.S \ 84*54fd6939SJiyong Park plat/hisilicon/hikey/hikey_bl2_mem_params_desc.c \ 85*54fd6939SJiyong Park plat/hisilicon/hikey/hikey_bl2_setup.c \ 86*54fd6939SJiyong Park plat/hisilicon/hikey/hikey_bl_common.c \ 87*54fd6939SJiyong Park plat/hisilicon/hikey/hikey_security.c \ 88*54fd6939SJiyong Park plat/hisilicon/hikey/hikey_ddr.c \ 89*54fd6939SJiyong Park plat/hisilicon/hikey/hikey_image_load.c \ 90*54fd6939SJiyong Park plat/hisilicon/hikey/hikey_io_storage.c \ 91*54fd6939SJiyong Park plat/hisilicon/hikey/hisi_dvfs.c \ 92*54fd6939SJiyong Park plat/hisilicon/hikey/hisi_mcu.c 93*54fd6939SJiyong Park 94*54fd6939SJiyong Parkifeq (${SPD},opteed) 95*54fd6939SJiyong ParkBL2_SOURCES += lib/optee/optee_utils.c 96*54fd6939SJiyong Parkendif 97*54fd6939SJiyong Park 98*54fd6939SJiyong ParkHIKEY_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 99*54fd6939SJiyong Park drivers/arm/gic/v2/gicv2_main.c \ 100*54fd6939SJiyong Park drivers/arm/gic/v2/gicv2_helpers.c \ 101*54fd6939SJiyong Park plat/common/plat_gicv2.c 102*54fd6939SJiyong Park 103*54fd6939SJiyong ParkBL31_SOURCES += drivers/arm/cci/cci.c \ 104*54fd6939SJiyong Park drivers/arm/sp804/sp804_delay_timer.c \ 105*54fd6939SJiyong Park drivers/delay_timer/delay_timer.c \ 106*54fd6939SJiyong Park lib/cpus/aarch64/cortex_a53.S \ 107*54fd6939SJiyong Park plat/common/plat_psci_common.c \ 108*54fd6939SJiyong Park plat/hisilicon/hikey/aarch64/hikey_helpers.S \ 109*54fd6939SJiyong Park plat/hisilicon/hikey/hikey_bl31_setup.c \ 110*54fd6939SJiyong Park plat/hisilicon/hikey/hikey_pm.c \ 111*54fd6939SJiyong Park plat/hisilicon/hikey/hikey_topology.c \ 112*54fd6939SJiyong Park plat/hisilicon/hikey/hisi_ipc.c \ 113*54fd6939SJiyong Park plat/hisilicon/hikey/hisi_pwrc.c \ 114*54fd6939SJiyong Park plat/hisilicon/hikey/hisi_pwrc_sram.S \ 115*54fd6939SJiyong Park ${HIKEY_GIC_SOURCES} 116*54fd6939SJiyong Parkifeq (${ENABLE_PMF}, 1) 117*54fd6939SJiyong ParkBL31_SOURCES += plat/hisilicon/hikey/hisi_sip_svc.c \ 118*54fd6939SJiyong Park lib/pmf/pmf_smc.c 119*54fd6939SJiyong Parkendif 120*54fd6939SJiyong Park 121*54fd6939SJiyong Parkifneq (${TRUSTED_BOARD_BOOT},0) 122*54fd6939SJiyong Park 123*54fd6939SJiyong Parkinclude drivers/auth/mbedtls/mbedtls_crypto.mk 124*54fd6939SJiyong Parkinclude drivers/auth/mbedtls/mbedtls_x509.mk 125*54fd6939SJiyong Park 126*54fd6939SJiyong ParkAUTH_SOURCES := drivers/auth/auth_mod.c \ 127*54fd6939SJiyong Park drivers/auth/crypto_mod.c \ 128*54fd6939SJiyong Park drivers/auth/img_parser_mod.c \ 129*54fd6939SJiyong Park drivers/auth/tbbr/tbbr_cot_common.c 130*54fd6939SJiyong Park 131*54fd6939SJiyong ParkBL1_SOURCES += ${AUTH_SOURCES} \ 132*54fd6939SJiyong Park plat/common/tbbr/plat_tbbr.c \ 133*54fd6939SJiyong Park plat/hisilicon/hikey/hikey_tbbr.c \ 134*54fd6939SJiyong Park plat/hisilicon/hikey/hikey_rotpk.S \ 135*54fd6939SJiyong Park drivers/auth/tbbr/tbbr_cot_bl1.c 136*54fd6939SJiyong Park 137*54fd6939SJiyong ParkBL2_SOURCES += ${AUTH_SOURCES} \ 138*54fd6939SJiyong Park plat/common/tbbr/plat_tbbr.c \ 139*54fd6939SJiyong Park plat/hisilicon/hikey/hikey_tbbr.c \ 140*54fd6939SJiyong Park plat/hisilicon/hikey/hikey_rotpk.S \ 141*54fd6939SJiyong Park drivers/auth/tbbr/tbbr_cot_bl2.c 142*54fd6939SJiyong Park 143*54fd6939SJiyong ParkROT_KEY = $(BUILD_PLAT)/rot_key.pem 144*54fd6939SJiyong ParkROTPK_HASH = $(BUILD_PLAT)/rotpk_sha256.bin 145*54fd6939SJiyong Park 146*54fd6939SJiyong Park$(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"')) 147*54fd6939SJiyong Park$(BUILD_PLAT)/bl1/hikey_rotpk.o: $(ROTPK_HASH) 148*54fd6939SJiyong Park$(BUILD_PLAT)/bl2/hikey_rotpk.o: $(ROTPK_HASH) 149*54fd6939SJiyong Park 150*54fd6939SJiyong Parkcertificates: $(ROT_KEY) 151*54fd6939SJiyong Park$(ROT_KEY): | $(BUILD_PLAT) 152*54fd6939SJiyong Park @echo " OPENSSL $@" 153*54fd6939SJiyong Park $(Q)openssl genrsa 2048 > $@ 2>/dev/null 154*54fd6939SJiyong Park 155*54fd6939SJiyong Park$(ROTPK_HASH): $(ROT_KEY) 156*54fd6939SJiyong Park @echo " OPENSSL $@" 157*54fd6939SJiyong Park $(Q)openssl rsa -in $< -pubout -outform DER 2>/dev/null |\ 158*54fd6939SJiyong Park openssl dgst -sha256 -binary > $@ 2>/dev/null 159*54fd6939SJiyong Parkendif 160*54fd6939SJiyong Park 161*54fd6939SJiyong Park# Enable workarounds for selected Cortex-A53 errata. 162*54fd6939SJiyong ParkERRATA_A53_836870 := 1 163*54fd6939SJiyong ParkERRATA_A53_843419 := 1 164*54fd6939SJiyong ParkERRATA_A53_855873 := 1 165*54fd6939SJiyong Park 166*54fd6939SJiyong ParkWORKAROUND_CVE_2017_5715 := 0 167*54fd6939SJiyong Park 168*54fd6939SJiyong ParkFIP_ALIGN := 512 169