xref: /aosp_15_r20/external/arm-trusted-firmware/plat/hisilicon/hikey/hikey_topology.c (revision 54fd6939e177f8ff529b10183254802c76df6d08)
1*54fd6939SJiyong Park /*
2*54fd6939SJiyong Park  * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3*54fd6939SJiyong Park  *
4*54fd6939SJiyong Park  * SPDX-License-Identifier: BSD-3-Clause
5*54fd6939SJiyong Park  */
6*54fd6939SJiyong Park 
7*54fd6939SJiyong Park #include <platform_def.h>
8*54fd6939SJiyong Park 
9*54fd6939SJiyong Park #include <arch.h>
10*54fd6939SJiyong Park #include <lib/psci/psci.h>
11*54fd6939SJiyong Park 
12*54fd6939SJiyong Park /*
13*54fd6939SJiyong Park  * The HiKey power domain tree descriptor. The cluster power domains
14*54fd6939SJiyong Park  * are arranged so that when the PSCI generic code creates the power
15*54fd6939SJiyong Park  * domain tree, the indices of the CPU power domain nodes it allocates
16*54fd6939SJiyong Park  * match the linear indices returned by plat_core_pos_by_mpidr().
17*54fd6939SJiyong Park  */
18*54fd6939SJiyong Park const unsigned char hikey_power_domain_tree_desc[] = {
19*54fd6939SJiyong Park 	/* Number of root nodes */
20*54fd6939SJiyong Park 	1,
21*54fd6939SJiyong Park 	/* Number of clusters */
22*54fd6939SJiyong Park 	PLATFORM_CLUSTER_COUNT,
23*54fd6939SJiyong Park 	/* Number of children for the first cluster node */
24*54fd6939SJiyong Park 	PLATFORM_CORE_COUNT_PER_CLUSTER,
25*54fd6939SJiyong Park 	/* Number of children for the second cluster node */
26*54fd6939SJiyong Park 	PLATFORM_CORE_COUNT_PER_CLUSTER,
27*54fd6939SJiyong Park };
28*54fd6939SJiyong Park 
29*54fd6939SJiyong Park /*******************************************************************************
30*54fd6939SJiyong Park  * This function returns the HiKey topology tree information.
31*54fd6939SJiyong Park  ******************************************************************************/
plat_get_power_domain_tree_desc(void)32*54fd6939SJiyong Park const unsigned char *plat_get_power_domain_tree_desc(void)
33*54fd6939SJiyong Park {
34*54fd6939SJiyong Park 	return hikey_power_domain_tree_desc;
35*54fd6939SJiyong Park }
36*54fd6939SJiyong Park 
37*54fd6939SJiyong Park /*******************************************************************************
38*54fd6939SJiyong Park  * This function implements a part of the critical interface between the psci
39*54fd6939SJiyong Park  * generic layer and the platform that allows the former to query the platform
40*54fd6939SJiyong Park  * to convert an MPIDR to a unique linear index. An error code (-1) is returned
41*54fd6939SJiyong Park  * in case the MPIDR is invalid.
42*54fd6939SJiyong Park  ******************************************************************************/
plat_core_pos_by_mpidr(u_register_t mpidr)43*54fd6939SJiyong Park int plat_core_pos_by_mpidr(u_register_t mpidr)
44*54fd6939SJiyong Park {
45*54fd6939SJiyong Park 	unsigned int cluster_id, cpu_id;
46*54fd6939SJiyong Park 
47*54fd6939SJiyong Park 	mpidr &= MPIDR_AFFINITY_MASK;
48*54fd6939SJiyong Park 
49*54fd6939SJiyong Park 	if (mpidr & ~(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK))
50*54fd6939SJiyong Park 		return -1;
51*54fd6939SJiyong Park 
52*54fd6939SJiyong Park 	cluster_id = (mpidr >> MPIDR_AFF1_SHIFT) & MPIDR_AFFLVL_MASK;
53*54fd6939SJiyong Park 	cpu_id = (mpidr >> MPIDR_AFF0_SHIFT) & MPIDR_AFFLVL_MASK;
54*54fd6939SJiyong Park 
55*54fd6939SJiyong Park 	if (cluster_id >= PLATFORM_CLUSTER_COUNT)
56*54fd6939SJiyong Park 		return -1;
57*54fd6939SJiyong Park 
58*54fd6939SJiyong Park 	/*
59*54fd6939SJiyong Park 	 * Validate cpu_id by checking whether it represents a CPU in
60*54fd6939SJiyong Park 	 * one of the two clusters present on the platform.
61*54fd6939SJiyong Park 	 */
62*54fd6939SJiyong Park 	if (cpu_id >= PLATFORM_CORE_COUNT_PER_CLUSTER)
63*54fd6939SJiyong Park 		return -1;
64*54fd6939SJiyong Park 
65*54fd6939SJiyong Park 	return (cpu_id + (cluster_id * 4));
66*54fd6939SJiyong Park }
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